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From: Lukas Wunner <lukas@wunner.de>
To: Mario Limonciello <mario.limonciello@amd.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	"Rafael J . Wysocki" <rjw@rjwysocki.net>,
	Mika Westerberg <mika.westerberg@linux.intel.com>,
	Hans de Goede <hdegoede@redhat.com>,
	Shyam Sundar S K <Shyam-sundar.S-k@amd.com>,
	"open list:X86 PLATFORM DRIVERS" 
	<platform-driver-x86@vger.kernel.org>,
	"open list:PCI SUBSYSTEM" <linux-pci@vger.kernel.org>,
	linux-pm@vger.kernel.org,
	"open list:USB XHCI DRIVER" <linux-usb@vger.kernel.org>,
	iain@orangesquash.org.uk
Subject: Re: [PATCH v18 2/2] PCI: Add a quirk for AMD PCIe root ports w/ USB4 controllers
Date: Wed, 13 Sep 2023 16:31:28 +0200	[thread overview]
Message-ID: <20230913143128.GA29059@wunner.de> (raw)
In-Reply-To: <fd981219-d864-4c46-a348-61f73a9df596@amd.com>

On Tue, Sep 12, 2023 at 11:43:53PM -0500, Mario Limonciello wrote:
> On 9/12/2023 23:25, Lukas Wunner wrote:
> > There's already PCI_DEV_FLAGS_NO_D3, would it be possible to just
> > reuse that instead of adding another codepath for D3 quirks?
> > 
> 
> The root port can handle D3 (including wakeup) at runtime fine.
> Issue occurs only during s2idle w/ hardware sleep.

I see.

If this only affects system sleep, not runtime PM, what you can do is
define a DECLARE_PCI_FIXUP_SUSPEND_LATE() which calls pci_d3cold_disable()
and also define a DECLARE_PCI_FIXUP_CLASS_RESUME_EARLY() which calls
pci_d3cold_enable().

And I think you can make those calls conditional on pm_suspend_no_platform()
to constrain to s2idle.

User space should still be able to influence runtime PM via the
d3cold_allowed flag (unless I'm missing something).

Thanks,

Lukas

  parent reply	other threads:[~2023-09-13 14:31 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-13  4:08 [PATCH v18 0/2] Add quirk for PCIe root port on AMD systems Mario Limonciello
2023-09-13  4:08 ` [PATCH v18 1/2] PCI: Move the `PCI_CLASS_SERIAL_USB_USB4` definition to common header Mario Limonciello
2023-09-13 10:34   ` Mika Westerberg
2023-09-13  4:08 ` [PATCH v18 2/2] PCI: Add a quirk for AMD PCIe root ports w/ USB4 controllers Mario Limonciello
2023-09-13  4:25   ` Lukas Wunner
2023-09-13  4:43     ` Mario Limonciello
2023-09-13  8:14       ` Rafael J. Wysocki
2023-09-13 14:31       ` Lukas Wunner [this message]
2023-09-13 16:36         ` Mario Limonciello
2023-09-14 14:17           ` Lukas Wunner
2023-09-14 14:31             ` Mario Limonciello
2023-09-14 14:53               ` Lukas Wunner
2023-09-14 15:33                 ` Bjorn Helgaas
2023-09-14 16:05                   ` Rafael J. Wysocki
2023-09-14 19:04                   ` Lukas Wunner
2023-09-14 19:09                     ` Lukas Wunner
2023-09-13  9:56   ` kernel test robot
2023-09-13 10:17   ` kernel test robot
2023-09-13 10:20   ` Rafael J. Wysocki
2023-09-13 15:40     ` Bjorn Helgaas
2023-09-13 16:35       ` Mario Limonciello
2023-09-13 17:42         ` Rafael J. Wysocki
2023-09-13 21:05           ` Bjorn Helgaas
2023-09-13 21:16             ` Mario Limonciello
2023-09-14  4:59               ` Mario Limonciello
2023-09-14 12:32                 ` Bjorn Helgaas
2023-09-14 13:57                   ` Mario Limonciello
2023-09-15  0:55                 ` Mario Limonciello
2023-09-15  1:24                   ` Bjorn Helgaas

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