From: Oliver Upton <oliver.upton@linux.dev>
To: kvmarm@lists.linux.dev
Cc: kvm@vger.kernel.org, Marc Zyngier <maz@kernel.org>,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Zenghui Yu <yuzenghui@huawei.com>, Will Deacon <will@kernel.org>,
Cornelia Huck <cohuck@redhat.com>,
Oliver Upton <oliver.upton@linux.dev>,
Jing Zhang <jingzhangos@google.com>
Subject: [PATCH v10 04/12] KVM: arm64: Reject attempts to set invalid debug arch version
Date: Wed, 20 Sep 2023 18:33:01 +0000 [thread overview]
Message-ID: <20230920183310.1163034-5-oliver.upton@linux.dev> (raw)
In-Reply-To: <20230920183310.1163034-1-oliver.upton@linux.dev>
The debug architecture is mandatory in ARMv8, so KVM should not allow
userspace to configure a vCPU with less than that. Of course, this isn't
handled elegantly by the generic ID register plumbing, as the respective
ID register fields have a nonzero starting value.
Add an explicit check for debug versions less than v8 of the
architecture.
Signed-off-by: Jing Zhang <jingzhangos@google.com>
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
---
arch/arm64/kvm/sys_regs.c | 32 +++++++++++++++++++++++++++++---
1 file changed, 29 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 4dcc9272fbb8..fdebd9d042c3 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -1216,8 +1216,14 @@ static s64 kvm_arm64_ftr_safe_value(u32 id, const struct arm64_ftr_bits *ftrp,
/* Some features have different safe value type in KVM than host features */
switch (id) {
case SYS_ID_AA64DFR0_EL1:
- if (kvm_ftr.shift == ID_AA64DFR0_EL1_PMUVer_SHIFT)
+ switch (kvm_ftr.shift) {
+ case ID_AA64DFR0_EL1_PMUVer_SHIFT:
kvm_ftr.type = FTR_LOWER_SAFE;
+ break;
+ case ID_AA64DFR0_EL1_DebugVer_SHIFT:
+ kvm_ftr.type = FTR_LOWER_SAFE;
+ break;
+ }
break;
case SYS_ID_DFR0_EL1:
if (kvm_ftr.shift == ID_DFR0_EL1_PerfMon_SHIFT)
@@ -1476,14 +1482,22 @@ static u64 read_sanitised_id_aa64pfr0_el1(struct kvm_vcpu *vcpu,
return val;
}
+#define ID_REG_LIMIT_FIELD_ENUM(val, reg, field, limit) \
+({ \
+ u64 __f_val = FIELD_GET(reg##_##field##_MASK, val); \
+ (val) &= ~reg##_##field##_MASK; \
+ (val) |= FIELD_PREP(reg##_##field##_MASK, \
+ min(__f_val, (u64)reg##_##field##_##limit)); \
+ (val); \
+})
+
static u64 read_sanitised_id_aa64dfr0_el1(struct kvm_vcpu *vcpu,
const struct sys_reg_desc *rd)
{
u64 val = read_sanitised_ftr_reg(SYS_ID_AA64DFR0_EL1);
/* Limit debug to ARMv8.0 */
- val &= ~ID_AA64DFR0_EL1_DebugVer_MASK;
- val |= SYS_FIELD_PREP_ENUM(ID_AA64DFR0_EL1, DebugVer, IMP);
+ val = ID_REG_LIMIT_FIELD_ENUM(val, ID_AA64DFR0_EL1, DebugVer, IMP);
/*
* Only initialize the PMU version if the vCPU was configured with one.
@@ -1503,6 +1517,7 @@ static int set_id_aa64dfr0_el1(struct kvm_vcpu *vcpu,
const struct sys_reg_desc *rd,
u64 val)
{
+ u8 debugver = SYS_FIELD_GET(ID_AA64DFR0_EL1, DebugVer, val);
u8 pmuver = SYS_FIELD_GET(ID_AA64DFR0_EL1, PMUVer, val);
/*
@@ -1522,6 +1537,13 @@ static int set_id_aa64dfr0_el1(struct kvm_vcpu *vcpu,
if (pmuver == ID_AA64DFR0_EL1_PMUVer_IMP_DEF)
val &= ~ID_AA64DFR0_EL1_PMUVer_MASK;
+ /*
+ * ID_AA64DFR0_EL1.DebugVer is one of those awkward fields with a
+ * nonzero minimum safe value.
+ */
+ if (debugver < ID_AA64DFR0_EL1_DebugVer_IMP)
+ return -EINVAL;
+
return set_id_reg(vcpu, rd, val);
}
@@ -1543,6 +1565,7 @@ static int set_id_dfr0_el1(struct kvm_vcpu *vcpu,
u64 val)
{
u8 perfmon = SYS_FIELD_GET(ID_DFR0_EL1, PerfMon, val);
+ u8 copdbg = SYS_FIELD_GET(ID_DFR0_EL1, CopDbg, val);
if (perfmon == ID_DFR0_EL1_PerfMon_IMPDEF) {
val &= ~ID_DFR0_EL1_PerfMon_MASK;
@@ -1558,6 +1581,9 @@ static int set_id_dfr0_el1(struct kvm_vcpu *vcpu,
if (perfmon != 0 && perfmon < ID_DFR0_EL1_PerfMon_PMUv3)
return -EINVAL;
+ if (copdbg < ID_DFR0_EL1_CopDbg_Armv8)
+ return -EINVAL;
+
return set_id_reg(vcpu, rd, val);
}
--
2.42.0.515.g380fc7ccd1-goog
next prev parent reply other threads:[~2023-09-20 18:33 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-20 18:32 [PATCH v10 00/12] KVM: arm64: Enable 'writable' ID registers Oliver Upton
2023-09-20 18:32 ` [PATCH v10 01/12] KVM: arm64: Allow userspace to get the writable masks for feature " Oliver Upton
2023-09-21 9:53 ` Cornelia Huck
2023-09-21 18:20 ` Oliver Upton
2023-09-20 18:32 ` [PATCH v10 02/12] KVM: arm64: Document KVM_ARM_GET_REG_WRITABLE_MASKS Oliver Upton
2023-09-21 9:56 ` Cornelia Huck
2023-09-20 18:33 ` [PATCH v10 03/12] KVM: arm64: Use guest ID register values for the sake of emulation Oliver Upton
2023-09-20 18:33 ` Oliver Upton [this message]
2023-09-20 18:33 ` [PATCH v10 05/12] KVM: arm64: Bump up the default KVM sanitised debug version to v8p8 Oliver Upton
2023-09-20 18:33 ` [PATCH v10 06/12] KVM: arm64: Allow userspace to change ID_AA64ISAR{0-2}_EL1 Oliver Upton
2023-09-22 17:18 ` Kristina Martsenko
2023-09-22 17:20 ` Kristina Martsenko
2023-09-22 17:52 ` Oliver Upton
2023-10-03 19:41 ` Oliver Upton
2023-09-20 18:33 ` [PATCH v10 07/12] KVM: arm64: Allow userspace to change ID_AA64MMFR{0-2}_EL1 Oliver Upton
2023-09-20 18:33 ` [PATCH v10 08/12] KVM: arm64: Allow userspace to change ID_AA64PFR0_EL1 Oliver Upton
2023-09-20 18:33 ` [PATCH v10 09/12] KVM: arm64: Allow userspace to change ID_AA64ZFR0_EL1 Oliver Upton
2023-09-20 18:33 ` [PATCH v10 10/12] KVM: arm64: Document vCPU feature selection UAPIs Oliver Upton
2023-09-27 2:45 ` kernel test robot
2023-10-03 19:37 ` Oliver Upton
2023-09-20 18:33 ` [PATCH v10 11/12] KVM: arm64: selftests: Import automatic generation of sysreg defs Oliver Upton
2023-09-20 18:33 ` [PATCH v10 12/12] KVM: arm64: selftests: Test for setting ID register from usersapce Oliver Upton
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