From: Aurelien Aptel <aaptel@nvidia.com>
To: linux-nvme@lists.infradead.org, netdev@vger.kernel.org,
sagi@grimberg.me, hch@lst.de, kbusch@kernel.org, axboe@fb.com,
chaitanyak@nvidia.com, davem@davemloft.net, kuba@kernel.org
Cc: Or Gerlitz <ogerlitz@nvidia.com>,
aaptel@nvidia.com, aurelien.aptel@gmail.com, smalin@nvidia.com,
malin1024@gmail.com, yorayz@nvidia.com, borisp@nvidia.com,
galshalom@nvidia.com, mgurtovoy@nvidia.com
Subject: [PATCH v16 10/20] net/mlx5e: Rename from tls to transport static params
Date: Thu, 28 Sep 2023 15:09:44 +0000 [thread overview]
Message-ID: <20230928150954.1684-11-aaptel@nvidia.com> (raw)
In-Reply-To: <20230928150954.1684-1-aaptel@nvidia.com>
From: Or Gerlitz <ogerlitz@nvidia.com>
The static params structure is used in TLS but also in other
transports we're offloading like nvmeotcp:
- Rename the relevant structures/fields
- Create common file for appropriate transports
- Apply changes in the TLS code
No functional change here.
Signed-off-by: Or Gerlitz <ogerlitz@nvidia.com>
Signed-off-by: Ben Ben-Ishay <benishay@nvidia.com>
Signed-off-by: Aurelien Aptel <aaptel@nvidia.com>
Reviewed-by: Tariq Toukan <tariqt@nvidia.com>
---
.../mlx5/core/en_accel/common_utils.h | 32 +++++++++++++++++
.../mellanox/mlx5/core/en_accel/ktls.c | 2 +-
.../mellanox/mlx5/core/en_accel/ktls_rx.c | 6 ++--
.../mellanox/mlx5/core/en_accel/ktls_tx.c | 8 ++---
.../mellanox/mlx5/core/en_accel/ktls_txrx.c | 36 ++++++++-----------
.../mellanox/mlx5/core/en_accel/ktls_utils.h | 17 ++-------
include/linux/mlx5/device.h | 8 ++---
include/linux/mlx5/mlx5_ifc.h | 8 +++--
8 files changed, 67 insertions(+), 50 deletions(-)
create mode 100644 drivers/net/ethernet/mellanox/mlx5/core/en_accel/common_utils.h
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/common_utils.h b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/common_utils.h
new file mode 100644
index 000000000000..efdf48125848
--- /dev/null
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/common_utils.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
+/* Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. */
+#ifndef __MLX5E_COMMON_UTILS_H__
+#define __MLX5E_COMMON_UTILS_H__
+
+#include "en.h"
+
+struct mlx5e_set_transport_static_params_wqe {
+ struct mlx5_wqe_ctrl_seg ctrl;
+ struct mlx5_wqe_umr_ctrl_seg uctrl;
+ struct mlx5_mkey_seg mkc;
+ struct mlx5_wqe_transport_static_params_seg params;
+};
+
+/* macros for transport_static_params handling */
+#define MLX5E_TRANSPORT_SET_STATIC_PARAMS_WQEBBS \
+ (DIV_ROUND_UP(sizeof(struct mlx5e_set_transport_static_params_wqe), MLX5_SEND_WQE_BB))
+
+#define MLX5E_TRANSPORT_FETCH_SET_STATIC_PARAMS_WQE(sq, pi) \
+ ((struct mlx5e_set_transport_static_params_wqe *)\
+ mlx5e_fetch_wqe(&(sq)->wq, pi, sizeof(struct mlx5e_set_transport_static_params_wqe)))
+
+#define MLX5E_TRANSPORT_STATIC_PARAMS_WQE_SZ \
+ (sizeof(struct mlx5e_set_transport_static_params_wqe))
+
+#define MLX5E_TRANSPORT_STATIC_PARAMS_DS_CNT \
+ (DIV_ROUND_UP(MLX5E_TRANSPORT_STATIC_PARAMS_WQE_SZ, MLX5_SEND_WQE_DS))
+
+#define MLX5E_TRANSPORT_STATIC_PARAMS_OCTWORD_SIZE \
+ (MLX5_ST_SZ_BYTES(transport_static_params) / MLX5_SEND_WQE_DS)
+
+#endif /* __MLX5E_COMMON_UTILS_H__ */
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls.c
index 984fa04bd331..bab9b0c59491 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls.c
@@ -100,7 +100,7 @@ bool mlx5e_is_ktls_rx(struct mlx5_core_dev *mdev)
return false;
/* Check the possibility to post the required ICOSQ WQEs. */
- if (WARN_ON_ONCE(max_sq_wqebbs < MLX5E_TLS_SET_STATIC_PARAMS_WQEBBS))
+ if (WARN_ON_ONCE(max_sq_wqebbs < MLX5E_TRANSPORT_SET_STATIC_PARAMS_WQEBBS))
return false;
if (WARN_ON_ONCE(max_sq_wqebbs < MLX5E_TLS_SET_PROGRESS_PARAMS_WQEBBS))
return false;
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c
index 9b597cb24598..20994773056c 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c
@@ -136,16 +136,16 @@ static struct mlx5_wqe_ctrl_seg *
post_static_params(struct mlx5e_icosq *sq,
struct mlx5e_ktls_offload_context_rx *priv_rx)
{
- struct mlx5e_set_tls_static_params_wqe *wqe;
+ struct mlx5e_set_transport_static_params_wqe *wqe;
struct mlx5e_icosq_wqe_info wi;
u16 pi, num_wqebbs;
- num_wqebbs = MLX5E_TLS_SET_STATIC_PARAMS_WQEBBS;
+ num_wqebbs = MLX5E_TRANSPORT_SET_STATIC_PARAMS_WQEBBS;
if (unlikely(!mlx5e_icosq_can_post_wqe(sq, num_wqebbs)))
return ERR_PTR(-ENOSPC);
pi = mlx5e_icosq_get_next_pi(sq, num_wqebbs);
- wqe = MLX5E_TLS_FETCH_SET_STATIC_PARAMS_WQE(sq, pi);
+ wqe = MLX5E_TRANSPORT_FETCH_SET_STATIC_PARAMS_WQE(sq, pi);
mlx5e_ktls_build_static_params(wqe, sq->pc, sq->sqn, &priv_rx->crypto_info,
mlx5e_tir_get_tirn(&priv_rx->tir),
mlx5_crypto_dek_get_id(priv_rx->dek),
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c
index d61be26a4df1..0691995470e2 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c
@@ -33,7 +33,7 @@ u16 mlx5e_ktls_get_stop_room(struct mlx5_core_dev *mdev, struct mlx5e_params *pa
num_dumps = mlx5e_ktls_dumps_num_wqes(params, MAX_SKB_FRAGS, TLS_MAX_PAYLOAD_SIZE);
- stop_room += mlx5e_stop_room_for_wqe(mdev, MLX5E_TLS_SET_STATIC_PARAMS_WQEBBS);
+ stop_room += mlx5e_stop_room_for_wqe(mdev, MLX5E_TRANSPORT_SET_STATIC_PARAMS_WQEBBS);
stop_room += mlx5e_stop_room_for_wqe(mdev, MLX5E_TLS_SET_PROGRESS_PARAMS_WQEBBS);
stop_room += num_dumps * mlx5e_stop_room_for_wqe(mdev, MLX5E_KTLS_DUMP_WQEBBS);
stop_room += 1; /* fence nop */
@@ -550,12 +550,12 @@ post_static_params(struct mlx5e_txqsq *sq,
struct mlx5e_ktls_offload_context_tx *priv_tx,
bool fence)
{
- struct mlx5e_set_tls_static_params_wqe *wqe;
+ struct mlx5e_set_transport_static_params_wqe *wqe;
u16 pi, num_wqebbs;
- num_wqebbs = MLX5E_TLS_SET_STATIC_PARAMS_WQEBBS;
+ num_wqebbs = MLX5E_TRANSPORT_SET_STATIC_PARAMS_WQEBBS;
pi = mlx5e_txqsq_get_next_pi(sq, num_wqebbs);
- wqe = MLX5E_TLS_FETCH_SET_STATIC_PARAMS_WQE(sq, pi);
+ wqe = MLX5E_TRANSPORT_FETCH_SET_STATIC_PARAMS_WQE(sq, pi);
mlx5e_ktls_build_static_params(wqe, sq->pc, sq->sqn, &priv_tx->crypto_info,
priv_tx->tisn,
mlx5_crypto_dek_get_id(priv_tx->dek),
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_txrx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_txrx.c
index 570a912dd6fa..8abea6fe6cd9 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_txrx.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_txrx.c
@@ -8,10 +8,6 @@ enum {
MLX5E_STATIC_PARAMS_CONTEXT_TLS_1_2 = 0x2,
};
-enum {
- MLX5E_ENCRYPTION_STANDARD_TLS = 0x1,
-};
-
#define EXTRACT_INFO_FIELDS do { \
salt = info->salt; \
rec_seq = info->rec_seq; \
@@ -20,7 +16,7 @@ enum {
} while (0)
static void
-fill_static_params(struct mlx5_wqe_tls_static_params_seg *params,
+fill_static_params(struct mlx5_wqe_transport_static_params_seg *params,
union mlx5e_crypto_info *crypto_info,
u32 key_id, u32 resync_tcp_sn)
{
@@ -53,25 +49,25 @@ fill_static_params(struct mlx5_wqe_tls_static_params_seg *params,
return;
}
- gcm_iv = MLX5_ADDR_OF(tls_static_params, ctx, gcm_iv);
- initial_rn = MLX5_ADDR_OF(tls_static_params, ctx, initial_record_number);
+ gcm_iv = MLX5_ADDR_OF(transport_static_params, ctx, gcm_iv);
+ initial_rn = MLX5_ADDR_OF(transport_static_params, ctx, initial_record_number);
memcpy(gcm_iv, salt, salt_sz);
memcpy(initial_rn, rec_seq, rec_seq_sz);
tls_version = MLX5E_STATIC_PARAMS_CONTEXT_TLS_1_2;
- MLX5_SET(tls_static_params, ctx, tls_version, tls_version);
- MLX5_SET(tls_static_params, ctx, const_1, 1);
- MLX5_SET(tls_static_params, ctx, const_2, 2);
- MLX5_SET(tls_static_params, ctx, encryption_standard,
- MLX5E_ENCRYPTION_STANDARD_TLS);
- MLX5_SET(tls_static_params, ctx, resync_tcp_sn, resync_tcp_sn);
- MLX5_SET(tls_static_params, ctx, dek_index, key_id);
+ MLX5_SET(transport_static_params, ctx, tls_version, tls_version);
+ MLX5_SET(transport_static_params, ctx, const_1, 1);
+ MLX5_SET(transport_static_params, ctx, const_2, 2);
+ MLX5_SET(transport_static_params, ctx, acc_type,
+ MLX5_TRANSPORT_STATIC_PARAMS_ACC_TYPE_TLS);
+ MLX5_SET(transport_static_params, ctx, resync_tcp_sn, resync_tcp_sn);
+ MLX5_SET(transport_static_params, ctx, dek_index, key_id);
}
void
-mlx5e_ktls_build_static_params(struct mlx5e_set_tls_static_params_wqe *wqe,
+mlx5e_ktls_build_static_params(struct mlx5e_set_transport_static_params_wqe *wqe,
u16 pc, u32 sqn,
union mlx5e_crypto_info *crypto_info,
u32 tis_tir_num, u32 key_id, u32 resync_tcp_sn,
@@ -80,19 +76,17 @@ mlx5e_ktls_build_static_params(struct mlx5e_set_tls_static_params_wqe *wqe,
struct mlx5_wqe_umr_ctrl_seg *ucseg = &wqe->uctrl;
struct mlx5_wqe_ctrl_seg *cseg = &wqe->ctrl;
u8 opmod = direction == TLS_OFFLOAD_CTX_DIR_TX ?
- MLX5_OPC_MOD_TLS_TIS_STATIC_PARAMS :
- MLX5_OPC_MOD_TLS_TIR_STATIC_PARAMS;
-
-#define STATIC_PARAMS_DS_CNT DIV_ROUND_UP(sizeof(*wqe), MLX5_SEND_WQE_DS)
+ MLX5_OPC_MOD_TRANSPORT_TIS_STATIC_PARAMS :
+ MLX5_OPC_MOD_TRANSPORT_TIR_STATIC_PARAMS;
cseg->opmod_idx_opcode = cpu_to_be32((pc << 8) | MLX5_OPCODE_UMR | (opmod << 24));
cseg->qpn_ds = cpu_to_be32((sqn << MLX5_WQE_CTRL_QPN_SHIFT) |
- STATIC_PARAMS_DS_CNT);
+ MLX5E_TRANSPORT_STATIC_PARAMS_DS_CNT);
cseg->fm_ce_se = fence ? MLX5_FENCE_MODE_INITIATOR_SMALL : 0;
cseg->tis_tir_num = cpu_to_be32(tis_tir_num << 8);
ucseg->flags = MLX5_UMR_INLINE;
- ucseg->bsf_octowords = cpu_to_be16(MLX5_ST_SZ_BYTES(tls_static_params) / 16);
+ ucseg->bsf_octowords = cpu_to_be16(MLX5E_TRANSPORT_STATIC_PARAMS_OCTWORD_SIZE);
fill_static_params(&wqe->params, crypto_info, key_id, resync_tcp_sn);
}
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_utils.h b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_utils.h
index 3d79cd379890..5e2d186778aa 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_utils.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_utils.h
@@ -6,6 +6,7 @@
#include <net/tls.h>
#include "en.h"
+#include "en_accel/common_utils.h"
enum {
MLX5E_TLS_PROGRESS_PARAMS_AUTH_STATE_NO_OFFLOAD = 0,
@@ -33,13 +34,6 @@ union mlx5e_crypto_info {
struct tls12_crypto_info_aes_gcm_256 crypto_info_256;
};
-struct mlx5e_set_tls_static_params_wqe {
- struct mlx5_wqe_ctrl_seg ctrl;
- struct mlx5_wqe_umr_ctrl_seg uctrl;
- struct mlx5_mkey_seg mkc;
- struct mlx5_wqe_tls_static_params_seg params;
-};
-
struct mlx5e_set_tls_progress_params_wqe {
struct mlx5_wqe_ctrl_seg ctrl;
struct mlx5_wqe_tls_progress_params_seg params;
@@ -50,19 +44,12 @@ struct mlx5e_get_tls_progress_params_wqe {
struct mlx5_seg_get_psv psv;
};
-#define MLX5E_TLS_SET_STATIC_PARAMS_WQEBBS \
- (DIV_ROUND_UP(sizeof(struct mlx5e_set_tls_static_params_wqe), MLX5_SEND_WQE_BB))
-
#define MLX5E_TLS_SET_PROGRESS_PARAMS_WQEBBS \
(DIV_ROUND_UP(sizeof(struct mlx5e_set_tls_progress_params_wqe), MLX5_SEND_WQE_BB))
#define MLX5E_KTLS_GET_PROGRESS_WQEBBS \
(DIV_ROUND_UP(sizeof(struct mlx5e_get_tls_progress_params_wqe), MLX5_SEND_WQE_BB))
-#define MLX5E_TLS_FETCH_SET_STATIC_PARAMS_WQE(sq, pi) \
- ((struct mlx5e_set_tls_static_params_wqe *)\
- mlx5e_fetch_wqe(&(sq)->wq, pi, sizeof(struct mlx5e_set_tls_static_params_wqe)))
-
#define MLX5E_TLS_FETCH_SET_PROGRESS_PARAMS_WQE(sq, pi) \
((struct mlx5e_set_tls_progress_params_wqe *)\
mlx5e_fetch_wqe(&(sq)->wq, pi, sizeof(struct mlx5e_set_tls_progress_params_wqe)))
@@ -76,7 +63,7 @@ struct mlx5e_get_tls_progress_params_wqe {
mlx5e_fetch_wqe(&(sq)->wq, pi, sizeof(struct mlx5e_dump_wqe)))
void
-mlx5e_ktls_build_static_params(struct mlx5e_set_tls_static_params_wqe *wqe,
+mlx5e_ktls_build_static_params(struct mlx5e_set_transport_static_params_wqe *wqe,
u16 pc, u32 sqn,
union mlx5e_crypto_info *crypto_info,
u32 tis_tir_num, u32 key_id, u32 resync_tcp_sn,
diff --git a/include/linux/mlx5/device.h b/include/linux/mlx5/device.h
index 8fbe22de16ef..7ed01daf8a1d 100644
--- a/include/linux/mlx5/device.h
+++ b/include/linux/mlx5/device.h
@@ -452,8 +452,8 @@ enum {
};
enum {
- MLX5_OPC_MOD_TLS_TIS_STATIC_PARAMS = 0x1,
- MLX5_OPC_MOD_TLS_TIR_STATIC_PARAMS = 0x2,
+ MLX5_OPC_MOD_TRANSPORT_TIS_STATIC_PARAMS = 0x1,
+ MLX5_OPC_MOD_TRANSPORT_TIR_STATIC_PARAMS = 0x2,
};
enum {
@@ -461,8 +461,8 @@ enum {
MLX5_OPC_MOD_TLS_TIR_PROGRESS_PARAMS = 0x2,
};
-struct mlx5_wqe_tls_static_params_seg {
- u8 ctx[MLX5_ST_SZ_BYTES(tls_static_params)];
+struct mlx5_wqe_transport_static_params_seg {
+ u8 ctx[MLX5_ST_SZ_BYTES(transport_static_params)];
};
struct mlx5_wqe_tls_progress_params_seg {
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index dd8421d021cf..ce317b4cdfeb 100644
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -12292,12 +12292,16 @@ enum {
MLX5_GENERAL_OBJECT_TYPE_ENCRYPTION_KEY_PURPOSE_MACSEC = 0x4,
};
-struct mlx5_ifc_tls_static_params_bits {
+enum {
+ MLX5_TRANSPORT_STATIC_PARAMS_ACC_TYPE_TLS = 0x1,
+};
+
+struct mlx5_ifc_transport_static_params_bits {
u8 const_2[0x2];
u8 tls_version[0x4];
u8 const_1[0x2];
u8 reserved_at_8[0x14];
- u8 encryption_standard[0x4];
+ u8 acc_type[0x4];
u8 reserved_at_20[0x20];
--
2.34.1
next prev parent reply other threads:[~2023-09-28 15:11 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-28 15:09 [PATCH v16 00/20] nvme-tcp receive offloads Aurelien Aptel
2023-09-28 15:09 ` [PATCH v16 01/20] net: Introduce direct data placement tcp offload Aurelien Aptel
2023-09-28 15:09 ` [PATCH v16 02/20] netlink: add new family to manage ULP_DDP enablement and stats Aurelien Aptel
2023-09-28 15:09 ` [PATCH v16 03/20] iov_iter: skip copy if src == dst for direct data placement Aurelien Aptel
2023-09-28 15:09 ` [PATCH v16 04/20] net/tls,core: export get_netdev_for_sock Aurelien Aptel
2023-09-28 15:09 ` [PATCH v16 05/20] nvme-tcp: Add DDP offload control path Aurelien Aptel
2023-09-28 15:09 ` [PATCH v16 06/20] nvme-tcp: Add DDP data-path Aurelien Aptel
2023-09-28 15:09 ` [PATCH v16 07/20] nvme-tcp: RX DDGST offload Aurelien Aptel
2023-09-28 15:09 ` [PATCH v16 08/20] nvme-tcp: Deal with netdevice DOWN events Aurelien Aptel
2023-09-28 15:09 ` [PATCH v16 09/20] Documentation: add ULP DDP offload documentation Aurelien Aptel
2023-09-28 15:09 ` Aurelien Aptel [this message]
2023-09-28 15:09 ` [PATCH v16 11/20] net/mlx5e: Refactor ico sq polling to get budget Aurelien Aptel
2023-09-28 15:09 ` [PATCH v16 12/20] net/mlx5: Add NVMEoTCP caps, HW bits, 128B CQE and enumerations Aurelien Aptel
2023-09-28 15:09 ` [PATCH v16 13/20] net/mlx5e: NVMEoTCP, offload initialization Aurelien Aptel
2023-09-28 15:09 ` [PATCH v16 14/20] net/mlx5e: TCP flow steering for nvme-tcp acceleration Aurelien Aptel
2023-09-28 15:09 ` [PATCH v16 15/20] net/mlx5e: NVMEoTCP, use KLM UMRs for buffer registration Aurelien Aptel
2023-09-28 15:09 ` [PATCH v16 16/20] net/mlx5e: NVMEoTCP, queue init/teardown Aurelien Aptel
2023-09-28 15:09 ` [PATCH v16 17/20] net/mlx5e: NVMEoTCP, ddp setup and resync Aurelien Aptel
2023-09-28 15:09 ` [PATCH v16 18/20] net/mlx5e: NVMEoTCP, async ddp invalidation Aurelien Aptel
2023-09-28 15:09 ` [PATCH v16 19/20] net/mlx5e: NVMEoTCP, data-path for DDP+DDGST offload Aurelien Aptel
2023-09-28 15:09 ` [PATCH v16 20/20] net/mlx5e: NVMEoTCP, statistics Aurelien Aptel
2023-10-13 15:49 ` [PATCH v16 00/20] nvme-tcp receive offloads Jakub Kicinski
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all data and code used by this external index.