From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3897CE776C4 for ; Mon, 2 Oct 2023 20:56:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=EP55Ch+6FO4lvH3abz+ArIOf7f1CdzKwhlCd8aHISPM=; b=a8e0wbPgn+mfRu GhVtIs5sWQceuzKkyjLq2J3bdP/25PKAuyhhDZshB4NX9rNBJqf75glL633CDEE0836ZZm52rPVnL psGkJyzxpaQ+b89d+namEo3UD8zzDsZ7rRooe3oKfSpIuu8xIc93EfMosz31R3xPYm+Jo77P8ys4J E5YKIFOEre8lNIQjBQMfz/pGJKJZQ+f127Y79hBDElYWeqHHmbpoPVYvvRw4/F5oVJuhCXYfG2op5 H1zYM6bLQ1sXI8XJYCvWWE9wYFTNYhvxLPKaWdXJVrL6cfq6Ioz6DlfpD4SGQ2aTSrHTgBXwr7sb0 IEJjQavs0ZsggjUztmFQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qnPxS-00DMVS-2g; Mon, 02 Oct 2023 20:56:02 +0000 Received: from sin.source.kernel.org ([2604:1380:40e1:4800::1]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qnPxQ-00DMTe-0e for linux-arm-kernel@lists.infradead.org; Mon, 02 Oct 2023 20:56:01 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 5B277CE1276; Mon, 2 Oct 2023 20:55:58 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3E7B0C433C8; Mon, 2 Oct 2023 20:55:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1696280157; bh=3SUjHS1R/+k33+41I8df1OAaO4gb+JCavb+GatMXfr8=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=Ts6e8OPAXbwJSqbHZh7OB/J5bL/OHFILZtb1yBVm7HXPB1PZk/XGQ7AuIW4n29dj+ ecoBTO+7hrPW8Q6xuPPASkVTEUpIET4SQ0Jsvd2gVlk1zyw1YTaRy14t4smDjHCbYx Ip/BJuo0W6EjA2rvCbaan0iEIW+cj78pq0AqAEptDJPl392/1LNQKv84du3Y6mEcD5 kLx5VdsMxdIHgNASSD2ZmOJqOflab/gjsH9hwidf2wGhMgu6x7m8pUtG4MO1ahLvP5 y4L8a3M2ByHooguBVfjxXHjB0K4VvDBx4MXBRBHPNchRHELaiLL3HcPvunO0YVRUT/ sMrIc2mpMLNtQ== Date: Mon, 2 Oct 2023 13:55:51 -0700 From: Jakub Kicinski To: Serge Semin Cc: Rohan G Thomas , "David S . Miller" , Alexandre Torgue , Jose Abreu , Eric Dumazet , Paolo Abeni , Maxime Coquelin , netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andy Shevchenko Subject: Re: [PATCH net-next 1/1] net: stmmac: xgmac: EST interrupts handling Message-ID: <20231002135551.020f180c@kernel.org> In-Reply-To: References: <20230923031031.21434-1-rohan.g.thomas@intel.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231002_135600_411431_C0D8F59F X-CRM114-Status: GOOD ( 17.17 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, 26 Sep 2023 14:25:56 +0300 Serge Semin wrote: > On Sat, Sep 23, 2023 at 11:10:31AM +0800, Rohan G Thomas wrote: > > Enabled the following EST related interrupts: > > 1) Constant Gate Control Error (CGCE) > > 2) Head-of-Line Blocking due to Scheduling (HLBS) > > 3) Head-of-Line Blocking due to Frame Size (HLBF) > > 4) Base Time Register error (BTRE) > > 5) Switch to S/W owned list Complete (SWLC) > > Also, add EST errors into the ethtool statistic. > > > > The commit e49aa315cb01 ("net: stmmac: EST interrupts handling and > > error reporting") and commit 9f298959191b ("net: stmmac: Add EST > > errors into ethtool statistic") add EST interrupts handling and error > > reporting support to DWMAC4 core. This patch enables the same support > > for XGMAC. > > So, this is basically a copy of what was done for the DW QoS Eth > IP-core (DW GMAC v4.x/v5.x). IMO it would be better to factor it out > into a separate module together with the rest of the setup methods > like it's done for TC or PTP. But since it implies some much more work > I guess we can leave it as is for now... I think we can push back a little harder. At the very least we should get a clear explanation why this copy'n'paste is needed, i.e. what are the major differences. No? _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3016920309; Mon, 2 Oct 2023 20:55:57 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3E7B0C433C8; Mon, 2 Oct 2023 20:55:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1696280157; bh=3SUjHS1R/+k33+41I8df1OAaO4gb+JCavb+GatMXfr8=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=Ts6e8OPAXbwJSqbHZh7OB/J5bL/OHFILZtb1yBVm7HXPB1PZk/XGQ7AuIW4n29dj+ ecoBTO+7hrPW8Q6xuPPASkVTEUpIET4SQ0Jsvd2gVlk1zyw1YTaRy14t4smDjHCbYx Ip/BJuo0W6EjA2rvCbaan0iEIW+cj78pq0AqAEptDJPl392/1LNQKv84du3Y6mEcD5 kLx5VdsMxdIHgNASSD2ZmOJqOflab/gjsH9hwidf2wGhMgu6x7m8pUtG4MO1ahLvP5 y4L8a3M2ByHooguBVfjxXHjB0K4VvDBx4MXBRBHPNchRHELaiLL3HcPvunO0YVRUT/ sMrIc2mpMLNtQ== Date: Mon, 2 Oct 2023 13:55:51 -0700 From: Jakub Kicinski To: Serge Semin Cc: Rohan G Thomas , "David S . Miller" , Alexandre Torgue , Jose Abreu , Eric Dumazet , Paolo Abeni , Maxime Coquelin , netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andy Shevchenko Subject: Re: [PATCH net-next 1/1] net: stmmac: xgmac: EST interrupts handling Message-ID: <20231002135551.020f180c@kernel.org> In-Reply-To: References: <20230923031031.21434-1-rohan.g.thomas@intel.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Tue, 26 Sep 2023 14:25:56 +0300 Serge Semin wrote: > On Sat, Sep 23, 2023 at 11:10:31AM +0800, Rohan G Thomas wrote: > > Enabled the following EST related interrupts: > > 1) Constant Gate Control Error (CGCE) > > 2) Head-of-Line Blocking due to Scheduling (HLBS) > > 3) Head-of-Line Blocking due to Frame Size (HLBF) > > 4) Base Time Register error (BTRE) > > 5) Switch to S/W owned list Complete (SWLC) > > Also, add EST errors into the ethtool statistic. > > > > The commit e49aa315cb01 ("net: stmmac: EST interrupts handling and > > error reporting") and commit 9f298959191b ("net: stmmac: Add EST > > errors into ethtool statistic") add EST interrupts handling and error > > reporting support to DWMAC4 core. This patch enables the same support > > for XGMAC. > > So, this is basically a copy of what was done for the DW QoS Eth > IP-core (DW GMAC v4.x/v5.x). IMO it would be better to factor it out > into a separate module together with the rest of the setup methods > like it's done for TC or PTP. But since it implies some much more work > I guess we can leave it as is for now... I think we can push back a little harder. At the very least we should get a clear explanation why this copy'n'paste is needed, i.e. what are the major differences. No?