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[185.176.79.56]) by mx.google.com with ESMTPS id r16-20020a5d4990000000b0031934aaa84esi12973154wrq.161.2023.10.02.09.20.27 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 02 Oct 2023 09:20:27 -0700 (PDT) Received-SPF: pass (google.com: domain of jonathan.cameron@huawei.com designates 185.176.79.56 as permitted sender) client-ip=185.176.79.56; Authentication-Results: mx.google.com; spf=pass (google.com: domain of jonathan.cameron@huawei.com designates 185.176.79.56 as permitted sender) smtp.mailfrom=jonathan.cameron@huawei.com; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=huawei.com Received: from lhrpeml500005.china.huawei.com (unknown [172.18.147.226]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4RzmMJ1HPtz6HJZN; Tue, 3 Oct 2023 00:17:48 +0800 (CST) Received: from localhost (10.202.227.76) by lhrpeml500005.china.huawei.com (7.191.163.240) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.31; Mon, 2 Oct 2023 17:20:25 +0100 Date: Mon, 2 Oct 2023 17:20:24 +0100 From: Jonathan Cameron To: Salil Mehta CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: Re: [PATCH V2 08/10] physmem: Add helper function to destroy CPU AddressSpace Message-ID: <20231002172024.000042aa@Huawei.com> In-Reply-To: <20230930001933.2660-9-salil.mehta@huawei.com> References: <20230930001933.2660-1-salil.mehta@huawei.com> <20230930001933.2660-9-salil.mehta@huawei.com> Organization: Huawei Technologies Research and Development (UK) Ltd. X-Mailer: Claws Mail 4.1.0 (GTK 3.24.33; x86_64-w64-mingw32) MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.202.227.76] X-ClientProxiedBy: lhrpeml100006.china.huawei.com (7.191.160.224) To lhrpeml500005.china.huawei.com (7.191.163.240) X-CFilter-Loop: Reflected X-TUID: ki2tU40LiY9W On Sat, 30 Sep 2023 01:19:31 +0100 Salil Mehta wrote: > Virtual CPU Hot-unplug leads to unrealization of a CPU object. This also > involves destruction of the CPU AddressSpace. Add common function to help > destroy the CPU AddressSpace. > > Signed-off-by: Salil Mehta I'm not that familiar with this bit of the code, so no tag, but as far as I can tell from a fairly superficial look, this is good. > --- > include/exec/cpu-common.h | 8 ++++++++ > include/hw/core/cpu.h | 1 + > softmmu/physmem.c | 25 +++++++++++++++++++++++++ > 3 files changed, 34 insertions(+) > > diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h > index 41788c0bdd..eb56a228a2 100644 > --- a/include/exec/cpu-common.h > +++ b/include/exec/cpu-common.h > @@ -120,6 +120,14 @@ size_t qemu_ram_pagesize_largest(void); > */ > void cpu_address_space_init(CPUState *cpu, int asidx, > const char *prefix, MemoryRegion *mr); > +/** > + * cpu_address_space_destroy: > + * @cpu: CPU for which address space needs to be destroyed > + * @asidx: integer index of this address space > + * > + * Note that with KVM only one address space is supported. > + */ > +void cpu_address_space_destroy(CPUState *cpu, int asidx); > > void cpu_physical_memory_rw(hwaddr addr, void *buf, > hwaddr len, bool is_write); > diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h > index 648b5b3586..65d2ae4581 100644 > --- a/include/hw/core/cpu.h > +++ b/include/hw/core/cpu.h > @@ -355,6 +355,7 @@ struct CPUState { > QSIMPLEQ_HEAD(, qemu_work_item) work_list; > > CPUAddressSpace *cpu_ases; > + int cpu_ases_count; > int num_ases; > AddressSpace *as; > MemoryRegion *memory; > diff --git a/softmmu/physmem.c b/softmmu/physmem.c > index 4f6ca653b3..4dfa0ca66f 100644 > --- a/softmmu/physmem.c > +++ b/softmmu/physmem.c > @@ -761,6 +761,7 @@ void cpu_address_space_init(CPUState *cpu, int asidx, > > if (!cpu->cpu_ases) { > cpu->cpu_ases = g_new0(CPUAddressSpace, cpu->num_ases); > + cpu->cpu_ases_count = cpu->num_ases; > } > > newas = &cpu->cpu_ases[asidx]; > @@ -774,6 +775,30 @@ void cpu_address_space_init(CPUState *cpu, int asidx, > } > } > > +void cpu_address_space_destroy(CPUState *cpu, int asidx) > +{ > + CPUAddressSpace *cpuas; > + > + assert(asidx < cpu->num_ases); > + assert(asidx == 0 || !kvm_enabled()); > + assert(cpu->cpu_ases); > + > + cpuas = &cpu->cpu_ases[asidx]; > + if (tcg_enabled()) { > + memory_listener_unregister(&cpuas->tcg_as_listener); > + } > + > + address_space_destroy(cpuas->as); > + g_free_rcu(cpuas->as, rcu); > + > + if (cpu->cpu_ases_count == 1) { > + g_free(cpu->cpu_ases); > + cpu->cpu_ases = NULL; > + } > + > + cpu->cpu_ases_count--; > +} > + > AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx) > { > /* Return the AddressSpace corresponding to the specified index */ From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 26F36E748F6 for ; Mon, 2 Oct 2023 16:21:24 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qnLf8-00044M-0f; Mon, 02 Oct 2023 12:20:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qnLet-00043U-OS; Mon, 02 Oct 2023 12:20:36 -0400 Received: from frasgout.his.huawei.com ([185.176.79.56]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qnLen-0002ab-Pw; Mon, 02 Oct 2023 12:20:34 -0400 Received: from lhrpeml500005.china.huawei.com (unknown [172.18.147.226]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4RzmMJ1HPtz6HJZN; Tue, 3 Oct 2023 00:17:48 +0800 (CST) Received: from localhost (10.202.227.76) by lhrpeml500005.china.huawei.com (7.191.163.240) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.31; Mon, 2 Oct 2023 17:20:25 +0100 Date: Mon, 2 Oct 2023 17:20:24 +0100 To: Salil Mehta CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: Re: [PATCH V2 08/10] physmem: Add helper function to destroy CPU AddressSpace Message-ID: <20231002172024.000042aa@Huawei.com> In-Reply-To: <20230930001933.2660-9-salil.mehta@huawei.com> References: <20230930001933.2660-1-salil.mehta@huawei.com> <20230930001933.2660-9-salil.mehta@huawei.com> Organization: Huawei Technologies Research and Development (UK) Ltd. X-Mailer: Claws Mail 4.1.0 (GTK 3.24.33; x86_64-w64-mingw32) MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.202.227.76] X-ClientProxiedBy: lhrpeml100006.china.huawei.com (7.191.160.224) To lhrpeml500005.china.huawei.com (7.191.163.240) X-CFilter-Loop: Reflected Received-SPF: pass client-ip=185.176.79.56; envelope-from=jonathan.cameron@huawei.com; helo=frasgout.his.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jonathan Cameron From: Jonathan Cameron via Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Sat, 30 Sep 2023 01:19:31 +0100 Salil Mehta wrote: > Virtual CPU Hot-unplug leads to unrealization of a CPU object. This also > involves destruction of the CPU AddressSpace. Add common function to help > destroy the CPU AddressSpace. > > Signed-off-by: Salil Mehta I'm not that familiar with this bit of the code, so no tag, but as far as I can tell from a fairly superficial look, this is good. > --- > include/exec/cpu-common.h | 8 ++++++++ > include/hw/core/cpu.h | 1 + > softmmu/physmem.c | 25 +++++++++++++++++++++++++ > 3 files changed, 34 insertions(+) > > diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h > index 41788c0bdd..eb56a228a2 100644 > --- a/include/exec/cpu-common.h > +++ b/include/exec/cpu-common.h > @@ -120,6 +120,14 @@ size_t qemu_ram_pagesize_largest(void); > */ > void cpu_address_space_init(CPUState *cpu, int asidx, > const char *prefix, MemoryRegion *mr); > +/** > + * cpu_address_space_destroy: > + * @cpu: CPU for which address space needs to be destroyed > + * @asidx: integer index of this address space > + * > + * Note that with KVM only one address space is supported. > + */ > +void cpu_address_space_destroy(CPUState *cpu, int asidx); > > void cpu_physical_memory_rw(hwaddr addr, void *buf, > hwaddr len, bool is_write); > diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h > index 648b5b3586..65d2ae4581 100644 > --- a/include/hw/core/cpu.h > +++ b/include/hw/core/cpu.h > @@ -355,6 +355,7 @@ struct CPUState { > QSIMPLEQ_HEAD(, qemu_work_item) work_list; > > CPUAddressSpace *cpu_ases; > + int cpu_ases_count; > int num_ases; > AddressSpace *as; > MemoryRegion *memory; > diff --git a/softmmu/physmem.c b/softmmu/physmem.c > index 4f6ca653b3..4dfa0ca66f 100644 > --- a/softmmu/physmem.c > +++ b/softmmu/physmem.c > @@ -761,6 +761,7 @@ void cpu_address_space_init(CPUState *cpu, int asidx, > > if (!cpu->cpu_ases) { > cpu->cpu_ases = g_new0(CPUAddressSpace, cpu->num_ases); > + cpu->cpu_ases_count = cpu->num_ases; > } > > newas = &cpu->cpu_ases[asidx]; > @@ -774,6 +775,30 @@ void cpu_address_space_init(CPUState *cpu, int asidx, > } > } > > +void cpu_address_space_destroy(CPUState *cpu, int asidx) > +{ > + CPUAddressSpace *cpuas; > + > + assert(asidx < cpu->num_ases); > + assert(asidx == 0 || !kvm_enabled()); > + assert(cpu->cpu_ases); > + > + cpuas = &cpu->cpu_ases[asidx]; > + if (tcg_enabled()) { > + memory_listener_unregister(&cpuas->tcg_as_listener); > + } > + > + address_space_destroy(cpuas->as); > + g_free_rcu(cpuas->as, rcu); > + > + if (cpu->cpu_ases_count == 1) { > + g_free(cpu->cpu_ases); > + cpu->cpu_ases = NULL; > + } > + > + cpu->cpu_ases_count--; > +} > + > AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx) > { > /* Return the AddressSpace corresponding to the specified index */