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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BL02EPF0001A0F9.mail.protection.outlook.com (10.167.242.100) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6838.14 via Frontend Transport; Fri, 6 Oct 2023 18:51:23 +0000 Received: from AUS-P9-MLIMONCI.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Fri, 6 Oct 2023 13:50:54 -0500 From: Mario Limonciello To: Subject: [PATCH v5 6/7] drm/amd/display: Destroy DC context while keeping DML and DML2 Date: Fri, 6 Oct 2023 13:50:25 -0500 Message-ID: <20231006185026.5536-7-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231006185026.5536-1-mario.limonciello@amd.com> References: <20231006185026.5536-1-mario.limonciello@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0001A0F9:EE_|SA3PR12MB7832:EE_ X-MS-Office365-Filtering-Correlation-Id: fa6c1386-8768-4eae-d777-08dbc69d3ca4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Oct 2023 18:51:23.2189 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: fa6c1386-8768-4eae-d777-08dbc69d3ca4 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A0F9.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB7832 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Harry.Wentland@amd.com, Mario Limonciello Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" If there is memory pressure at suspend time then dynamically allocating a large structure as part of DC suspend code will fail. Instead re-use the same structures and clear all members except those that should be maintained. Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2362 Signed-off-by: Mario Limonciello --- v4->v5: * Rebase for DML2 --- drivers/gpu/drm/amd/display/dc/core/dc.c | 37 ------------------- .../gpu/drm/amd/display/dc/core/dc_resource.c | 12 ++++++ 2 files changed, 12 insertions(+), 37 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c index 2436a293931b..55e7b5a8ec8e 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c @@ -4704,12 +4704,6 @@ bool dc_set_power_state( struct dc *dc, enum dc_acpi_cm_power_state power_state) { - struct kref refcount; - struct display_mode_lib *dml; -#ifdef CONFIG_DRM_AMD_DC_FP - struct dml2_context *dml2 = NULL; -#endif - if (!dc->current_state) return true; @@ -4728,40 +4722,9 @@ bool dc_set_power_state( break; default: -#ifdef CONFIG_DRM_AMD_DC_FP - if (dc->debug.using_dml2) - dml2 = dc->current_state->bw_ctx.dml2; -#endif ASSERT(dc->current_state->stream_count == 0); - /* Zero out the current context so that on resume we start with - * clean state, and dc hw programming optimizations will not - * cause any trouble. - */ - dml = kzalloc(sizeof(struct display_mode_lib), - GFP_KERNEL); - - ASSERT(dml); - if (!dml) - return false; - - /* Preserve refcount */ - refcount = dc->current_state->refcount; - /* Preserve display mode lib */ - memcpy(dml, &dc->current_state->bw_ctx.dml, sizeof(struct display_mode_lib)); dc_resource_state_destruct(dc->current_state); - memset(dc->current_state, 0, - sizeof(*dc->current_state)); - - dc->current_state->refcount = refcount; - dc->current_state->bw_ctx.dml = *dml; - - kfree(dml); - -#ifdef CONFIG_DRM_AMD_DC_FP - if (dc->debug.using_dml2) - dc->current_state->bw_ctx.dml2 = dml2; -#endif break; } diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c index c1e2f0e10ab2..e2c7acdff301 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c @@ -4357,6 +4357,18 @@ void dc_resource_state_destruct(struct dc_state *context) context->streams[i] = NULL; } context->stream_count = 0; + context->stream_mask = 0; + memset(&context->res_ctx, 0, sizeof(context->res_ctx)); + memset(&context->pp_display_cfg, 0, sizeof(context->pp_display_cfg)); + memset(&context->dcn_bw_vars, 0, sizeof(context->dcn_bw_vars)); + context->clk_mgr = NULL; + memset(&context->bw_ctx.bw, 0, sizeof(context->bw_ctx.bw)); + memset(context->block_sequence, 0, sizeof(context->block_sequence)); + context->block_sequence_steps = 0; + memset(context->dc_dmub_cmd, 0, sizeof(context->dc_dmub_cmd)); + context->dmub_cmd_count = 0; + memset(&context->perf_params, 0, sizeof(context->perf_params)); + memset(&context->scratch, 0, sizeof(context->scratch)); } void dc_resource_state_copy_construct( -- 2.34.1