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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?BrbU3VsCmVjYWRdvcMBRl8/aYPlhiJJVzUe9EduJSsivuKz8+oGlB/2ML+Md?= =?us-ascii?Q?SZF/25whCD7CdSdfY4azfmxJYsJ/oVK5hXr5svPrK70ExbqEfK8ObCkR6Tr6?= =?us-ascii?Q?ILPXOfk8va1EfSx6wqG2p0051XmR2RAj5ZfSXXOT1Cm9ZhCpCWE6p4x1Fr83?= =?us-ascii?Q?nGYgQRWdJr6+na7pEvLu2SNaM4h833Ry56iKgGZE6IAOPlZSAlXoaDKpuCC5?= =?us-ascii?Q?8lvShpQLWNSFnXUmoCBtbq4KOqGx+f66eYHbVuc6xUCrOsTelJ4QzeO8BaXu?= =?us-ascii?Q?B1lQkIzqEDogml/IKM2F6sJTXgp9kKgMJscKTSQTIPiO2gIyz5kienUoTO7M?= =?us-ascii?Q?q4ZsQHnNzdsJpjtAQF+HNRCOOD8Tmbolsm+XmdD/Q/jqUoP/CxuYSxK2TWm/?= =?us-ascii?Q?0i41FRVdjUj1N23Z0slfbH+OWtYECqcbUurEO0vYy8QDBPJ4eIlTfd8co8+O?= =?us-ascii?Q?fdyZcm75o4bSHfOX8+MhPqMLvPpcx0Mn3jsUW5xjP8ic8HlFYrd3L629aNyI?= =?us-ascii?Q?NS1AqTXW7bu4rZo7AoYYBswHtoanUtYafYDHoLZAC4XK+TQtIrGcMRwb5KPe?= =?us-ascii?Q?vCVp7UcIpvE4Iax7hHNTF+J/qKJSlXWi3bPGRdOzf/0ik3wdISFyWk6+A+zq?= =?us-ascii?Q?o4Kticnby6iDsb+x4fgdIeD2htZfYX9zaJPTvJ6CLEEGxeFydI57BvGEmodx?= =?us-ascii?Q?gZRslGpb4UJCsISwUJvSRD+nATLeyUcL4Qe1bzjxyF3wtAhmLIGBp2gMggLv?= =?us-ascii?Q?SdF4b/cKimcLr0I4Y7s//rj+CZO9TOhuHcJp8X2/MDvorX2qCiRXbkiTk5bq?= =?us-ascii?Q?lcjwA+4cIqU2Ocey4lVTyyBzcck87ZASAVxGYLnBuPSLRcdU3lgabn1d8Jmh?= =?us-ascii?Q?T9WAAJimeNUOXAWeplgKXjlMP0cg5Zynk7mWaLdixzY6XwQYe7YMI378UQjV?= =?us-ascii?Q?5wnFsiUrBCy55T1fFMQvdIZUhfzN0uzY6JiMR0BGJ7oq6uDiGyAlvTh3vmsl?= =?us-ascii?Q?SOMtumQXKazva3RNZvZtMFGl5aM7KMEiqDyaTkIMAQuQmxkAqeqlfJrYLgiH?= =?us-ascii?Q?Bxckmi/5yl9jkEtJKA7hlFtaHHelN4M4FiMa9//hiEkMIEjnGdyfycCbIaLy?= =?us-ascii?Q?oqpPOM44pLwtc5BodqY9XrR6pHcWEfsBqXzWhFe+jnNaSCtVY6clrbdnO1qu?= =?us-ascii?Q?99SW6CGX34fFfDOa0vmkIwokFdt67rqxqgAuOtJ+CrcvREmMZfX8TzB7PfIm?= =?us-ascii?Q?NdvtgPuGVy3vmVGwR9ZXq2N4S4vkGhPJf/lRmp4ZwindlWchT8K4TesHmOtC?= =?us-ascii?Q?snkRhW0myeBsnGH1T0HOaSmcIMC3SEJDkddqcnt64mIumMorIhkc3H8+mSEb?= =?us-ascii?Q?T+7bF+jAzLZTld1cW4SlUuM9MWEkHu1nBpB3lUqAbQj8CuUA2LBf5m+dPz+G?= =?us-ascii?Q?RUt7xKQWVcD45nlLO5r9CCxbFh/EMZrYQfxG0CGBSpmQH/D1z9eRPfFVBRL6?= =?us-ascii?Q?Jv+kCtDcJAH4gzXr+5aBvYVS4WGt0f9+Arl78xzsRNsvqXUVY7XfyJ8Qe+Wl?= =?us-ascii?Q?+S1ZyfY3L6C1o5Mcc1I=3D?= X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: 6ea2dfef-53a4-4332-d258-08dbcbf4c27d X-MS-Exchange-CrossTenant-AuthSource: LV2PR12MB5869.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2023 14:00:30.4496 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: qyv1nFhdqeVqlpNul7YmYWGU2ubfd3ghSSwwuCbbiXgWcD881xpLL6R7ghyH7epb X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB6272 On Fri, Oct 13, 2023 at 11:37:35AM +0100, Will Deacon wrote: > > -static __le64 *arm_smmu_get_step_for_sid(struct arm_smmu_device *smmu, u32 sid) > > +static struct arm_smmu_ste * > > +arm_smmu_get_step_for_sid(struct arm_smmu_device *smmu, u32 sid) > > { > > - __le64 *step; > > struct arm_smmu_strtab_cfg *cfg = &smmu->strtab_cfg; > > > > if (smmu->features & ARM_SMMU_FEAT_2_LVL_STRTAB) { > > - struct arm_smmu_strtab_l1_desc *l1_desc; > > int idx; > > > > /* Two-level walk */ > > idx = (sid >> STRTAB_SPLIT) * STRTAB_L1_DESC_DWORDS; > > - l1_desc = &cfg->l1_desc[idx]; > > - idx = (sid & ((1 << STRTAB_SPLIT) - 1)) * STRTAB_STE_DWORDS; > > - step = &l1_desc->l2ptr[idx]; > > + return &cfg->l1_desc[idx].l2ptr[sid & ((1 << STRTAB_SPLIT) - 1)]; > > } else { > > /* Simple linear lookup */ > > - step = &cfg->strtab[sid * STRTAB_STE_DWORDS]; > > + return (struct arm_smmu_ste *)&cfg > > + ->strtab[sid * STRTAB_STE_DWORDS]; > > Why not change the type of 'struct arm_smmu_strtab_cfg::strtab' at the same > time? It doesn't always point at a STE. arm_smmu_init_strtab_2lvl() sets strtab to: l1size = cfg->num_l1_ents * (STRTAB_L1_DESC_DWORDS << 3); strtab = dmam_alloc_coherent(smmu->dev, l1size, &cfg->strtab_dma, GFP_KERNEL); cfg->strtab = strtab; And arm_smmu_init_strtab_linear() sets strtab to: size = (1 << smmu->sid_bits) * (STRTAB_STE_DWORDS << 3); strtab = dmam_alloc_coherent(smmu->dev, size, &cfg->strtab_dma, GFP_KERNEL); cfg->strtab = strtab; I can add this patch if you like immediately after: diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index d5ba85034c1386..bdb559878615b8 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -1559,7 +1559,7 @@ static int arm_smmu_init_l2_strtab(struct arm_smmu_device *smmu, u32 sid) return 0; size = 1 << (STRTAB_SPLIT + ilog2(STRTAB_STE_DWORDS) + 3); - strtab = &cfg->strtab[(sid >> STRTAB_SPLIT) * STRTAB_L1_DESC_DWORDS]; + strtab = &cfg->strtab.l1_desc[sid >> STRTAB_SPLIT]; desc->span = STRTAB_SPLIT + 1; desc->l2ptr = dmam_alloc_coherent(smmu->dev, size, &desc->l2ptr_dma, @@ -2347,8 +2347,7 @@ arm_smmu_get_step_for_sid(struct arm_smmu_device *smmu, u32 sid) return &cfg->l1_desc[idx].l2ptr[sid & ((1 << STRTAB_SPLIT) - 1)]; } else { /* Simple linear lookup */ - return (struct arm_smmu_ste *)&cfg - ->strtab[sid * STRTAB_STE_DWORDS]; + return &cfg->strtab.linear[sid * STRTAB_STE_DWORDS]; } } @@ -3421,17 +3420,15 @@ static int arm_smmu_init_l1_strtab(struct arm_smmu_device *smmu) { unsigned int i; struct arm_smmu_strtab_cfg *cfg = &smmu->strtab_cfg; - void *strtab = smmu->strtab_cfg.strtab; cfg->l1_desc = devm_kcalloc(smmu->dev, cfg->num_l1_ents, sizeof(*cfg->l1_desc), GFP_KERNEL); if (!cfg->l1_desc) return -ENOMEM; - for (i = 0; i < cfg->num_l1_ents; ++i) { - arm_smmu_write_strtab_l1_desc(strtab, &cfg->l1_desc[i]); - strtab += STRTAB_L1_DESC_DWORDS << 3; - } + for (i = 0; i < cfg->num_l1_ents; ++i) + arm_smmu_write_strtab_l1_desc( + &smmu->strtab_cfg.strtab.l1_desc[i], &cfg->l1_desc[i]); return 0; } @@ -3463,7 +3460,7 @@ static int arm_smmu_init_strtab_2lvl(struct arm_smmu_device *smmu) l1size); return -ENOMEM; } - cfg->strtab = strtab; + cfg->strtab.l1_desc = strtab; /* Configure strtab_base_cfg for 2 levels */ reg = FIELD_PREP(STRTAB_BASE_CFG_FMT, STRTAB_BASE_CFG_FMT_2LVL); @@ -3490,7 +3487,7 @@ static int arm_smmu_init_strtab_linear(struct arm_smmu_device *smmu) size); return -ENOMEM; } - cfg->strtab = strtab; + cfg->strtab.linear = strtab; cfg->num_l1_ents = 1 << smmu->sid_bits; /* Configure strtab_base_cfg for a linear table covering all SIDs */ diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index 74f6f9e28c6e84..6d75adb1a72b4f 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -620,7 +620,10 @@ struct arm_smmu_s2_cfg { }; struct arm_smmu_strtab_cfg { - __le64 *strtab; + union { + struct arm_smmu_ste *linear; + __le64 *l1_desc; + } strtab; dma_addr_t strtab_dma; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Oct 13, 2023 at 11:37:35AM +0100, Will Deacon wrote: > > -static __le64 *arm_smmu_get_step_for_sid(struct arm_smmu_device *smmu, u32 sid) > > +static struct arm_smmu_ste * > > +arm_smmu_get_step_for_sid(struct arm_smmu_device *smmu, u32 sid) > > { > > - __le64 *step; > > struct arm_smmu_strtab_cfg *cfg = &smmu->strtab_cfg; > > > > if (smmu->features & ARM_SMMU_FEAT_2_LVL_STRTAB) { > > - struct arm_smmu_strtab_l1_desc *l1_desc; > > int idx; > > > > /* Two-level walk */ > > idx = (sid >> STRTAB_SPLIT) * STRTAB_L1_DESC_DWORDS; > > - l1_desc = &cfg->l1_desc[idx]; > > - idx = (sid & ((1 << STRTAB_SPLIT) - 1)) * STRTAB_STE_DWORDS; > > - step = &l1_desc->l2ptr[idx]; > > + return &cfg->l1_desc[idx].l2ptr[sid & ((1 << STRTAB_SPLIT) - 1)]; > > } else { > > /* Simple linear lookup */ > > - step = &cfg->strtab[sid * STRTAB_STE_DWORDS]; > > + return (struct arm_smmu_ste *)&cfg > > + ->strtab[sid * STRTAB_STE_DWORDS]; > > Why not change the type of 'struct arm_smmu_strtab_cfg::strtab' at the same > time? It doesn't always point at a STE. arm_smmu_init_strtab_2lvl() sets strtab to: l1size = cfg->num_l1_ents * (STRTAB_L1_DESC_DWORDS << 3); strtab = dmam_alloc_coherent(smmu->dev, l1size, &cfg->strtab_dma, GFP_KERNEL); cfg->strtab = strtab; And arm_smmu_init_strtab_linear() sets strtab to: size = (1 << smmu->sid_bits) * (STRTAB_STE_DWORDS << 3); strtab = dmam_alloc_coherent(smmu->dev, size, &cfg->strtab_dma, GFP_KERNEL); cfg->strtab = strtab; I can add this patch if you like immediately after: diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index d5ba85034c1386..bdb559878615b8 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -1559,7 +1559,7 @@ static int arm_smmu_init_l2_strtab(struct arm_smmu_device *smmu, u32 sid) return 0; size = 1 << (STRTAB_SPLIT + ilog2(STRTAB_STE_DWORDS) + 3); - strtab = &cfg->strtab[(sid >> STRTAB_SPLIT) * STRTAB_L1_DESC_DWORDS]; + strtab = &cfg->strtab.l1_desc[sid >> STRTAB_SPLIT]; desc->span = STRTAB_SPLIT + 1; desc->l2ptr = dmam_alloc_coherent(smmu->dev, size, &desc->l2ptr_dma, @@ -2347,8 +2347,7 @@ arm_smmu_get_step_for_sid(struct arm_smmu_device *smmu, u32 sid) return &cfg->l1_desc[idx].l2ptr[sid & ((1 << STRTAB_SPLIT) - 1)]; } else { /* Simple linear lookup */ - return (struct arm_smmu_ste *)&cfg - ->strtab[sid * STRTAB_STE_DWORDS]; + return &cfg->strtab.linear[sid * STRTAB_STE_DWORDS]; } } @@ -3421,17 +3420,15 @@ static int arm_smmu_init_l1_strtab(struct arm_smmu_device *smmu) { unsigned int i; struct arm_smmu_strtab_cfg *cfg = &smmu->strtab_cfg; - void *strtab = smmu->strtab_cfg.strtab; cfg->l1_desc = devm_kcalloc(smmu->dev, cfg->num_l1_ents, sizeof(*cfg->l1_desc), GFP_KERNEL); if (!cfg->l1_desc) return -ENOMEM; - for (i = 0; i < cfg->num_l1_ents; ++i) { - arm_smmu_write_strtab_l1_desc(strtab, &cfg->l1_desc[i]); - strtab += STRTAB_L1_DESC_DWORDS << 3; - } + for (i = 0; i < cfg->num_l1_ents; ++i) + arm_smmu_write_strtab_l1_desc( + &smmu->strtab_cfg.strtab.l1_desc[i], &cfg->l1_desc[i]); return 0; } @@ -3463,7 +3460,7 @@ static int arm_smmu_init_strtab_2lvl(struct arm_smmu_device *smmu) l1size); return -ENOMEM; } - cfg->strtab = strtab; + cfg->strtab.l1_desc = strtab; /* Configure strtab_base_cfg for 2 levels */ reg = FIELD_PREP(STRTAB_BASE_CFG_FMT, STRTAB_BASE_CFG_FMT_2LVL); @@ -3490,7 +3487,7 @@ static int arm_smmu_init_strtab_linear(struct arm_smmu_device *smmu) size); return -ENOMEM; } - cfg->strtab = strtab; + cfg->strtab.linear = strtab; cfg->num_l1_ents = 1 << smmu->sid_bits; /* Configure strtab_base_cfg for a linear table covering all SIDs */ diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index 74f6f9e28c6e84..6d75adb1a72b4f 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -620,7 +620,10 @@ struct arm_smmu_s2_cfg { }; struct arm_smmu_strtab_cfg { - __le64 *strtab; + union { + struct arm_smmu_ste *linear; + __le64 *l1_desc; + } strtab; dma_addr_t strtab_dma; struct arm_smmu_strtab_l1_desc *l1_desc; unsigned int num_l1_ents; _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel