From: Lukas Wunner <lukas@wunner.de>
To: Logan Gunthorpe <logang@deltatee.com>
Cc: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Simon Richter" <sjr@debian.org>,
1015871@bugs.debian.org, linux-pci@vger.kernel.org,
"Alex Deucher" <alexander.deucher@amd.com>,
"Krzysztof Wilczy??ski" <kw@linux.com>,
"Emanuele Rocca" <ema@debian.org>
Subject: Re: Enabling PCI_P2PDMA for distro kernels?
Date: Wed, 25 Oct 2023 19:11:26 +0200 [thread overview]
Message-ID: <20231025171126.GA9661@wunner.de> (raw)
In-Reply-To: <b909a5e6-841a-44e4-a21f-e3cddbf71816@deltatee.com>
On Wed, Oct 25, 2023 at 10:30:07AM -0600, Logan Gunthorpe wrote:
> In addition to the above, P2PDMA transfers are only allowed by the
> kernel for traffic that flows through certain host bridges that are
> known to work. For AMD, all modern CPUs are on this list, but for Intel,
> the list is very patchy.
This has recently been brought up internally at Intel and nobody could
understand why there's a whitelist in the first place. A long-time PCI
architect told me that Intel silicon validation has been testing P2PDMA
at least since the Lindenhurst days, i.e. since 2005.
What's the reason for the whitelist? Was there Intel hardware which
didn't support it or turned out to be broken?
I imagine (but am not certain) that the feature might only be enabled
for server SKUs, is that the reason?
Thanks,
Lukas
next prev parent reply other threads:[~2023-10-25 17:11 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-25 6:19 Enabling PCI_P2PDMA for distro kernels? Uwe Kleine-König
2023-10-25 16:30 ` Logan Gunthorpe
2023-10-25 17:11 ` Lukas Wunner [this message]
2023-10-25 17:35 ` Bjorn Helgaas
2023-10-25 17:58 ` Logan Gunthorpe
2023-10-25 23:40 ` Simon Richter
2023-10-25 17:47 ` Deucher, Alexander
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