From: Sunil V L <sunilvl@ventanamicro.com>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org, qemu-riscv@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Shannon Zhao" <shannon.zhaosl@gmail.com>,
"Michael S . Tsirkin" <mst@redhat.com>,
"Igor Mammedov" <imammedo@redhat.com>,
"Ani Sinha" <anisinha@redhat.com>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Eduardo Habkost" <eduardo@habkost.net>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Gerd Hoffmann" <kraxel@redhat.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Alistair Francis" <alistair.francis@wdc.com>,
"Bin Meng" <bin.meng@windriver.com>,
"Weiwei Li" <liweiwei@iscas.ac.cn>,
"Daniel Henrique Barboza" <dbarboza@ventanamicro.com>,
"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
"Anup Patel" <apatel@ventanamicro.com>,
"Atish Kumar Patra" <atishp@rivosinc.com>,
"Haibo Xu" <haibo1.xu@intel.com>,
"Sunil V L" <sunilvl@ventanamicro.com>,
"Andrew Jones" <ajones@ventanamicro.com>
Subject: [PATCH v4 13/13] hw/riscv/virt-acpi-build.c: Add PLIC in MADT
Date: Thu, 26 Oct 2023 01:37:13 +0530 [thread overview]
Message-ID: <20231025200713.580814-14-sunilvl@ventanamicro.com> (raw)
In-Reply-To: <20231025200713.580814-1-sunilvl@ventanamicro.com>
Add PLIC structures for each socket in the MADT when system is
configured with PLIC as the external interrupt controller.
Signed-off-by: Haibo Xu <haibo1.xu@intel.com>
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
hw/riscv/virt-acpi-build.c | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
index c410fe7d5c..cc934a5c4b 100644
--- a/hw/riscv/virt-acpi-build.c
+++ b/hw/riscv/virt-acpi-build.c
@@ -85,6 +85,12 @@ static void riscv_acpi_madt_add_rintc(uint32_t uid,
arch_ids->cpus[uid].props.node_id,
local_cpu_id),
4);
+ } else if (aia_type == VIRT_AIA_TYPE_NONE) {
+ build_append_int_noprefix(entry,
+ ACPI_BUILD_INTC_ID(
+ arch_ids->cpus[uid].props.node_id,
+ 2 * local_cpu_id + 1),
+ 4);
} else {
build_append_int_noprefix(entry, 0, 4);
}
@@ -515,6 +521,29 @@ static void build_madt(GArray *table_data,
build_append_int_noprefix(table_data,
s->memmap[VIRT_APLIC_S].size, 4);
}
+ } else {
+ /* PLICs */
+ for (socket = 0; socket < riscv_socket_count(ms); socket++) {
+ aplic_addr = s->memmap[VIRT_PLIC].base +
+ s->memmap[VIRT_PLIC].size * socket;
+ gsi_base = VIRT_IRQCHIP_NUM_SOURCES * socket;
+ build_append_int_noprefix(table_data, 0x1B, 1); /* Type */
+ build_append_int_noprefix(table_data, 36, 1); /* Length */
+ build_append_int_noprefix(table_data, 1, 1); /* Version */
+ build_append_int_noprefix(table_data, socket, 1); /* PLIC ID */
+ build_append_int_noprefix(table_data, 0, 8); /* Hardware ID */
+ /* Total External Interrupt Sources Supported */
+ build_append_int_noprefix(table_data,
+ VIRT_IRQCHIP_NUM_SOURCES - 1, 2);
+ build_append_int_noprefix(table_data, 0, 2); /* Max Priority */
+ build_append_int_noprefix(table_data, 0, 4); /* Flags */
+ /* PLIC Size */
+ build_append_int_noprefix(table_data, s->memmap[VIRT_PLIC].size, 4);
+ /* PLIC Address */
+ build_append_int_noprefix(table_data, aplic_addr, 8);
+ /* Global System Interrupt Vector Base */
+ build_append_int_noprefix(table_data, gsi_base, 4);
+ }
}
acpi_table_end(linker, &table);
--
2.39.2
next prev parent reply other threads:[~2023-10-25 20:15 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-25 20:07 [PATCH v4 00/13] RISC-V: ACPI: Enable AIA, PLIC and update RHCT Sunil V L
2023-10-25 20:07 ` [PATCH v4 01/13] hw/arm/virt-acpi-build.c: Migrate fw_cfg creation to common location Sunil V L
2023-10-26 8:15 ` Andrew Jones
2023-10-26 12:30 ` Sunil V L
2023-10-25 20:07 ` [PATCH v4 02/13] hw/arm/virt-acpi-build.c: Migrate virtio " Sunil V L
2023-10-25 20:07 ` [PATCH v4 03/13] hw/i386/acpi-microvm.c: Use common function to add virtio in DSDT Sunil V L
2023-10-30 2:21 ` Alistair Francis
2023-10-25 20:07 ` [PATCH v4 04/13] hw/riscv: virt: Make few IMSIC macros and functions public Sunil V L
2023-10-25 20:07 ` [PATCH v4 05/13] hw/riscv/virt-acpi-build.c: Add AIA support in RINTC Sunil V L
2023-10-26 8:46 ` Andrew Jones
2023-10-26 12:38 ` Sunil V L
2023-10-25 20:07 ` [PATCH v4 06/13] hw/riscv/virt-acpi-build.c: Add IMSIC in the MADT Sunil V L
2023-10-25 20:07 ` [PATCH v4 07/13] hw/riscv/virt-acpi-build.c: Add APLIC " Sunil V L
2023-10-25 20:07 ` [PATCH v4 08/13] hw/riscv/virt-acpi-build.c: Add CMO information in RHCT Sunil V L
2023-10-25 20:07 ` [PATCH v4 09/13] hw/riscv/virt-acpi-build.c: Add MMU node " Sunil V L
2023-10-26 8:31 ` Andrew Jones
2023-10-26 12:33 ` Sunil V L
2023-10-25 20:07 ` [PATCH v4 10/13] hw/pci-host/gpex: Define properties for MMIO ranges Sunil V L
2023-10-30 2:25 ` Alistair Francis
2023-10-25 20:07 ` [PATCH v4 11/13] hw/riscv/virt: Update GPEX MMIO related properties Sunil V L
2023-10-30 2:50 ` Alistair Francis
2023-10-25 20:07 ` [PATCH v4 12/13] hw/riscv/virt-acpi-build.c: Add IO controllers and devices Sunil V L
2023-10-30 3:06 ` Alistair Francis
2023-10-25 20:07 ` Sunil V L [this message]
2023-10-30 3:07 ` [PATCH v4 13/13] hw/riscv/virt-acpi-build.c: Add PLIC in MADT Alistair Francis
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