From: Gregory Etelson <getelson@nvidia.com>
To: <dev@dpdk.org>
Cc: <getelson@nvidia.com>, <mkashani@nvidia.com>,
<rasland@nvidia.com>, "Ori Kam" <orika@nvidia.com>,
Matan Azrad <matan@nvidia.com>,
Viacheslav Ovsiienko <viacheslavo@nvidia.com>,
Suanming Mou <suanmingm@nvidia.com>
Subject: [PATCH 07/30] net/mlx5: initialize HWS flow tags registers in shared dev context
Date: Sun, 29 Oct 2023 18:31:39 +0200 [thread overview]
Message-ID: <20231029163202.216450-7-getelson@nvidia.com> (raw)
In-Reply-To: <20231029163202.216450-1-getelson@nvidia.com>
Move HWS flow tags registers initialization to shared dev context.
Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
---
drivers/net/mlx5/linux/mlx5_os.c | 35 ++-------------
drivers/net/mlx5/mlx5.c | 75 ++++++++++++++++++++++++++++++++
drivers/net/mlx5/mlx5.h | 6 +++
drivers/net/mlx5/mlx5_flow.h | 3 --
drivers/net/mlx5/mlx5_flow_hw.c | 34 ---------------
5 files changed, 84 insertions(+), 69 deletions(-)
diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c
index ed273e14cf..ec067ef52c 100644
--- a/drivers/net/mlx5/linux/mlx5_os.c
+++ b/drivers/net/mlx5/linux/mlx5_os.c
@@ -1304,38 +1304,12 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
struct mlx5_hca_attr *hca_attr = &sh->cdev->config.hca_attr;
sh->steering_format_version = hca_attr->steering_format_version;
-#if defined(HAVE_MLX5DV_DR) && \
- (defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \
- defined(HAVE_MLX5_DR_CREATE_ACTION_ASO))
+#if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO_EXT)
if (hca_attr->qos.sup && hca_attr->qos.flow_meter_old &&
sh->config.dv_flow_en) {
- uint8_t reg_c_mask = hca_attr->qos.flow_meter_reg_c_ids;
- /*
- * Meter needs two REG_C's for color match and pre-sfx
- * flow match. Here get the REG_C for color match.
- * REG_C_0 and REG_C_1 is reserved for metadata feature.
- */
- reg_c_mask &= 0xfc;
- if (rte_popcount32(reg_c_mask) < 1) {
- priv->mtr_en = 0;
- DRV_LOG(WARNING, "No available register for"
- " meter.");
- } else {
- /*
- * The meter color register is used by the
- * flow-hit feature as well.
- * The flow-hit feature must use REG_C_3
- * Prefer REG_C_3 if it is available.
- */
- if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
- sh->registers.aso_reg = REG_C_3;
- else
- sh->registers.aso_reg =
- ffs(reg_c_mask) - 1 + REG_C_0;
+ if (sh->registers.aso_reg != REG_NON) {
priv->mtr_en = 1;
priv->mtr_reg_share = hca_attr->qos.flow_meter;
- DRV_LOG(DEBUG, "The REG_C meter uses is %d",
- sh->registers.aso_reg);
}
}
if (hca_attr->qos.sup && hca_attr->qos.flow_meter_aso_sup) {
@@ -1358,7 +1332,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
sh->tunnel_header_0_1 = 1;
if (hca_attr->flow.tunnel_header_2_3)
sh->tunnel_header_2_3 = 1;
-#endif
+#endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO_EXT */
#ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
if (hca_attr->flow_hit_aso && sh->registers.aso_reg == REG_C_3) {
sh->flow_hit_aso_en = 1;
@@ -1617,9 +1591,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
err = ENOTSUP;
goto error;
}
- /* Only HWS requires this information. */
- if (sh->refcnt == 1)
- flow_hw_init_tags_set(eth_dev);
if (priv->sh->config.dv_esw_en &&
flow_hw_create_vport_action(eth_dev)) {
DRV_LOG(ERR, "port %u failed to create vport action",
diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index c13ce2c13c..840c566162 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -1599,6 +1599,80 @@ mlx5_rt_timestamp_config(struct mlx5_dev_ctx_shared *sh,
}
}
+static void
+mlx5_init_hws_flow_tags_registers(struct mlx5_dev_ctx_shared *sh)
+{
+ struct mlx5_dev_registers *reg = &sh->registers;
+ uint32_t meta_mode = sh->config.dv_xmeta_en;
+ uint8_t masks = (uint8_t)sh->cdev->config.hca_attr.set_reg_c;
+ uint8_t unset = 0;
+ uint32_t i, j;
+
+ /*
+ * The CAPA is global for common device but only used in net.
+ * It is shared per eswitch domain.
+ */
+ if (reg->aso_reg != REG_NON)
+ unset |= 1 << mlx5_regc_index(reg->aso_reg);
+ unset |= 1 << mlx5_regc_index(REG_C_6);
+ if (sh->config.dv_esw_en)
+ unset |= 1 << mlx5_regc_index(REG_C_0);
+ if (meta_mode == MLX5_XMETA_MODE_META32_HWS)
+ unset |= 1 << mlx5_regc_index(REG_C_1);
+ masks &= ~unset;
+ for (i = 0, j = 0; i < MLX5_FLOW_HW_TAGS_MAX; i++) {
+ if (!!((1 << i) & masks))
+ reg->hw_avl_tags[j++] = mlx5_regc_value(i);
+ }
+}
+
+static void
+mlx5_init_aso_register(struct mlx5_dev_ctx_shared *sh)
+{
+#if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO_EXT)
+ const struct mlx5_hca_attr *hca_attr = &sh->cdev->config.hca_attr;
+ const struct mlx5_hca_qos_attr *qos = &hca_attr->qos;
+ uint8_t reg_c_mask = qos->flow_meter_reg_c_ids & 0xfc;
+
+ if (!(qos->sup && qos->flow_meter_old && sh->config.dv_flow_en))
+ return;
+ /*
+ * Meter needs two REG_C's for color match and pre-sfx
+ * flow match. Here get the REG_C for color match.
+ * REG_C_0 and REG_C_1 is reserved for metadata feature.
+ */
+ if (__builtin_popcount(reg_c_mask) > 0) {
+ /*
+ * The meter color register is used by the
+ * flow-hit feature as well.
+ * The flow-hit feature must use REG_C_3
+ * Prefer REG_C_3 if it is available.
+ */
+ if (reg_c_mask & (1 << mlx5_regc_index(REG_C_3)))
+ sh->registers.aso_reg = REG_C_3;
+ else
+ sh->registers.aso_reg =
+ mlx5_regc_value(ffs(reg_c_mask) - 1);
+ }
+#else
+ RTE_SET_USED(sh);
+#endif
+}
+
+static void
+mlx5_init_shared_dev_registers(struct mlx5_dev_ctx_shared *sh)
+{
+ if (sh->cdev->config.devx)
+ mlx5_init_aso_register(sh);
+ if (sh->registers.aso_reg != REG_NON) {
+ DRV_LOG(DEBUG, "ASO register: REG_C%d",
+ mlx5_regc_index(sh->registers.aso_reg));
+ } else {
+ DRV_LOG(DEBUG, "ASO register: NONE");
+ }
+ mlx5_init_hws_flow_tags_registers(sh);
+}
+
/**
* Allocate shared device context. If there is multiport device the
* master and representors will share this context, if there is single
@@ -1720,6 +1794,7 @@ mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn,
/* Add context to the global device list. */
LIST_INSERT_HEAD(&mlx5_dev_ctx_list, sh, next);
rte_spinlock_init(&sh->geneve_tlv_opt_sl);
+ mlx5_init_shared_dev_registers(sh);
exit:
pthread_mutex_unlock(&mlx5_dev_ctx_list_mutex);
return sh;
diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index 99a2ad88ed..a0dcd788b4 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -1380,6 +1380,12 @@ struct mlx5_dev_registers {
enum modify_reg hw_avl_tags[MLX5_FLOW_HW_TAGS_MAX];
};
+#if defined(HAVE_MLX5DV_DR) && \
+ (defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \
+ defined(HAVE_MLX5_DR_CREATE_ACTION_ASO))
+#define HAVE_MLX5_DR_CREATE_ACTION_ASO_EXT
+#endif
+
/*
* Shared Infiniband device context for Master/Representors
* which belong to same IB device with multiple IB ports.
diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index 250d9eb1fc..aea8b38f39 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -1727,9 +1727,6 @@ flow_hw_get_reg_id_from_ctx(void *dr_ctx,
void flow_hw_set_port_info(struct rte_eth_dev *dev);
void flow_hw_clear_port_info(struct rte_eth_dev *dev);
-
-void flow_hw_init_tags_set(struct rte_eth_dev *dev);
-
int flow_hw_create_vport_action(struct rte_eth_dev *dev);
void flow_hw_destroy_vport_action(struct rte_eth_dev *dev);
diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index c48c2eec39..b0ef14c14e 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -8448,40 +8448,6 @@ flow_hw_clear_port_info(struct rte_eth_dev *dev)
info->is_wire = 0;
}
-/*
- * Initialize the information of available tag registers and an intersection
- * of all the probed devices' REG_C_Xs.
- * PS. No port concept in steering part, right now it cannot be per port level.
- *
- * @param[in] dev
- * Pointer to the rte_eth_dev structure.
- */
-void flow_hw_init_tags_set(struct rte_eth_dev *dev)
-{
- struct mlx5_dev_ctx_shared *sh = MLX5_SH(dev);
- struct mlx5_dev_registers *reg = &sh->registers;
- uint32_t meta_mode = sh->config.dv_xmeta_en;
- uint8_t masks = (uint8_t)sh->cdev->config.hca_attr.set_reg_c;
- uint8_t unset = 0;
- uint32_t i, j;
-
- /*
- * The CAPA is global for common device but only used in net.
- * It is shared per eswitch domain.
- */
- unset |= 1 << mlx5_regc_index(reg->aso_reg);
- unset |= 1 << mlx5_regc_index(REG_C_6);
- if (sh->config.dv_esw_en)
- unset |= 1 << mlx5_regc_index(REG_C_0);
- if (meta_mode == MLX5_XMETA_MODE_META32_HWS)
- unset |= 1 << mlx5_regc_index(REG_C_1);
- masks &= ~unset;
- for (i = 0, j = 0; i < MLX5_FLOW_HW_TAGS_MAX; i++) {
- if (!!((1 << i) & masks))
- reg->hw_avl_tags[j++] = mlx5_regc_value(i);
- }
-}
-
static int
flow_hw_conntrack_destroy(struct rte_eth_dev *dev __rte_unused,
uint32_t idx,
--
2.39.2
next prev parent reply other threads:[~2023-10-29 16:33 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-29 16:31 [PATCH 01/30] net/mlx5/hws: Definer, add mlx5dr context to definer_conv_data Gregory Etelson
2023-10-29 16:31 ` [PATCH 02/30] net/mlx5: add flow_hw_get_reg_id_from_ctx() Gregory Etelson
2023-10-29 16:31 ` [PATCH 03/30] net/mlx5/hws: Definer, use flow_hw_get_reg_id_from_ctx function call Gregory Etelson
2023-10-29 16:31 ` [PATCH 04/30] net/mlx5: add rte_device parameter to locate HWS registers Gregory Etelson
2023-11-05 20:27 ` Thomas Monjalon
2023-10-29 16:31 ` [PATCH 05/30] net/mlx5: separate port REG_C registers usage Gregory Etelson
2023-10-29 16:31 ` [PATCH 06/30] net/mlx5: merge REG_C aliases Gregory Etelson
2023-10-29 16:31 ` Gregory Etelson [this message]
2023-10-29 16:31 ` [PATCH 08/30] net/mlx5/hws: adding method to query rule hash Gregory Etelson
2023-10-29 16:31 ` [PATCH 09/30] net/mlx5: add support for calc hash Gregory Etelson
2023-10-29 16:31 ` [PATCH 10/30] net/mlx5: fix insert by index Gregory Etelson
2023-10-29 16:31 ` [PATCH 11/30] net/mlx5: fix query for NIC flow cap Gregory Etelson
2023-10-29 16:31 ` [PATCH 12/30] net/mlx5: add support for more registers Gregory Etelson
2023-10-29 16:31 ` [PATCH 13/30] net/mlx5: add validation support for tags Gregory Etelson
2023-10-29 16:31 ` [PATCH 14/30] net/mlx5: reuse reformat and modify header actions in a table Gregory Etelson
2023-10-29 16:31 ` [PATCH 15/30] net/mlx5/hws: check the rule status on rule update Gregory Etelson
2023-10-29 16:31 ` [PATCH 16/30] net/mlx5/hws: support IPsec encryption/decryption action Gregory Etelson
2023-10-29 16:31 ` [PATCH 17/30] net/mlx5/hws: support ASO IPsec action Gregory Etelson
2023-10-29 16:31 ` [PATCH 18/30] net/mlx5/hws: support reformat trailer action Gregory Etelson
2023-10-29 16:31 ` [PATCH 19/30] net/mlx5/hws: support ASO first hit action Gregory Etelson
2023-10-29 16:31 ` [PATCH 20/30] net/mlx5/hws: support insert header action Gregory Etelson
2023-10-29 16:31 ` [PATCH 21/30] net/mlx5/hws: support remove " Gregory Etelson
2023-10-29 16:31 ` [PATCH 22/30] net/mlx5/hws: allow jump to TIR over FDB Gregory Etelson
2023-10-29 16:31 ` [PATCH 23/30] net/mlx5/hws: support dynamic re-parse Gregory Etelson
2023-10-29 16:31 ` [PATCH 24/30] net/mlx5/hws: dynamic re-parse for modify header Gregory Etelson
2023-10-29 16:31 ` [PATCH 25/30] net/mlx5: sample the srv6 last segment Gregory Etelson
2023-10-29 16:31 ` [PATCH 26/30] net/mlx5/hws: fix potential wrong errno value Gregory Etelson
2023-10-29 16:31 ` [PATCH 27/30] net/mlx5/hws: add IPv6 routing extension push remove actions Gregory Etelson
2023-10-29 16:32 ` [PATCH 28/30] net/mlx5/hws: add setter for IPv6 routing push remove Gregory Etelson
2023-10-29 16:32 ` [PATCH 29/30] net/mlx5: implement " Gregory Etelson
2023-10-29 16:32 ` [PATCH 30/30] net/mlx5/hws: add stc reparse support for srv6 push pop Gregory Etelson
2023-11-05 18:49 ` [PATCH 01/30] net/mlx5/hws: Definer, add mlx5dr context to definer_conv_data Thomas Monjalon
2023-11-06 7:32 ` Etelson, Gregory
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