From: Ilya Leoshkevich <iii@linux.ibm.com>
To: Richard Henderson <richard.henderson@linaro.org>,
David Hildenbrand <david@redhat.com>
Cc: Thomas Huth <thuth@redhat.com>,
qemu-s390x@nongnu.org, qemu-devel@nongnu.org,
Michael Tokarev <mjt@tls.msk.ru>,
Ilya Leoshkevich <iii@linux.ibm.com>
Subject: [PATCH 2/4] tests/tcg/s390x: Test CLC with inaccessible second operand
Date: Tue, 31 Oct 2023 06:32:28 +0100 [thread overview]
Message-ID: <20231031053718.347100-3-iii@linux.ibm.com> (raw)
In-Reply-To: <20231031053718.347100-1-iii@linux.ibm.com>
Add a small test to prevent regressions.
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
---
tests/tcg/s390x/Makefile.target | 1 +
tests/tcg/s390x/clc.c | 48 +++++++++++++++++++++++++++++++++
2 files changed, 49 insertions(+)
create mode 100644 tests/tcg/s390x/clc.c
diff --git a/tests/tcg/s390x/Makefile.target b/tests/tcg/s390x/Makefile.target
index 826f0a18e43..ccd4f4e68de 100644
--- a/tests/tcg/s390x/Makefile.target
+++ b/tests/tcg/s390x/Makefile.target
@@ -41,6 +41,7 @@ TESTS+=larl
TESTS+=mdeb
TESTS+=cgebra
TESTS+=clgebr
+TESTS+=clc
cdsg: CFLAGS+=-pthread
cdsg: LDFLAGS+=-pthread
diff --git a/tests/tcg/s390x/clc.c b/tests/tcg/s390x/clc.c
new file mode 100644
index 00000000000..e14189bd75e
--- /dev/null
+++ b/tests/tcg/s390x/clc.c
@@ -0,0 +1,48 @@
+/*
+ * Test the CLC instruction.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+#include <assert.h>
+#include <signal.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+
+static void handle_sigsegv(int sig, siginfo_t *info, void *ucontext)
+{
+ mcontext_t *mcontext = &((ucontext_t *)ucontext)->uc_mcontext;
+ if (mcontext->gregs[0] != 600) {
+ write(STDERR_FILENO, "bad r0\n", 7);
+ _exit(EXIT_FAILURE);
+ }
+ if (((mcontext->psw.mask >> 44) & 3) != 1) {
+ write(STDERR_FILENO, "bad cc\n", 7);
+ _exit(EXIT_FAILURE);
+ }
+ _exit(EXIT_SUCCESS);
+}
+
+int main(void)
+{
+ register unsigned long r0 asm("r0");
+ unsigned long mem = 42, rhs = 500;
+ struct sigaction act;
+ int err;
+
+ memset(&act, 0, sizeof(act));
+ act.sa_sigaction = handle_sigsegv;
+ act.sa_flags = SA_SIGINFO;
+ err = sigaction(SIGSEGV, &act, NULL);
+ assert(err == 0);
+
+ r0 = 100;
+ asm("algr %[r0],%[rhs]\n"
+ "clc 0(8,%[mem]),0(0)\n" /* The 2nd operand will cause a SEGV. */
+ : [r0] "+r" (r0)
+ : [mem] "r" (&mem)
+ , [rhs] "r" (rhs)
+ : "cc", "memory");
+
+ return EXIT_FAILURE;
+}
--
2.41.0
next prev parent reply other threads:[~2023-10-31 5:39 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-31 5:32 [PATCH 0/4] target/s390x: CC fixes Ilya Leoshkevich
2023-10-31 5:32 ` [PATCH 1/4] target/s390x: Fix CLC corrupting cc_src Ilya Leoshkevich
2023-10-31 22:49 ` Richard Henderson
2023-10-31 5:32 ` Ilya Leoshkevich [this message]
2023-10-31 22:53 ` [PATCH 2/4] tests/tcg/s390x: Test CLC with inaccessible second operand Richard Henderson
2023-11-06 9:20 ` Ilya Leoshkevich
2023-10-31 5:32 ` [PATCH 3/4] target/s390x: Fix LAALG not updating cc_src Ilya Leoshkevich
2023-10-31 22:57 ` Richard Henderson
2023-10-31 5:32 ` [PATCH 4/4] tests/tcg/s390x: Test LAALG with negative cc_src Ilya Leoshkevich
2023-10-31 8:38 ` [PATCH 0/4] target/s390x: CC fixes David Hildenbrand
2023-11-03 16:44 ` Ilya Leoshkevich
2023-11-03 17:02 ` David Hildenbrand
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