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[2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id v12-20020a05600c444c00b0040641a9d49bsm886889wmn.17.2023.11.01.02.20.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Nov 2023 02:20:03 -0700 (PDT) Date: Wed, 1 Nov 2023 10:20:03 +0100 From: Andrew Jones To: Daniel Henrique Barboza Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com Subject: Re: [PATCH v7 02/16] target/riscv/tcg: do not use "!generic" CPU checks Message-ID: <20231101-ec7856944e5893c9ce4c536b@orel> References: <20231031203916.197332-1-dbarboza@ventanamicro.com> <20231031203916.197332-3-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20231031203916.197332-3-dbarboza@ventanamicro.com> Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=ajones@ventanamicro.com; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org Sender: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org On Tue, Oct 31, 2023 at 05:39:02PM -0300, Daniel Henrique Barboza wrote: > Our current logic in get/setters of MISA and multi-letter extensions > works because we have only 2 CPU types, generic and vendor, and by using > "!generic" we're implying that we're talking about vendor CPUs. When adding > a third CPU type this logic will break so let's handle it beforehand. > > In set_misa_ext_cfg() and set_multi_ext_cfg(), check for "vendor" cpu instead > of "not generic". The "generic CPU" checks remaining are from > riscv_cpu_add_misa_properties() and cpu_add_multi_ext_prop() before > applying default values for the extensions. > > This leaves us with: > > - vendor CPUs will not allow extension enablement, all other CPUs will; > > - generic CPUs will inherit default values for extensions, all others > won't. > > And now we can add a new, third CPU type, that will allow extensions to > be enabled and will not inherit defaults, without changing the existing > logic. > > Signed-off-by: Daniel Henrique Barboza > --- > target/riscv/tcg/tcg-cpu.c | 13 +++++++++---- > 1 file changed, 9 insertions(+), 4 deletions(-) > Reviewed-by: Andrew Jones