From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-qk1-f173.google.com (mail-qk1-f173.google.com [209.85.222.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 891F51D559 for ; Thu, 2 Nov 2023 17:33:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="sHHUvQx+" Received: by mail-qk1-f173.google.com with SMTP id af79cd13be357-777745f1541so75171185a.0 for ; Thu, 02 Nov 2023 10:33:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1698946404; x=1699551204; darn=lists.linux.dev; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date:from:to :cc:subject:date:message-id:reply-to; bh=QMUtaNcyMJONDb+NRTDB5A2cdiVh8ep8ZeoczkWG0cY=; b=sHHUvQx+lGJLC7bMPX2gVfFj8RdHQZEiHltMxq/xQ0Z5+7w782riKh3U885I1CsnYM bryeuUcN4lOuSd3c3Q9SSmQLoIIKp54zI/i1Cypp9pSbj+H2z1dj8O83fh/SjaihPlJD p35SuQ3oJ9TL0tQRBj7y2/5IXVztF3r0IAedsBJgKsKEavpHK+/1iFIbhL2M3CAKIUVD 8iTb8cTL3bqXLrgaEkWiZ/3MPGXr/Z/wPFBkkorDSDY1G0wIVrbb0jxPu9hZSK/74BBi Stfavgalu1SzD8p1usWaxyG+4yHmNDDRJjf3LrwFl+eD/Mrt8jyG/5Yadjh5LWPiOz6n Y50A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698946404; x=1699551204; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=QMUtaNcyMJONDb+NRTDB5A2cdiVh8ep8ZeoczkWG0cY=; b=wWGtk5KjuWrqZIEAZzMkRfVGCpsI/SaLjPyQeiJfpUElCqikm406GxgjgWspHFZEwM u9wNLl7np2RE+RdKEVPixYaKFTX0WXrXeyuIbGRrXXjtfPXcT0RXRGJFvJW8qt0LSNcM JvmBrykVAIbQVnhcR1qvjOqLB8dEvgv7wA5aolTfpF9S3B0nM+jxgsasixaH/t29yFJI B8L1zaitNGX2/l1cgn0iWh82BrYyC6rJH0RpmAimbJn5eNoa7IAys+Ff1QLjRB3wxdND DZy6zMYWXOzVywyUac9SOHw7F+7uxvfP2lXM2C5+x+awHBxa3DlXMOJVhk9aSGMuvK3U krcA== X-Gm-Message-State: AOJu0YxgCwT+KIHs5DoT/DP2izfznlBae8EKGlN4a2fu1XLDMbjt5wTd X61gPtnkZOsTZFjQpbiSDrkH X-Google-Smtp-Source: AGHT+IHX7EI2x7veOgf/GXDdZbsRu/5EohayNZh0ZiyAzJQnH+S4mjA6yTOVfB6lGTAOudjhbyAuRQ== X-Received: by 2002:a05:6214:529c:b0:66d:2af4:c423 with SMTP id kj28-20020a056214529c00b0066d2af4c423mr21097024qvb.2.1698946404249; Thu, 02 Nov 2023 10:33:24 -0700 (PDT) Received: from thinkpad ([117.217.189.228]) by smtp.gmail.com with ESMTPSA id p15-20020a0cc3cf000000b00670e7ae4964sm125621qvi.91.2023.11.02.10.33.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Nov 2023 10:33:23 -0700 (PDT) Date: Thu, 2 Nov 2023 23:03:14 +0530 From: Manivannan Sadhasivam To: Frank Li Cc: bhelgaas@google.com, imx@lists.linux.dev, kw@linux.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, lpieralisi@kernel.org, minghuan.Lian@nxp.com, mingkai.hu@nxp.com, robh@kernel.org, roy.zang@nxp.com Subject: Re: [PATCH v3 3/4] PCI: layerscape: Rename pf_* as pf_lut_* Message-ID: <20231102173314.GE20943@thinkpad> References: <20231017193145.3198380-1-Frank.Li@nxp.com> <20231017193145.3198380-4-Frank.Li@nxp.com> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20231017193145.3198380-4-Frank.Li@nxp.com> On Tue, Oct 17, 2023 at 03:31:44PM -0400, Frank Li wrote: > 'pf' and 'lut' is just difference name in difference chips, but basic it is > a MMIO base address plus an offset. > > Rename it to avoid duplicate pf_* and lut_* in driver. > "pci-layerscape-ep.c" uses "ls_lut_" prefix and now you are using "pf_lut_". May I know the difference between these two? Can we just use a common name? - Mani > Signed-off-by: Frank Li > --- > > Notes: > change from v1 to v3 > - new patch at v3 > > drivers/pci/controller/dwc/pci-layerscape.c | 34 ++++++++++----------- > 1 file changed, 17 insertions(+), 17 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pci-layerscape.c b/drivers/pci/controller/dwc/pci-layerscape.c > index 6f47cfe146c44..4b663b20d8612 100644 > --- a/drivers/pci/controller/dwc/pci-layerscape.c > +++ b/drivers/pci/controller/dwc/pci-layerscape.c > @@ -46,7 +46,7 @@ > #define LS_PCIE_DRV_SCFG BIT(0) > > struct ls_pcie_drvdata { > - const u32 pf_off; > + const u32 pf_lut_off; > const struct dw_pcie_host_ops *ops; > int (*exit_from_l2)(struct dw_pcie_rp *pp); > int flags; > @@ -56,13 +56,13 @@ struct ls_pcie_drvdata { > struct ls_pcie { > struct dw_pcie *pci; > const struct ls_pcie_drvdata *drvdata; > - void __iomem *pf_base; > + void __iomem *pf_lut_base; > struct regmap *scfg; > int index; > bool big_endian; > }; > > -#define ls_pcie_pf_readl_addr(addr) ls_pcie_pf_readl(pcie, addr) > +#define ls_pcie_pf_lut_readl_addr(addr) ls_pcie_pf_lut_readl(pcie, addr) > #define to_ls_pcie(x) dev_get_drvdata((x)->dev) > > static bool ls_pcie_is_bridge(struct ls_pcie *pcie) > @@ -103,20 +103,20 @@ static void ls_pcie_fix_error_response(struct ls_pcie *pcie) > iowrite32(PCIE_ABSERR_SETTING, pci->dbi_base + PCIE_ABSERR); > } > > -static u32 ls_pcie_pf_readl(struct ls_pcie *pcie, u32 off) > +static u32 ls_pcie_pf_lut_readl(struct ls_pcie *pcie, u32 off) > { > if (pcie->big_endian) > - return ioread32be(pcie->pf_base + off); > + return ioread32be(pcie->pf_lut_base + off); > > - return ioread32(pcie->pf_base + off); > + return ioread32(pcie->pf_lut_base + off); > } > > -static void ls_pcie_pf_writel(struct ls_pcie *pcie, u32 off, u32 val) > +static void ls_pcie_pf_lut_writel(struct ls_pcie *pcie, u32 off, u32 val) > { > if (pcie->big_endian) > - iowrite32be(val, pcie->pf_base + off); > + iowrite32be(val, pcie->pf_lut_base + off); > else > - iowrite32(val, pcie->pf_base + off); > + iowrite32(val, pcie->pf_lut_base + off); > } > > static void ls_pcie_send_turnoff_msg(struct dw_pcie_rp *pp) > @@ -126,11 +126,11 @@ static void ls_pcie_send_turnoff_msg(struct dw_pcie_rp *pp) > u32 val; > int ret; > > - val = ls_pcie_pf_readl(pcie, LS_PCIE_PF_MCR); > + val = ls_pcie_pf_lut_readl(pcie, LS_PCIE_PF_MCR); > val |= PF_MCR_PTOMR; > - ls_pcie_pf_writel(pcie, LS_PCIE_PF_MCR, val); > + ls_pcie_pf_lut_writel(pcie, LS_PCIE_PF_MCR, val); > > - ret = readx_poll_timeout(ls_pcie_pf_readl_addr, LS_PCIE_PF_MCR, > + ret = readx_poll_timeout(ls_pcie_pf_lut_readl_addr, LS_PCIE_PF_MCR, > val, !(val & PF_MCR_PTOMR), > PCIE_PME_TO_L2_TIMEOUT_US/10, > PCIE_PME_TO_L2_TIMEOUT_US); > @@ -149,15 +149,15 @@ static int ls_pcie_exit_from_l2(struct dw_pcie_rp *pp) > * Set PF_MCR_EXL2S bit in LS_PCIE_PF_MCR register for the link > * to exit L2 state. > */ > - val = ls_pcie_pf_readl(pcie, LS_PCIE_PF_MCR); > + val = ls_pcie_pf_lut_readl(pcie, LS_PCIE_PF_MCR); > val |= PF_MCR_EXL2S; > - ls_pcie_pf_writel(pcie, LS_PCIE_PF_MCR, val); > + ls_pcie_pf_lut_writel(pcie, LS_PCIE_PF_MCR, val); > > /* > * L2 exit timeout of 10ms is not defined in the specifications, > * it was chosen based on empirical observations. > */ > - ret = readx_poll_timeout(ls_pcie_pf_readl_addr, LS_PCIE_PF_MCR, > + ret = readx_poll_timeout(ls_pcie_pf_lut_readl_addr, LS_PCIE_PF_MCR, > val, !(val & PF_MCR_EXL2S), > 1000, > 10000); > @@ -245,7 +245,7 @@ static const struct ls_pcie_drvdata ls1021a_drvdata = { > }; > > static const struct ls_pcie_drvdata layerscape_drvdata = { > - .pf_off = 0xc0000, > + .pf_lut_off = 0xc0000, > .pm_support = true, > .exit_from_l2 = ls_pcie_exit_from_l2, > }; > @@ -295,7 +295,7 @@ static int ls_pcie_probe(struct platform_device *pdev) > > pcie->big_endian = of_property_read_bool(dev->of_node, "big-endian"); > > - pcie->pf_base = pci->dbi_base + pcie->drvdata->pf_off; > + pcie->pf_lut_base = pci->dbi_base + pcie->drvdata->pf_lut_off; > > if (pcie->drvdata->flags & LS_PCIE_DRV_SCFG) { > > -- > 2.34.1 > -- மணிவண்ணன் சதாசிவம் From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2F95AC4167D for ; Thu, 2 Nov 2023 17:34:22 +0000 (UTC) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=m5sROcgz; dkim-atps=neutral Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4SLrbJ4B4zz3cbl for ; Fri, 3 Nov 2023 04:34:20 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=m5sROcgz; dkim-atps=neutral Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=linaro.org (client-ip=2607:f8b0:4864:20::72b; helo=mail-qk1-x72b.google.com; envelope-from=manivannan.sadhasivam@linaro.org; receiver=lists.ozlabs.org) Received: from mail-qk1-x72b.google.com (mail-qk1-x72b.google.com [IPv6:2607:f8b0:4864:20::72b]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4SLrZL2lq1z3bdm for ; Fri, 3 Nov 2023 04:33:27 +1100 (AEDT) Received: by mail-qk1-x72b.google.com with SMTP id af79cd13be357-778711ee748so72564885a.2 for ; Thu, 02 Nov 2023 10:33:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1698946404; x=1699551204; darn=lists.ozlabs.org; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date:from:to :cc:subject:date:message-id:reply-to; bh=QMUtaNcyMJONDb+NRTDB5A2cdiVh8ep8ZeoczkWG0cY=; b=m5sROcgzO7npk1HAJw2s7i/EiZTDdQcNvlPhhOq8EZ2+dj0su3MH4pVVHnahrDHrZX 1wNIGXBiLjH1yawUwc9mzQdmvJLqSsb3zSIO7HswLltF/zEbZGwKkhIYHZ8XKwoi7sRg PWnlD4gJtGk8j806EchsSNCEuzyn8Z3iMKkfby61mdWVY7jM2wVCk5FpM7aIpok1NR21 SM4Xiym2sfygqFgIF8NtgkoD/dMKfPoAtQb7nRUiN/U0nM0jOP9HiEKdgpuQXVddaaNB sDimlt3YHzcP7UKOUg2V/Mi/n6wD+/vsKBuhNGERuoYw/KlLKaFd1fSk/PEM9e/LT8xb sf3g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698946404; x=1699551204; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=QMUtaNcyMJONDb+NRTDB5A2cdiVh8ep8ZeoczkWG0cY=; b=p8PNPMzpO8w7Y4LxCpp9oQ5hquEaZ6Sm/4VN1pJG5bpH8UFZ26zTkIXh3FNCx/87Wq RK0GDzoslbfykJ5pgnBSMC1t0GaD4+jv0vQqfh4SKnkTjFTuJBhdGjpVI2bxnuZnYCjN VKIRTS3uL1G1lbXrTmuXaUQDzjI86rExnXeLNZd3K80hDkCGSOhdYB+KlMdl/cJk0Bg2 RyFB6cFm6GkNbaIWYfM8vFFYhTio6/deQD+IF3sx1N9NPndra3ZnVc+qI3vI/YwXCwHL qN52SN7NEluExNtn8tw20ik8e9PJuUNNRpMDpJhUigiLbvPB6CKGe+GIohLYqtL0Pbwf imEQ== X-Gm-Message-State: AOJu0YwhlYtt/GMIRWV4vZRDPQhtsCGpArAdLCjCUsWZVz7tzCenrxuD r7zyUNf13dpurguykcl4DFOz X-Google-Smtp-Source: AGHT+IHX7EI2x7veOgf/GXDdZbsRu/5EohayNZh0ZiyAzJQnH+S4mjA6yTOVfB6lGTAOudjhbyAuRQ== X-Received: by 2002:a05:6214:529c:b0:66d:2af4:c423 with SMTP id kj28-20020a056214529c00b0066d2af4c423mr21097024qvb.2.1698946404249; Thu, 02 Nov 2023 10:33:24 -0700 (PDT) Received: from thinkpad ([117.217.189.228]) by smtp.gmail.com with ESMTPSA id p15-20020a0cc3cf000000b00670e7ae4964sm125621qvi.91.2023.11.02.10.33.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Nov 2023 10:33:23 -0700 (PDT) Date: Thu, 2 Nov 2023 23:03:14 +0530 From: Manivannan Sadhasivam To: Frank Li Subject: Re: [PATCH v3 3/4] PCI: layerscape: Rename pf_* as pf_lut_* Message-ID: <20231102173314.GE20943@thinkpad> References: <20231017193145.3198380-1-Frank.Li@nxp.com> <20231017193145.3198380-4-Frank.Li@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20231017193145.3198380-4-Frank.Li@nxp.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: imx@lists.linux.dev, kw@linux.com, linux-pci@vger.kernel.org, lpieralisi@kernel.org, linux-kernel@vger.kernel.org, minghuan.Lian@nxp.com, mingkai.hu@nxp.com, roy.zang@nxp.com, bhelgaas@google.com, linuxppc-dev@lists.ozlabs.org, robh@kernel.org, linux-arm-kernel@lists.infradead.org Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Tue, Oct 17, 2023 at 03:31:44PM -0400, Frank Li wrote: > 'pf' and 'lut' is just difference name in difference chips, but basic it is > a MMIO base address plus an offset. > > Rename it to avoid duplicate pf_* and lut_* in driver. > "pci-layerscape-ep.c" uses "ls_lut_" prefix and now you are using "pf_lut_". May I know the difference between these two? Can we just use a common name? - Mani > Signed-off-by: Frank Li > --- > > Notes: > change from v1 to v3 > - new patch at v3 > > drivers/pci/controller/dwc/pci-layerscape.c | 34 ++++++++++----------- > 1 file changed, 17 insertions(+), 17 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pci-layerscape.c b/drivers/pci/controller/dwc/pci-layerscape.c > index 6f47cfe146c44..4b663b20d8612 100644 > --- a/drivers/pci/controller/dwc/pci-layerscape.c > +++ b/drivers/pci/controller/dwc/pci-layerscape.c > @@ -46,7 +46,7 @@ > #define LS_PCIE_DRV_SCFG BIT(0) > > struct ls_pcie_drvdata { > - const u32 pf_off; > + const u32 pf_lut_off; > const struct dw_pcie_host_ops *ops; > int (*exit_from_l2)(struct dw_pcie_rp *pp); > int flags; > @@ -56,13 +56,13 @@ struct ls_pcie_drvdata { > struct ls_pcie { > struct dw_pcie *pci; > const struct ls_pcie_drvdata *drvdata; > - void __iomem *pf_base; > + void __iomem *pf_lut_base; > struct regmap *scfg; > int index; > bool big_endian; > }; > > -#define ls_pcie_pf_readl_addr(addr) ls_pcie_pf_readl(pcie, addr) > +#define ls_pcie_pf_lut_readl_addr(addr) ls_pcie_pf_lut_readl(pcie, addr) > #define to_ls_pcie(x) dev_get_drvdata((x)->dev) > > static bool ls_pcie_is_bridge(struct ls_pcie *pcie) > @@ -103,20 +103,20 @@ static void ls_pcie_fix_error_response(struct ls_pcie *pcie) > iowrite32(PCIE_ABSERR_SETTING, pci->dbi_base + PCIE_ABSERR); > } > > -static u32 ls_pcie_pf_readl(struct ls_pcie *pcie, u32 off) > +static u32 ls_pcie_pf_lut_readl(struct ls_pcie *pcie, u32 off) > { > if (pcie->big_endian) > - return ioread32be(pcie->pf_base + off); > + return ioread32be(pcie->pf_lut_base + off); > > - return ioread32(pcie->pf_base + off); > + return ioread32(pcie->pf_lut_base + off); > } > > -static void ls_pcie_pf_writel(struct ls_pcie *pcie, u32 off, u32 val) > +static void ls_pcie_pf_lut_writel(struct ls_pcie *pcie, u32 off, u32 val) > { > if (pcie->big_endian) > - iowrite32be(val, pcie->pf_base + off); > + iowrite32be(val, pcie->pf_lut_base + off); > else > - iowrite32(val, pcie->pf_base + off); > + iowrite32(val, pcie->pf_lut_base + off); > } > > static void ls_pcie_send_turnoff_msg(struct dw_pcie_rp *pp) > @@ -126,11 +126,11 @@ static void ls_pcie_send_turnoff_msg(struct dw_pcie_rp *pp) > u32 val; > int ret; > > - val = ls_pcie_pf_readl(pcie, LS_PCIE_PF_MCR); > + val = ls_pcie_pf_lut_readl(pcie, LS_PCIE_PF_MCR); > val |= PF_MCR_PTOMR; > - ls_pcie_pf_writel(pcie, LS_PCIE_PF_MCR, val); > + ls_pcie_pf_lut_writel(pcie, LS_PCIE_PF_MCR, val); > > - ret = readx_poll_timeout(ls_pcie_pf_readl_addr, LS_PCIE_PF_MCR, > + ret = readx_poll_timeout(ls_pcie_pf_lut_readl_addr, LS_PCIE_PF_MCR, > val, !(val & PF_MCR_PTOMR), > PCIE_PME_TO_L2_TIMEOUT_US/10, > PCIE_PME_TO_L2_TIMEOUT_US); > @@ -149,15 +149,15 @@ static int ls_pcie_exit_from_l2(struct dw_pcie_rp *pp) > * Set PF_MCR_EXL2S bit in LS_PCIE_PF_MCR register for the link > * to exit L2 state. > */ > - val = ls_pcie_pf_readl(pcie, LS_PCIE_PF_MCR); > + val = ls_pcie_pf_lut_readl(pcie, LS_PCIE_PF_MCR); > val |= PF_MCR_EXL2S; > - ls_pcie_pf_writel(pcie, LS_PCIE_PF_MCR, val); > + ls_pcie_pf_lut_writel(pcie, LS_PCIE_PF_MCR, val); > > /* > * L2 exit timeout of 10ms is not defined in the specifications, > * it was chosen based on empirical observations. > */ > - ret = readx_poll_timeout(ls_pcie_pf_readl_addr, LS_PCIE_PF_MCR, > + ret = readx_poll_timeout(ls_pcie_pf_lut_readl_addr, LS_PCIE_PF_MCR, > val, !(val & PF_MCR_EXL2S), > 1000, > 10000); > @@ -245,7 +245,7 @@ static const struct ls_pcie_drvdata ls1021a_drvdata = { > }; > > static const struct ls_pcie_drvdata layerscape_drvdata = { > - .pf_off = 0xc0000, > + .pf_lut_off = 0xc0000, > .pm_support = true, > .exit_from_l2 = ls_pcie_exit_from_l2, > }; > @@ -295,7 +295,7 @@ static int ls_pcie_probe(struct platform_device *pdev) > > pcie->big_endian = of_property_read_bool(dev->of_node, "big-endian"); > > - pcie->pf_base = pci->dbi_base + pcie->drvdata->pf_off; > + pcie->pf_lut_base = pci->dbi_base + pcie->drvdata->pf_lut_off; > > if (pcie->drvdata->flags & LS_PCIE_DRV_SCFG) { > > -- > 2.34.1 > -- மணிவண்ணன் சதாசிவம் From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8E6A5C4167B for ; Thu, 2 Nov 2023 17:34:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=WZ+99CeeCRsK1uTR+eEBxlzm23pWeyNNCJSqJxKyDIQ=; b=Oz6NArrtuOd54S gEK5TxTYor/OyZdXNg+9gUxS7WjFgp+GkwIgBuGsXzdquiXSxSryeRo3lbzrVei9T7uZHHABNLe1M rcubhKA/sTaCnacpKT2pU7B5mMOikV3xo6R4U/P2ulxn431jmp9aM2zHzkS/reucX0vEa95HzIBCn 1pHFR4AHEXv5bGCSB2Z39lqQp5yX1iSmhQwRXKqsCTyvvrRcrToYn8nnrgSoarSU1tDiwMQaJC59q qVhrWjjWczb/UYH+E7k61RrmPshYexUF+KeThtGWwBZgoxNhFbjt80lf2UpdRzdAdYMdDZBqvMlfA 0kjWXctnc+7McvYjMJ1A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qybZU-009z2i-3C; Thu, 02 Nov 2023 17:33:32 +0000 Received: from mail-qk1-x72f.google.com ([2607:f8b0:4864:20::72f]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qybZP-009z1N-2l for linux-arm-kernel@lists.infradead.org; Thu, 02 Nov 2023 17:33:31 +0000 Received: by mail-qk1-x72f.google.com with SMTP id af79cd13be357-778711ee748so72564985a.2 for ; Thu, 02 Nov 2023 10:33:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1698946404; x=1699551204; darn=lists.infradead.org; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date:from:to :cc:subject:date:message-id:reply-to; bh=QMUtaNcyMJONDb+NRTDB5A2cdiVh8ep8ZeoczkWG0cY=; b=nezpsyfZoCGDmY0QJ0GEeaJXPDPYrf5CjcWQXwWS8UB+7/9V8FM+b4Vfl5fPIhe7JM JLTrynd9gXCMhevy23wVxE5W7YKwNjZqNP4ciOkAXS0r5wbSOvvgg/QIvSpakrHrp7o0 poeTi0kctFmZ0IuqU9oKoEbSW4y0YdqkJE/a0WP2kLBIcA4PMzs+GKZ+F0sRwy00zuPI fQQX83a2P8wXOdO0PmuNAF0T8c3ws/6N3UnMgD9BsJuaZMmsJfmpVcSl5a0iL+uqEqGw dRRrxEq02x4zCcAilHiqJjHzS4qRnFYIu62q/HVhHZO9Gx/Ueqg6pTM/A1V0vewa1VEQ YYRg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698946404; x=1699551204; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=QMUtaNcyMJONDb+NRTDB5A2cdiVh8ep8ZeoczkWG0cY=; b=DlXIl2nQH48OTrIASNp8flnUfyBbIafVhrIiAoGwjEFT1m2e8XVrodYFVWM19u5+eR PLDbpVNoh4HaWh3eHbya3fxl8nWFMxrXaVA/9X6aytIUZI+xu+dnauzXCGVOnkeGiISY rnjOXDUfOdHInznY7TQdiYzPjwAW6hgxDWFpxlGxwBGkfjbQgqyyIbma+V8XBSG9J5WJ 6kOWDwwZR/nC45Hy0tZPsYAHsfjjpdUozP90ibEGR/d/CyEh2fm04Atx38AaYO3P3rVA 8oYi50fLwiCjodsvMcUnEwObVTgxTdiqExpUmtQIVMFd8X9ccU4aB+JX4UNuZEuzO+2D XYPw== X-Gm-Message-State: AOJu0YxdgVbh13QUOhNKgVCK8XoeqRUSQButxt0berRisQ1/bGl/55Qr oESib5uEtZ9OZ1NBKmhjawQe77KvuzB+lELT7g== X-Google-Smtp-Source: AGHT+IHX7EI2x7veOgf/GXDdZbsRu/5EohayNZh0ZiyAzJQnH+S4mjA6yTOVfB6lGTAOudjhbyAuRQ== X-Received: by 2002:a05:6214:529c:b0:66d:2af4:c423 with SMTP id kj28-20020a056214529c00b0066d2af4c423mr21097024qvb.2.1698946404249; Thu, 02 Nov 2023 10:33:24 -0700 (PDT) Received: from thinkpad ([117.217.189.228]) by smtp.gmail.com with ESMTPSA id p15-20020a0cc3cf000000b00670e7ae4964sm125621qvi.91.2023.11.02.10.33.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Nov 2023 10:33:23 -0700 (PDT) Date: Thu, 2 Nov 2023 23:03:14 +0530 From: Manivannan Sadhasivam To: Frank Li Cc: bhelgaas@google.com, imx@lists.linux.dev, kw@linux.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, lpieralisi@kernel.org, minghuan.Lian@nxp.com, mingkai.hu@nxp.com, robh@kernel.org, roy.zang@nxp.com Subject: Re: [PATCH v3 3/4] PCI: layerscape: Rename pf_* as pf_lut_* Message-ID: <20231102173314.GE20943@thinkpad> References: <20231017193145.3198380-1-Frank.Li@nxp.com> <20231017193145.3198380-4-Frank.Li@nxp.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20231017193145.3198380-4-Frank.Li@nxp.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231102_103327_929413_7AE47F1D X-CRM114-Status: GOOD ( 27.39 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org T24gVHVlLCBPY3QgMTcsIDIwMjMgYXQgMDM6MzE6NDRQTSAtMDQwMCwgRnJhbmsgTGkgd3JvdGU6 Cj4gJ3BmJyBhbmQgJ2x1dCcgaXMganVzdCBkaWZmZXJlbmNlIG5hbWUgaW4gZGlmZmVyZW5jZSBj aGlwcywgYnV0IGJhc2ljIGl0IGlzCj4gYSBNTUlPIGJhc2UgYWRkcmVzcyBwbHVzIGFuIG9mZnNl dC4KPiAKPiBSZW5hbWUgaXQgdG8gYXZvaWQgZHVwbGljYXRlIHBmXyogYW5kIGx1dF8qIGluIGRy aXZlci4KPiAKCiJwY2ktbGF5ZXJzY2FwZS1lcC5jIiB1c2VzICJsc19sdXRfIiBwcmVmaXggYW5k IG5vdyB5b3UgYXJlIHVzaW5nICJwZl9sdXRfIi4gTWF5Ckkga25vdyB0aGUgZGlmZmVyZW5jZSBi ZXR3ZWVuIHRoZXNlIHR3bz8gQ2FuIHdlIGp1c3QgdXNlIGEgY29tbW9uIG5hbWU/CgotIE1hbmkK Cj4gU2lnbmVkLW9mZi1ieTogRnJhbmsgTGkgPEZyYW5rLkxpQG54cC5jb20+Cj4gLS0tCj4gCj4g Tm90ZXM6Cj4gICAgIGNoYW5nZSBmcm9tIHYxIHRvIHYzCj4gICAgIC0gbmV3IHBhdGNoIGF0IHYz Cj4gCj4gIGRyaXZlcnMvcGNpL2NvbnRyb2xsZXIvZHdjL3BjaS1sYXllcnNjYXBlLmMgfCAzNCAr KysrKysrKysrLS0tLS0tLS0tLS0KPiAgMSBmaWxlIGNoYW5nZWQsIDE3IGluc2VydGlvbnMoKyks IDE3IGRlbGV0aW9ucygtKQo+IAo+IGRpZmYgLS1naXQgYS9kcml2ZXJzL3BjaS9jb250cm9sbGVy L2R3Yy9wY2ktbGF5ZXJzY2FwZS5jIGIvZHJpdmVycy9wY2kvY29udHJvbGxlci9kd2MvcGNpLWxh eWVyc2NhcGUuYwo+IGluZGV4IDZmNDdjZmUxNDZjNDQuLjRiNjYzYjIwZDg2MTIgMTAwNjQ0Cj4g LS0tIGEvZHJpdmVycy9wY2kvY29udHJvbGxlci9kd2MvcGNpLWxheWVyc2NhcGUuYwo+ICsrKyBi L2RyaXZlcnMvcGNpL2NvbnRyb2xsZXIvZHdjL3BjaS1sYXllcnNjYXBlLmMKPiBAQCAtNDYsNyAr NDYsNyBAQAo+ICAjZGVmaW5lIExTX1BDSUVfRFJWX1NDRkcJQklUKDApCj4gIAo+ICBzdHJ1Y3Qg bHNfcGNpZV9kcnZkYXRhIHsKPiAtCWNvbnN0IHUzMiBwZl9vZmY7Cj4gKwljb25zdCB1MzIgcGZf bHV0X29mZjsKPiAgCWNvbnN0IHN0cnVjdCBkd19wY2llX2hvc3Rfb3BzICpvcHM7Cj4gIAlpbnQg KCpleGl0X2Zyb21fbDIpKHN0cnVjdCBkd19wY2llX3JwICpwcCk7Cj4gIAlpbnQgZmxhZ3M7Cj4g QEAgLTU2LDEzICs1NiwxMyBAQCBzdHJ1Y3QgbHNfcGNpZV9kcnZkYXRhIHsKPiAgc3RydWN0IGxz X3BjaWUgewo+ICAJc3RydWN0IGR3X3BjaWUgKnBjaTsKPiAgCWNvbnN0IHN0cnVjdCBsc19wY2ll X2RydmRhdGEgKmRydmRhdGE7Cj4gLQl2b2lkIF9faW9tZW0gKnBmX2Jhc2U7Cj4gKwl2b2lkIF9f aW9tZW0gKnBmX2x1dF9iYXNlOwo+ICAJc3RydWN0IHJlZ21hcCAqc2NmZzsKPiAgCWludCBpbmRl eDsKPiAgCWJvb2wgYmlnX2VuZGlhbjsKPiAgfTsKPiAgCj4gLSNkZWZpbmUgbHNfcGNpZV9wZl9y ZWFkbF9hZGRyKGFkZHIpCWxzX3BjaWVfcGZfcmVhZGwocGNpZSwgYWRkcikKPiArI2RlZmluZSBs c19wY2llX3BmX2x1dF9yZWFkbF9hZGRyKGFkZHIpCWxzX3BjaWVfcGZfbHV0X3JlYWRsKHBjaWUs IGFkZHIpCj4gICNkZWZpbmUgdG9fbHNfcGNpZSh4KQlkZXZfZ2V0X2RydmRhdGEoKHgpLT5kZXYp Cj4gIAo+ICBzdGF0aWMgYm9vbCBsc19wY2llX2lzX2JyaWRnZShzdHJ1Y3QgbHNfcGNpZSAqcGNp ZSkKPiBAQCAtMTAzLDIwICsxMDMsMjAgQEAgc3RhdGljIHZvaWQgbHNfcGNpZV9maXhfZXJyb3Jf cmVzcG9uc2Uoc3RydWN0IGxzX3BjaWUgKnBjaWUpCj4gIAlpb3dyaXRlMzIoUENJRV9BQlNFUlJf U0VUVElORywgcGNpLT5kYmlfYmFzZSArIFBDSUVfQUJTRVJSKTsKPiAgfQo+ICAKPiAtc3RhdGlj IHUzMiBsc19wY2llX3BmX3JlYWRsKHN0cnVjdCBsc19wY2llICpwY2llLCB1MzIgb2ZmKQo+ICtz dGF0aWMgdTMyIGxzX3BjaWVfcGZfbHV0X3JlYWRsKHN0cnVjdCBsc19wY2llICpwY2llLCB1MzIg b2ZmKQo+ICB7Cj4gIAlpZiAocGNpZS0+YmlnX2VuZGlhbikKPiAtCQlyZXR1cm4gaW9yZWFkMzJi ZShwY2llLT5wZl9iYXNlICsgb2ZmKTsKPiArCQlyZXR1cm4gaW9yZWFkMzJiZShwY2llLT5wZl9s dXRfYmFzZSArIG9mZik7Cj4gIAo+IC0JcmV0dXJuIGlvcmVhZDMyKHBjaWUtPnBmX2Jhc2UgKyBv ZmYpOwo+ICsJcmV0dXJuIGlvcmVhZDMyKHBjaWUtPnBmX2x1dF9iYXNlICsgb2ZmKTsKPiAgfQo+ ICAKPiAtc3RhdGljIHZvaWQgbHNfcGNpZV9wZl93cml0ZWwoc3RydWN0IGxzX3BjaWUgKnBjaWUs IHUzMiBvZmYsIHUzMiB2YWwpCj4gK3N0YXRpYyB2b2lkIGxzX3BjaWVfcGZfbHV0X3dyaXRlbChz dHJ1Y3QgbHNfcGNpZSAqcGNpZSwgdTMyIG9mZiwgdTMyIHZhbCkKPiAgewo+ICAJaWYgKHBjaWUt PmJpZ19lbmRpYW4pCj4gLQkJaW93cml0ZTMyYmUodmFsLCBwY2llLT5wZl9iYXNlICsgb2ZmKTsK PiArCQlpb3dyaXRlMzJiZSh2YWwsIHBjaWUtPnBmX2x1dF9iYXNlICsgb2ZmKTsKPiAgCWVsc2UK PiAtCQlpb3dyaXRlMzIodmFsLCBwY2llLT5wZl9iYXNlICsgb2ZmKTsKPiArCQlpb3dyaXRlMzIo dmFsLCBwY2llLT5wZl9sdXRfYmFzZSArIG9mZik7Cj4gIH0KPiAgCj4gIHN0YXRpYyB2b2lkIGxz X3BjaWVfc2VuZF90dXJub2ZmX21zZyhzdHJ1Y3QgZHdfcGNpZV9ycCAqcHApCj4gQEAgLTEyNiwx MSArMTI2LDExIEBAIHN0YXRpYyB2b2lkIGxzX3BjaWVfc2VuZF90dXJub2ZmX21zZyhzdHJ1Y3Qg ZHdfcGNpZV9ycCAqcHApCj4gIAl1MzIgdmFsOwo+ICAJaW50IHJldDsKPiAgCj4gLQl2YWwgPSBs c19wY2llX3BmX3JlYWRsKHBjaWUsIExTX1BDSUVfUEZfTUNSKTsKPiArCXZhbCA9IGxzX3BjaWVf cGZfbHV0X3JlYWRsKHBjaWUsIExTX1BDSUVfUEZfTUNSKTsKPiAgCXZhbCB8PSBQRl9NQ1JfUFRP TVI7Cj4gLQlsc19wY2llX3BmX3dyaXRlbChwY2llLCBMU19QQ0lFX1BGX01DUiwgdmFsKTsKPiAr CWxzX3BjaWVfcGZfbHV0X3dyaXRlbChwY2llLCBMU19QQ0lFX1BGX01DUiwgdmFsKTsKPiAgCj4g LQlyZXQgPSByZWFkeF9wb2xsX3RpbWVvdXQobHNfcGNpZV9wZl9yZWFkbF9hZGRyLCBMU19QQ0lF X1BGX01DUiwKPiArCXJldCA9IHJlYWR4X3BvbGxfdGltZW91dChsc19wY2llX3BmX2x1dF9yZWFk bF9hZGRyLCBMU19QQ0lFX1BGX01DUiwKPiAgCQkJCSB2YWwsICEodmFsICYgUEZfTUNSX1BUT01S KSwKPiAgCQkJCSBQQ0lFX1BNRV9UT19MMl9USU1FT1VUX1VTLzEwLAo+ICAJCQkJIFBDSUVfUE1F X1RPX0wyX1RJTUVPVVRfVVMpOwo+IEBAIC0xNDksMTUgKzE0OSwxNSBAQCBzdGF0aWMgaW50IGxz X3BjaWVfZXhpdF9mcm9tX2wyKHN0cnVjdCBkd19wY2llX3JwICpwcCkKPiAgCSAqIFNldCBQRl9N Q1JfRVhMMlMgYml0IGluIExTX1BDSUVfUEZfTUNSIHJlZ2lzdGVyIGZvciB0aGUgbGluawo+ICAJ ICogdG8gZXhpdCBMMiBzdGF0ZS4KPiAgCSAqLwo+IC0JdmFsID0gbHNfcGNpZV9wZl9yZWFkbChw Y2llLCBMU19QQ0lFX1BGX01DUik7Cj4gKwl2YWwgPSBsc19wY2llX3BmX2x1dF9yZWFkbChwY2ll LCBMU19QQ0lFX1BGX01DUik7Cj4gIAl2YWwgfD0gUEZfTUNSX0VYTDJTOwo+IC0JbHNfcGNpZV9w Zl93cml0ZWwocGNpZSwgTFNfUENJRV9QRl9NQ1IsIHZhbCk7Cj4gKwlsc19wY2llX3BmX2x1dF93 cml0ZWwocGNpZSwgTFNfUENJRV9QRl9NQ1IsIHZhbCk7Cj4gIAo+ICAJLyoKPiAgCSAqIEwyIGV4 aXQgdGltZW91dCBvZiAxMG1zIGlzIG5vdCBkZWZpbmVkIGluIHRoZSBzcGVjaWZpY2F0aW9ucywK PiAgCSAqIGl0IHdhcyBjaG9zZW4gYmFzZWQgb24gZW1waXJpY2FsIG9ic2VydmF0aW9ucy4KPiAg CSAqLwo+IC0JcmV0ID0gcmVhZHhfcG9sbF90aW1lb3V0KGxzX3BjaWVfcGZfcmVhZGxfYWRkciwg TFNfUENJRV9QRl9NQ1IsCj4gKwlyZXQgPSByZWFkeF9wb2xsX3RpbWVvdXQobHNfcGNpZV9wZl9s dXRfcmVhZGxfYWRkciwgTFNfUENJRV9QRl9NQ1IsCj4gIAkJCQkgdmFsLCAhKHZhbCAmIFBGX01D Ul9FWEwyUyksCj4gIAkJCQkgMTAwMCwKPiAgCQkJCSAxMDAwMCk7Cj4gQEAgLTI0NSw3ICsyNDUs NyBAQCBzdGF0aWMgY29uc3Qgc3RydWN0IGxzX3BjaWVfZHJ2ZGF0YSBsczEwMjFhX2RydmRhdGEg PSB7Cj4gIH07Cj4gIAo+ICBzdGF0aWMgY29uc3Qgc3RydWN0IGxzX3BjaWVfZHJ2ZGF0YSBsYXll cnNjYXBlX2RydmRhdGEgPSB7Cj4gLQkucGZfb2ZmID0gMHhjMDAwMCwKPiArCS5wZl9sdXRfb2Zm ID0gMHhjMDAwMCwKPiAgCS5wbV9zdXBwb3J0ID0gdHJ1ZSwKPiAgCS5leGl0X2Zyb21fbDIgPSBs c19wY2llX2V4aXRfZnJvbV9sMiwKPiAgfTsKPiBAQCAtMjk1LDcgKzI5NSw3IEBAIHN0YXRpYyBp bnQgbHNfcGNpZV9wcm9iZShzdHJ1Y3QgcGxhdGZvcm1fZGV2aWNlICpwZGV2KQo+ICAKPiAgCXBj aWUtPmJpZ19lbmRpYW4gPSBvZl9wcm9wZXJ0eV9yZWFkX2Jvb2woZGV2LT5vZl9ub2RlLCAiYmln LWVuZGlhbiIpOwo+ICAKPiAtCXBjaWUtPnBmX2Jhc2UgPSBwY2ktPmRiaV9iYXNlICsgcGNpZS0+ ZHJ2ZGF0YS0+cGZfb2ZmOwo+ICsJcGNpZS0+cGZfbHV0X2Jhc2UgPSBwY2ktPmRiaV9iYXNlICsg cGNpZS0+ZHJ2ZGF0YS0+cGZfbHV0X29mZjsKPiAgCj4gIAlpZiAocGNpZS0+ZHJ2ZGF0YS0+Zmxh Z3MgJiBMU19QQ0lFX0RSVl9TQ0ZHKSB7Cj4gIAo+IC0tIAo+IDIuMzQuMQo+IAoKLS0gCuCuruCu o+Cuv+CuteCuo+CvjeCuo+CuqeCvjSDgrprgrqTgrr7grprgrr/grrXgrq7gr40KCl9fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmxpbnV4LWFybS1rZXJuZWwg bWFpbGluZyBsaXN0CmxpbnV4LWFybS1rZXJuZWxAbGlzdHMuaW5mcmFkZWFkLm9yZwpodHRwOi8v bGlzdHMuaW5mcmFkZWFkLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2xpbnV4LWFybS1rZXJuZWwK