From: Sunil V L <sunilvl@ventanamicro.com>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org, qemu-riscv@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Shannon Zhao" <shannon.zhaosl@gmail.com>,
"Michael S . Tsirkin" <mst@redhat.com>,
"Igor Mammedov" <imammedo@redhat.com>,
"Ani Sinha" <anisinha@redhat.com>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Eduardo Habkost" <eduardo@habkost.net>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Gerd Hoffmann" <kraxel@redhat.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Alistair Francis" <alistair.francis@wdc.com>,
"Bin Meng" <bin.meng@windriver.com>,
"Weiwei Li" <liweiwei@iscas.ac.cn>,
"Daniel Henrique Barboza" <dbarboza@ventanamicro.com>,
"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
"Anup Patel" <apatel@ventanamicro.com>,
"Atish Kumar Patra" <atishp@rivosinc.com>,
"Haibo Xu" <haibo1.xu@intel.com>,
"Sunil V L" <sunilvl@ventanamicro.com>,
"Andrew Jones" <ajones@ventanamicro.com>
Subject: [PATCH v7 08/13] hw/riscv/virt-acpi-build.c: Add CMO information in RHCT
Date: Fri, 3 Nov 2023 08:46:44 +0530 [thread overview]
Message-ID: <20231103031649.2769834-9-sunilvl@ventanamicro.com> (raw)
In-Reply-To: <20231103031649.2769834-1-sunilvl@ventanamicro.com>
When CMO related extensions like Zicboz, Zicbom and Zicbop are enabled, the
block size for those extensions need to be communicated via CMO node in
RHCT. Add CMO node in RHCT if any of those CMO extensions are detected.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/riscv/virt-acpi-build.c | 64 +++++++++++++++++++++++++++++++++-----
1 file changed, 56 insertions(+), 8 deletions(-)
diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
index ec49c8804b..506d487ede 100644
--- a/hw/riscv/virt-acpi-build.c
+++ b/hw/riscv/virt-acpi-build.c
@@ -140,6 +140,7 @@ static void acpi_dsdt_add_cpus(Aml *scope, RISCVVirtState *s)
* 5.2.36 RISC-V Hart Capabilities Table (RHCT)
* REF: https://github.com/riscv-non-isa/riscv-acpi/issues/16
* https://drive.google.com/file/d/1nP3nFiH4jkPMp6COOxP6123DCZKR-tia/view
+ * https://drive.google.com/file/d/1sKbOa8m1UZw1JkquZYe3F1zQBN1xXsaf/view
*/
static void build_rhct(GArray *table_data,
BIOSLinker *linker,
@@ -149,8 +150,8 @@ static void build_rhct(GArray *table_data,
MachineState *ms = MACHINE(s);
const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(ms);
size_t len, aligned_len;
- uint32_t isa_offset, num_rhct_nodes;
- RISCVCPU *cpu;
+ uint32_t isa_offset, num_rhct_nodes, cmo_offset = 0;
+ RISCVCPU *cpu = &s->soc[0].harts[0];
char *isa;
AcpiTable table = { .sig = "RHCT", .rev = 1, .oem_id = s->oem_id,
@@ -166,6 +167,9 @@ static void build_rhct(GArray *table_data,
/* ISA + N hart info */
num_rhct_nodes = 1 + ms->smp.cpus;
+ if (cpu->cfg.ext_zicbom || cpu->cfg.ext_zicboz) {
+ num_rhct_nodes++;
+ }
/* Number of RHCT nodes*/
build_append_int_noprefix(table_data, num_rhct_nodes, 4);
@@ -177,7 +181,6 @@ static void build_rhct(GArray *table_data,
isa_offset = table_data->len - table.table_offset;
build_append_int_noprefix(table_data, 0, 2); /* Type 0 */
- cpu = &s->soc[0].harts[0];
isa = riscv_isa_string(cpu);
len = 8 + strlen(isa) + 1;
aligned_len = (len % 2) ? (len + 1) : len;
@@ -193,14 +196,59 @@ static void build_rhct(GArray *table_data,
build_append_int_noprefix(table_data, 0x0, 1); /* Optional Padding */
}
+ /* CMO node */
+ if (cpu->cfg.ext_zicbom || cpu->cfg.ext_zicboz) {
+ cmo_offset = table_data->len - table.table_offset;
+ build_append_int_noprefix(table_data, 1, 2); /* Type */
+ build_append_int_noprefix(table_data, 10, 2); /* Length */
+ build_append_int_noprefix(table_data, 0x1, 2); /* Revision */
+ build_append_int_noprefix(table_data, 0, 1); /* Reserved */
+
+ /* CBOM block size */
+ if (cpu->cfg.cbom_blocksize) {
+ build_append_int_noprefix(table_data,
+ __builtin_ctz(cpu->cfg.cbom_blocksize),
+ 1);
+ } else {
+ build_append_int_noprefix(table_data, 0, 1);
+ }
+
+ /* CBOP block size */
+ build_append_int_noprefix(table_data, 0, 1);
+
+ /* CBOZ block size */
+ if (cpu->cfg.cboz_blocksize) {
+ build_append_int_noprefix(table_data,
+ __builtin_ctz(cpu->cfg.cboz_blocksize),
+ 1);
+ } else {
+ build_append_int_noprefix(table_data, 0, 1);
+ }
+ }
+
/* Hart Info Node */
for (int i = 0; i < arch_ids->len; i++) {
+ len = 16;
+ int num_offsets = 1;
build_append_int_noprefix(table_data, 0xFFFF, 2); /* Type */
- build_append_int_noprefix(table_data, 16, 2); /* Length */
- build_append_int_noprefix(table_data, 0x1, 2); /* Revision */
- build_append_int_noprefix(table_data, 1, 2); /* Number of offsets */
- build_append_int_noprefix(table_data, i, 4); /* ACPI Processor UID */
- build_append_int_noprefix(table_data, isa_offset, 4); /* Offsets[0] */
+
+ /* Length */
+ if (cmo_offset) {
+ len += 4;
+ num_offsets++;
+ }
+
+ build_append_int_noprefix(table_data, len, 2);
+ build_append_int_noprefix(table_data, 0x1, 2); /* Revision */
+ /* Number of offsets */
+ build_append_int_noprefix(table_data, num_offsets, 2);
+ build_append_int_noprefix(table_data, i, 4); /* ACPI Processor UID */
+
+ /* Offsets */
+ build_append_int_noprefix(table_data, isa_offset, 4);
+ if (cmo_offset) {
+ build_append_int_noprefix(table_data, cmo_offset, 4);
+ }
}
acpi_table_end(linker, &table);
--
2.39.2
next prev parent reply other threads:[~2023-11-03 3:19 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-03 3:16 [PATCH v7 00/13] RISC-V: ACPI: Enable AIA, PLIC and update RHCT Sunil V L
2023-11-03 3:16 ` [PATCH v7 01/13] hw/arm/virt-acpi-build.c: Migrate fw_cfg creation to common location Sunil V L
2023-11-03 3:16 ` [PATCH v7 02/13] hw/arm/virt-acpi-build.c: Migrate virtio " Sunil V L
2023-11-03 3:16 ` [PATCH v7 03/13] hw/i386/acpi-microvm.c: Use common function to add virtio in DSDT Sunil V L
2023-11-03 3:16 ` [PATCH v7 04/13] hw/riscv: virt: Make few IMSIC macros and functions public Sunil V L
2023-11-03 3:16 ` [PATCH v7 05/13] hw/riscv/virt-acpi-build.c: Add AIA support in RINTC Sunil V L
2023-11-03 3:16 ` [PATCH v7 06/13] hw/riscv/virt-acpi-build.c: Add IMSIC in the MADT Sunil V L
2023-11-03 3:16 ` [PATCH v7 07/13] hw/riscv/virt-acpi-build.c: Add APLIC " Sunil V L
2023-11-03 3:16 ` Sunil V L [this message]
2023-11-03 3:16 ` [PATCH v7 09/13] hw/riscv/virt-acpi-build.c: Add MMU node in RHCT Sunil V L
2023-11-03 3:16 ` [PATCH v7 10/13] hw/pci-host/gpex: Define properties for MMIO ranges Sunil V L
2023-11-06 17:37 ` Michael S. Tsirkin
2023-11-03 3:16 ` [PATCH v7 11/13] hw/riscv/virt: Update GPEX MMIO related properties Sunil V L
2023-11-03 3:16 ` [PATCH v7 12/13] hw/riscv/virt-acpi-build.c: Add IO controllers and devices Sunil V L
2023-11-03 3:16 ` [PATCH v7 13/13] hw/riscv/virt-acpi-build.c: Add PLIC in MADT Sunil V L
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