From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B3363C001B2 for ; Mon, 6 Nov 2023 18:56:58 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3FF0210E3D4; Mon, 6 Nov 2023 18:56:56 +0000 (UTC) X-Greylist: delayed 91026 seconds by postgrey-1.36 at gabe; Mon, 06 Nov 2023 18:56:54 UTC Received: from bmailout1.hostsharing.net (bmailout1.hostsharing.net [IPv6:2a01:37:1000::53df:5f64:0]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0A15510E3D1; Mon, 6 Nov 2023 18:56:54 +0000 (UTC) Received: from h08.hostsharing.net (h08.hostsharing.net [83.223.95.28]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "*.hostsharing.net", Issuer "RapidSSL Global TLS RSA4096 SHA256 2022 CA1" (verified OK)) by bmailout1.hostsharing.net (Postfix) with ESMTPS id 65FC1300002D5; Mon, 6 Nov 2023 19:56:52 +0100 (CET) Received: by h08.hostsharing.net (Postfix, from userid 100393) id 56AB4119432; Mon, 6 Nov 2023 19:56:52 +0100 (CET) Date: Mon, 6 Nov 2023 19:56:52 +0100 From: Lukas Wunner To: Mario Limonciello Subject: Re: [PATCH v2 8/9] PCI: Exclude PCIe ports used for tunneling in pcie_bandwidth_available() Message-ID: <20231106185652.GA3360@wunner.de> References: <20231103190758.82911-1-mario.limonciello@amd.com> <20231103190758.82911-9-mario.limonciello@amd.com> <20231106181022.GA18564@wunner.de> <712ebb25-3fc0-49b5-96a1-a13c3c4c4921@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <712ebb25-3fc0-49b5-96a1-a13c3c4c4921@amd.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "open list:THUNDERBOLT DRIVER" , Karol Herbst , "Rafael J . Wysocki" , "open list:DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS" , "open list:DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS" , "open list:X86 PLATFORM DRIVERS" , Andreas Noever , Alex Deucher , David Airlie , Marek =?iso-8859-1?Q?Beh=FAn?= , "open list:RADEON and AMDGPU DRM DRIVERS" , "open list:ACPI" , Danilo Krummrich , "open list:PCI SUBSYSTEM" , Ilpo =?iso-8859-1?Q?J=E4rvinen?= , Manivannan Sadhasivam , Michael Jamet , Mark Gross , Hans de Goede , Bjorn Helgaas , Mika Westerberg , Xinhui Pan , open list , Daniel Vetter , Yehezkel Bernat , Pali =?iso-8859-1?Q?Roh=E1r?= , Christian =?iso-8859-1?Q?K=F6nig?= , "Maciej W . Rozycki" Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" On Mon, Nov 06, 2023 at 12:44:25PM -0600, Mario Limonciello wrote: > Tangentially related; the link speed is currently symmetric but there are > two sysfs files. Mika left a comment in drivers/thunderbolt/switch.c it may > be asymmetric in the future. So we may need to keep that in mind on any > design that builds on top of them. Aren't asymmetric Thunderbolt speeds just a DisplayPort thing? > As 'thunderbolt' can be a module or built in, we need to bring code into PCI > core so that it works in early boot before it loads. tb_switch_get_generation() is small enough that it could be moved to the PCI core. I doubt that we need to make thunderbolt built-in only or move a large amount of code to the PCI core. Thanks, Lukas From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DAC1ADDBB; Mon, 6 Nov 2023 18:56:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=none Received: from bmailout1.hostsharing.net (bmailout1.hostsharing.net [IPv6:2a01:37:1000::53df:5f64:0]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E2239D8; Mon, 6 Nov 2023 10:56:53 -0800 (PST) Received: from h08.hostsharing.net (h08.hostsharing.net [83.223.95.28]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "*.hostsharing.net", Issuer "RapidSSL Global TLS RSA4096 SHA256 2022 CA1" (verified OK)) by bmailout1.hostsharing.net (Postfix) with ESMTPS id 65FC1300002D5; Mon, 6 Nov 2023 19:56:52 +0100 (CET) Received: by h08.hostsharing.net (Postfix, from userid 100393) id 56AB4119432; Mon, 6 Nov 2023 19:56:52 +0100 (CET) Date: Mon, 6 Nov 2023 19:56:52 +0100 From: Lukas Wunner To: Mario Limonciello Cc: Karol Herbst , Lyude Paul , Alex Deucher , Christian =?iso-8859-1?Q?K=F6nig?= , Bjorn Helgaas , Hans de Goede , Ilpo =?iso-8859-1?Q?J=E4rvinen?= , Mika Westerberg , Danilo Krummrich , David Airlie , Daniel Vetter , Xinhui Pan , "Rafael J . Wysocki" , Mark Gross , Andreas Noever , Michael Jamet , Yehezkel Bernat , Pali =?iso-8859-1?Q?Roh=E1r?= , Marek =?iso-8859-1?Q?Beh=FAn?= , "Maciej W . Rozycki" , Manivannan Sadhasivam , "open list:DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS" , "open list:DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS" , open list , "open list:RADEON and AMDGPU DRM DRIVERS" , "open list:PCI SUBSYSTEM" , "open list:ACPI" , "open list:X86 PLATFORM DRIVERS" , "open list:THUNDERBOLT DRIVER" Subject: Re: [PATCH v2 8/9] PCI: Exclude PCIe ports used for tunneling in pcie_bandwidth_available() Message-ID: <20231106185652.GA3360@wunner.de> References: <20231103190758.82911-1-mario.limonciello@amd.com> <20231103190758.82911-9-mario.limonciello@amd.com> <20231106181022.GA18564@wunner.de> <712ebb25-3fc0-49b5-96a1-a13c3c4c4921@amd.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <712ebb25-3fc0-49b5-96a1-a13c3c4c4921@amd.com> User-Agent: Mutt/1.10.1 (2018-07-13) On Mon, Nov 06, 2023 at 12:44:25PM -0600, Mario Limonciello wrote: > Tangentially related; the link speed is currently symmetric but there are > two sysfs files. Mika left a comment in drivers/thunderbolt/switch.c it may > be asymmetric in the future. So we may need to keep that in mind on any > design that builds on top of them. Aren't asymmetric Thunderbolt speeds just a DisplayPort thing? > As 'thunderbolt' can be a module or built in, we need to bring code into PCI > core so that it works in early boot before it loads. tb_switch_get_generation() is small enough that it could be moved to the PCI core. I doubt that we need to make thunderbolt built-in only or move a large amount of code to the PCI core. Thanks, Lukas From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 64A7CC4167D for ; Mon, 6 Nov 2023 18:56:56 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 068E310E3D1; Mon, 6 Nov 2023 18:56:56 +0000 (UTC) X-Greylist: delayed 91026 seconds by postgrey-1.36 at gabe; Mon, 06 Nov 2023 18:56:54 UTC Received: from bmailout1.hostsharing.net (bmailout1.hostsharing.net [IPv6:2a01:37:1000::53df:5f64:0]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0A15510E3D1; Mon, 6 Nov 2023 18:56:54 +0000 (UTC) Received: from h08.hostsharing.net (h08.hostsharing.net [83.223.95.28]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "*.hostsharing.net", Issuer "RapidSSL Global TLS RSA4096 SHA256 2022 CA1" (verified OK)) by bmailout1.hostsharing.net (Postfix) with ESMTPS id 65FC1300002D5; Mon, 6 Nov 2023 19:56:52 +0100 (CET) Received: by h08.hostsharing.net (Postfix, from userid 100393) id 56AB4119432; Mon, 6 Nov 2023 19:56:52 +0100 (CET) Date: Mon, 6 Nov 2023 19:56:52 +0100 From: Lukas Wunner To: Mario Limonciello Message-ID: <20231106185652.GA3360@wunner.de> References: <20231103190758.82911-1-mario.limonciello@amd.com> <20231103190758.82911-9-mario.limonciello@amd.com> <20231106181022.GA18564@wunner.de> <712ebb25-3fc0-49b5-96a1-a13c3c4c4921@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <712ebb25-3fc0-49b5-96a1-a13c3c4c4921@amd.com> User-Agent: Mutt/1.10.1 (2018-07-13) Subject: Re: [Nouveau] [PATCH v2 8/9] PCI: Exclude PCIe ports used for tunneling in pcie_bandwidth_available() X-BeenThere: nouveau@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Nouveau development list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "open list:THUNDERBOLT DRIVER" , "Rafael J . Wysocki" , "open list:DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS" , "open list:DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS" , "open list:X86 PLATFORM DRIVERS" , Andreas Noever , Alex Deucher , Marek =?iso-8859-1?Q?Beh=FAn?= , "open list:RADEON and AMDGPU DRM DRIVERS" , "open list:ACPI" , "open list:PCI SUBSYSTEM" , Ilpo =?iso-8859-1?Q?J=E4rvinen?= , Manivannan Sadhasivam , Michael Jamet , Mark Gross , Hans de Goede , Bjorn Helgaas , Mika Westerberg , Xinhui Pan , open list , Daniel Vetter , Yehezkel Bernat , Pali =?iso-8859-1?Q?Roh=E1r?= , Christian =?iso-8859-1?Q?K=F6nig?= , "Maciej W . Rozycki" Errors-To: nouveau-bounces@lists.freedesktop.org Sender: "Nouveau" On Mon, Nov 06, 2023 at 12:44:25PM -0600, Mario Limonciello wrote: > Tangentially related; the link speed is currently symmetric but there are > two sysfs files. Mika left a comment in drivers/thunderbolt/switch.c it may > be asymmetric in the future. So we may need to keep that in mind on any > design that builds on top of them. Aren't asymmetric Thunderbolt speeds just a DisplayPort thing? > As 'thunderbolt' can be a module or built in, we need to bring code into PCI > core so that it works in early boot before it loads. tb_switch_get_generation() is small enough that it could be moved to the PCI core. I doubt that we need to make thunderbolt built-in only or move a large amount of code to the PCI core. Thanks, Lukas From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DF933C4167B for ; Mon, 6 Nov 2023 18:56:56 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 33EBD10E3D3; Mon, 6 Nov 2023 18:56:56 +0000 (UTC) X-Greylist: delayed 91026 seconds by postgrey-1.36 at gabe; Mon, 06 Nov 2023 18:56:54 UTC Received: from bmailout1.hostsharing.net (bmailout1.hostsharing.net [IPv6:2a01:37:1000::53df:5f64:0]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0A15510E3D1; Mon, 6 Nov 2023 18:56:54 +0000 (UTC) Received: from h08.hostsharing.net (h08.hostsharing.net [83.223.95.28]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "*.hostsharing.net", Issuer "RapidSSL Global TLS RSA4096 SHA256 2022 CA1" (verified OK)) by bmailout1.hostsharing.net (Postfix) with ESMTPS id 65FC1300002D5; Mon, 6 Nov 2023 19:56:52 +0100 (CET) Received: by h08.hostsharing.net (Postfix, from userid 100393) id 56AB4119432; Mon, 6 Nov 2023 19:56:52 +0100 (CET) Date: Mon, 6 Nov 2023 19:56:52 +0100 From: Lukas Wunner To: Mario Limonciello Subject: Re: [PATCH v2 8/9] PCI: Exclude PCIe ports used for tunneling in pcie_bandwidth_available() Message-ID: <20231106185652.GA3360@wunner.de> References: <20231103190758.82911-1-mario.limonciello@amd.com> <20231103190758.82911-9-mario.limonciello@amd.com> <20231106181022.GA18564@wunner.de> <712ebb25-3fc0-49b5-96a1-a13c3c4c4921@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <712ebb25-3fc0-49b5-96a1-a13c3c4c4921@amd.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "open list:THUNDERBOLT DRIVER" , Karol Herbst , "Rafael J . Wysocki" , "open list:DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS" , "open list:DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS" , "open list:X86 PLATFORM DRIVERS" , Andreas Noever , Alex Deucher , Marek =?iso-8859-1?Q?Beh=FAn?= , "open list:RADEON and AMDGPU DRM DRIVERS" , "open list:ACPI" , Danilo Krummrich , "open list:PCI SUBSYSTEM" , Ilpo =?iso-8859-1?Q?J=E4rvinen?= , Manivannan Sadhasivam , Michael Jamet , Mark Gross , Hans de Goede , Bjorn Helgaas , Mika Westerberg , Xinhui Pan , open list , Yehezkel Bernat , Pali =?iso-8859-1?Q?Roh=E1r?= , Christian =?iso-8859-1?Q?K=F6nig?= , "Maciej W . Rozycki" Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Mon, Nov 06, 2023 at 12:44:25PM -0600, Mario Limonciello wrote: > Tangentially related; the link speed is currently symmetric but there are > two sysfs files. Mika left a comment in drivers/thunderbolt/switch.c it may > be asymmetric in the future. So we may need to keep that in mind on any > design that builds on top of them. Aren't asymmetric Thunderbolt speeds just a DisplayPort thing? > As 'thunderbolt' can be a module or built in, we need to bring code into PCI > core so that it works in early boot before it loads. tb_switch_get_generation() is small enough that it could be moved to the PCI core. I doubt that we need to make thunderbolt built-in only or move a large amount of code to the PCI core. Thanks, Lukas