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From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
To: intel-xe@lists.freedesktop.org
Subject: [Intel-xe] [PATCH 5/9] drm/xe: Update headers to be more compatible with i915
Date: Thu,  9 Nov 2023 16:07:55 +0100	[thread overview]
Message-ID: <20231109150759.44549-6-maarten.lankhorst@linux.intel.com> (raw)
In-Reply-To: <20231109150759.44549-1-maarten.lankhorst@linux.intel.com>

Add more compatibility changes to decrease delta with i915.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
 .../compat-i915-headers/gem/i915_gem_lmem.h   |  2 +
 .../compat-i915-headers/gem/i915_gem_mman.h   | 17 +++++
 .../compat-i915-headers/gem/i915_gem_object.h | 76 +++++++++++++++++++
 .../gem/i915_gem_object_frontbuffer.h         |  4 +-
 .../xe/compat-i915-headers/i915_gem_stolen.h  | 13 +++-
 .../gpu/drm/xe/compat-i915-headers/i915_vma.h |  6 ++
 6 files changed, 113 insertions(+), 5 deletions(-)
 create mode 100644 drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_lmem.h
 create mode 100644 drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_mman.h
 create mode 100644 drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h

diff --git a/drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_lmem.h b/drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_lmem.h
new file mode 100644
index 0000000000000..2f55e7e951e8c
--- /dev/null
+++ b/drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_lmem.h
@@ -0,0 +1,2 @@
+/* Empty */
+
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_mman.h b/drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_mman.h
new file mode 100644
index 0000000000000..650ea2803a97c
--- /dev/null
+++ b/drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_mman.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#ifndef _I915_GEM_MMAN_H_
+#define _I915_GEM_MMAN_H_
+
+#include "xe_bo_types.h"
+#include <drm/drm_prime.h>
+
+static inline int i915_gem_fb_mmap(struct xe_bo *bo, struct vm_area_struct *vma)
+{
+	return drm_gem_prime_mmap(&bo->ttm.base, vma);
+}
+
+#endif
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h b/drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h
new file mode 100644
index 0000000000000..17620412eddde
--- /dev/null
+++ b/drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h
@@ -0,0 +1,76 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#ifndef _I915_GEM_OBJECT_H_
+#define _I915_GEM_OBJECT_H_
+
+/* For tiling definitions */
+#include <uapi/drm/i915_drm.h>
+
+#undef I915_TILING_X
+#undef I915_TILING_Y
+#define I915_TILING_X 0
+#define I915_TILING_Y 0
+
+#include "xe_bo.h"
+#include <linux/types.h>
+
+static inline int i915_gem_object_read_from_page(struct xe_bo *bo,
+						 u32 ofs, u64 *ptr, u32 size)
+{
+	struct ttm_bo_kmap_obj map;
+	void *virtual;
+	bool is_iomem;
+	int ret;
+
+	WARN_ON(size != 8);
+
+	ret = xe_bo_lock(bo, true);
+	if (ret)
+		return ret;
+
+	ret = ttm_bo_kmap(&bo->ttm, ofs >> PAGE_SHIFT, 1, &map);
+	if (ret)
+		goto out_unlock;
+
+	ofs &= ~PAGE_MASK;
+	virtual = ttm_kmap_obj_virtual(&map, &is_iomem);
+	if (is_iomem)
+		*ptr = readq((void __iomem *)(virtual + ofs));
+	else
+		*ptr = *(u64 *)(virtual + ofs);
+
+	ttm_bo_kunmap(&map);
+out_unlock:
+	xe_bo_unlock(bo);
+	return ret;
+}
+
+static inline dma_addr_t i915_gem_object_get_dma_address(const struct xe_bo *bo, pgoff_t n)
+{
+	/* Should never be called */
+	WARN_ON(1);
+	return n;
+}
+
+/* Useful for kernel managed objects only */
+static inline bool i915_gem_object_is_shmem(const struct xe_bo *bo)
+{
+	return bo->flags & XE_BO_CREATE_SYSTEM_BIT;
+}
+
+static inline bool i915_gem_object_is_tiled(const struct xe_bo *bo)
+{
+	/* legacy tiling is unused */
+	return false;
+}
+
+static inline bool i915_gem_object_is_userptr(const struct xe_bo *bo)
+{
+	/* legacy tiling is unused */
+	return false;
+}
+
+#endif
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object_frontbuffer.h b/drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object_frontbuffer.h
index 227965e5f7846..6d883aca48b6e 100644
--- a/drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object_frontbuffer.h
+++ b/drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object_frontbuffer.h
@@ -3,8 +3,8 @@
  * Copyright © 2022 Intel Corporation
  */
 
-#ifndef _I915_GEM_OBJECT_H_
-#define _I915_GEM_OBJECT_H_
+#ifndef _I915_GEM_OBJECT_FB_H_
+#define _I915_GEM_OBJECT_FB_H_
 
 #define i915_gem_object_get_frontbuffer(obj)		NULL
 #define i915_gem_object_set_frontbuffer(obj, front)	(front)
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_gem_stolen.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_gem_stolen.h
index 32f60258ded69..19bf463cfd3d2 100644
--- a/drivers/gpu/drm/xe/compat-i915-headers/i915_gem_stolen.h
+++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_gem_stolen.h
@@ -1,5 +1,5 @@
-#ifndef _I915_GEM_OBJECT_H_
-#define _I915_GEM_OBJECT_H_
+#ifndef _I915_GEM_STOLEN_H_
+#define _I915_GEM_STOLEN_H_
 
 #include "xe_ttm_stolen_mgr.h"
 #include "xe_res_cursor.h"
@@ -70,7 +70,14 @@ static inline u32 i915_gem_stolen_node_offset(struct i915_stolen_fb *fb)
 /* Used for < gen4. These are not supported by Xe */
 #define i915_gem_stolen_area_address(xe) (!WARN_ON(1))
 /* Used for gen9 specific WA. Gen9 is not supported by Xe */
-#define i915_gem_stolen_area_size(xe) (!WARN_ON(1))
+static inline u64 i915_gem_stolen_area_size(struct xe_device *xe)
+{
+	struct ttm_resource_manager *ttm_mgr = ttm_manager_type(&xe->ttm, XE_PL_STOLEN);
+
+	if (!ttm_mgr)
+		return 0;
+	return ttm_mgr->size;
+}
 
 #define i915_gem_stolen_node_address(xe, fb) (xe_ttm_stolen_gpu_offset(xe) + \
 					 i915_gem_stolen_node_offset(fb))
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_vma.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_vma.h
index 9424144b1b5aa..23f2d037c313e 100644
--- a/drivers/gpu/drm/xe/compat-i915-headers/i915_vma.h
+++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_vma.h
@@ -19,4 +19,10 @@ struct i915_vma {
 #define i915_ggtt_clear_scanout(bo) do { } while (0)
 
 #define i915_vma_fence_id(vma) -1
+
+static inline u32 i915_ggtt_offset(const struct i915_vma *vma)
+{
+	return vma->node.start;
+}
+
 #endif
-- 
2.39.2


  parent reply	other threads:[~2023-11-09 15:08 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-09 15:07 [Intel-xe] [PATCH 0/9] Break up remaining changes to make xe compile Maarten Lankhorst
2023-11-09 15:07 ` [Intel-xe] [PATCH 1/9] drm/i915: Use drm_atomic_helper_wait_for_fences helper Maarten Lankhorst
2023-11-10 11:33   ` [Intel-xe] [1/9] " Hogander, Jouni
2023-11-09 15:07 ` [Intel-xe] [PATCH 2/9] fixup! drm/xe/display: Implement display support Maarten Lankhorst
2023-11-09 15:07 ` [Intel-xe] [PATCH 3/9] drm/i915/display: Revert all before remaining changes to make xe compile Maarten Lankhorst
2023-11-10 11:41   ` [Intel-xe] [3/9] " Hogander, Jouni
2023-11-09 15:07 ` [Intel-xe] [PATCH 4/9] drm/i915/display: Revert " Maarten Lankhorst
2023-11-09 15:07 ` Maarten Lankhorst [this message]
2023-11-09 15:07 ` [Intel-xe] [PATCH 6/9] FIXME drm/i915/display: add_dma_resv_fences is i915 only Maarten Lankhorst
2023-11-10 11:56   ` [Intel-xe] [6/9] " Hogander, Jouni
2023-11-09 15:07 ` [Intel-xe] [PATCH 7/9] drm/i915/display: Use i915_gem_object_get_dma_address to get dma address Maarten Lankhorst
2023-11-10 12:02   ` [Intel-xe] [7/9] " Hogander, Jouni
2023-11-09 15:07 ` [Intel-xe] [PATCH 8/9] FIXME drm/i915/display: Minimal changes to fbdev to make xe work Maarten Lankhorst
2023-11-09 15:07 ` [Intel-xe] [PATCH 9/9] FIXME drm/i915/display: Make intel_fb.c code compatible with xe Maarten Lankhorst
2023-11-09 15:14 ` [Intel-xe] ✗ CI.Patch_applied: failure for Break up remaining changes to make xe compile Patchwork
2023-11-15 23:31 ` [Intel-xe] ✗ CI.Patch_applied: failure for Break up remaining changes to make xe compile. (rev2) Patchwork
2023-11-17 21:37 ` Patchwork

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