All of lore.kernel.org
 help / color / mirror / Atom feed
From: Jisheng Zhang <jszhang@kernel.org>
To: Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>, Chao Wei <chao.wei@sophgo.com>,
	Chen Wang <unicorn_wang@outlook.com>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org
Subject: [PATCH 2/2] riscv: dts: sophgo: set pinctrl for uart0
Date: Mon, 13 Nov 2023 08:57:02 +0800	[thread overview]
Message-ID: <20231113005702.2467-3-jszhang@kernel.org> (raw)
In-Reply-To: <20231113005702.2467-1-jszhang@kernel.org>

Although the mux function is uart by default, add it for
completeness.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
---
 arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
index 3af9e34b3bc7..cc10688908bc 100644
--- a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
+++ b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
@@ -33,6 +33,17 @@ &osc {
 	clock-frequency = <25000000>;
 };
 
+&pinctrl0 {
+	uart0_pins: uart0-pins {
+		pinctrl-single,pins = <
+			0x24 MUX_M0 /* UART0_TX */
+			0x28 MUX_M0 /* UART0_RX */
+		>;
+	};
+};
+
 &uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_pins>;
 	status = "okay";
 };
-- 
2.42.0


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Jisheng Zhang <jszhang@kernel.org>
To: Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>, Chao Wei <chao.wei@sophgo.com>,
	Chen Wang <unicorn_wang@outlook.com>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org
Subject: [PATCH 2/2] riscv: dts: sophgo: set pinctrl for uart0
Date: Mon, 13 Nov 2023 08:57:02 +0800	[thread overview]
Message-ID: <20231113005702.2467-3-jszhang@kernel.org> (raw)
In-Reply-To: <20231113005702.2467-1-jszhang@kernel.org>

Although the mux function is uart by default, add it for
completeness.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
---
 arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
index 3af9e34b3bc7..cc10688908bc 100644
--- a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
+++ b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
@@ -33,6 +33,17 @@ &osc {
 	clock-frequency = <25000000>;
 };
 
+&pinctrl0 {
+	uart0_pins: uart0-pins {
+		pinctrl-single,pins = <
+			0x24 MUX_M0 /* UART0_TX */
+			0x28 MUX_M0 /* UART0_RX */
+		>;
+	};
+};
+
 &uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_pins>;
 	status = "okay";
 };
-- 
2.42.0


  parent reply	other threads:[~2023-11-13  1:09 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-13  0:57 [PATCH 0/2] riscv: sophgo: add pinctrl support for cv1800b Jisheng Zhang
2023-11-13  0:57 ` Jisheng Zhang
2023-11-13  0:57 ` [PATCH 1/2] riscv: dts: cv1800b: add pinctrl node " Jisheng Zhang
2023-11-13  0:57   ` Jisheng Zhang
2023-11-13  1:51   ` Samuel Holland
2023-11-13  1:51     ` Samuel Holland
2023-11-13 13:03     ` Jisheng Zhang
2023-11-13 13:03       ` Jisheng Zhang
2023-11-13 13:29       ` Conor Dooley
2023-11-13 13:29         ` Conor Dooley
2023-11-13 13:49         ` Samuel Holland
2023-11-13 13:49           ` Samuel Holland
2023-11-14  1:38   ` Chen Wang
2023-11-14  1:38     ` Chen Wang
2023-11-14 14:46     ` Jisheng Zhang
2023-11-14 14:46       ` Jisheng Zhang
2023-11-14  2:07   ` Chen Wang
2023-11-14  2:07     ` Chen Wang
2023-11-16 16:36   ` Rob Herring
2023-11-16 16:36     ` Rob Herring
2023-11-13  0:57 ` Jisheng Zhang [this message]
2023-11-13  0:57   ` [PATCH 2/2] riscv: dts: sophgo: set pinctrl for uart0 Jisheng Zhang
2024-01-17  9:03 ` [PATCH 0/2] riscv: sophgo: add pinctrl support for cv1800b Chen Wang
2024-01-17  9:03   ` Chen Wang
2024-01-18  1:23   ` Jisheng Zhang
2024-01-18  1:23     ` Jisheng Zhang
2024-06-12  5:02 ` Inochi Amaoto
2024-06-12  5:02   ` Inochi Amaoto

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20231113005702.2467-3-jszhang@kernel.org \
    --to=jszhang@kernel.org \
    --cc=aou@eecs.berkeley.edu \
    --cc=chao.wei@sophgo.com \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=krzysztof.kozlowski+dt@linaro.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=palmer@dabbelt.com \
    --cc=paul.walmsley@sifive.com \
    --cc=robh+dt@kernel.org \
    --cc=unicorn_wang@outlook.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.