[PATCH] arm64: dts: imx8dxl-ss-conn: Fix Ethernet interrupt-names order

From: Fabio Estevam <festevam@gmail.com>
To: shawnguo@kernel.org
Cc: Frank.Li@nxp.com, linux-arm-kernel@lists.infradead.org,
	Fabio Estevam <festevam@denx.de>
Subject: [PATCH] arm64: dts: imx8dxl-ss-conn: Fix Ethernet interrupt-names order
Date: Mon, 13 Nov 2023 16:35:48 -0300	[thread overview]
Message-ID: <20231113193548.28382-1-festevam@gmail.com> (raw)

From: Fabio Estevam <festevam@denx.de>

Per snps,dwmac.yaml, the interrupt-names entries should be in the
following order: "macirq", "eth_wake_irq";

Change it to fix the following schema warnings.

imx8dxl-evk.dtb: ethernet@5b050000: interrupt-names:0: 'macirq' was expected
	from schema $id: http://devicetree.org/schemas/net/snps,dwmac.yaml#
imx8dxl-evk.dtb: ethernet@5b050000: interrupt-names:1: 'macirq' is not one of ['eth_wake_irq', 'eth_lpi']
	from schema $id: http://devicetree.org/schemas/net/snps,dwmac.yaml#

Signed-off-by: Fabio Estevam <festevam@denx.de>
---
Frank,

imx8dl Reference Manual is not available at NXP website, so
I cannot check the interrupt map.

Please check and confirm.

 arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi
index a414df645351..6e2d97c2fdf1 100644
--- a/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi
@@ -22,7 +22,7 @@ eqos: ethernet@5b050000 {
 		interrupt-parent = <&gic>;
 		interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
 			     <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
-		interrupt-names = "eth_wake_irq", "macirq";
+		interrupt-names = "macirq", "eth_wake_irq";
 		clocks = <&eqos_lpcg IMX_LPCG_CLK_4>,
 			 <&eqos_lpcg IMX_LPCG_CLK_6>,
 			 <&eqos_lpcg IMX_LPCG_CLK_0>,
-- 
2.34.1


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