All of lore.kernel.org
 help / color / mirror / Atom feed
From: Damien Le Moal <dlemoal@kernel.org>
To: linux-pci@vger.kernel.org, Bjorn Helgaas <bhelgaas@google.com>
Cc: "Krzysztof Wilczyński" <kw@linux.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Kishon Vijay Abraham I" <kishon@kernel.org>,
	"Manivannan Sadhasivami" <manivannan.sadhasivam@linaro.org>,
	"Serge Semin" <fancer.lancer@gmail.com>,
	"Yoshihiro Shimoda" <yoshihiro.shimoda.uh@renesas.com>
Subject: [PATCH v4 16/16] PCI: xilinx-nwl: Use INTX instead of legacy
Date: Wed, 22 Nov 2023 15:04:06 +0900	[thread overview]
Message-ID: <20231122060406.14695-17-dlemoal@kernel.org> (raw)
In-Reply-To: <20231122060406.14695-1-dlemoal@kernel.org>

In the xilinx-nwl controller driver, change all use of "legacy" and
"leg" to "intx", to match the term used in the PCI specifications.

Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
---
 drivers/pci/controller/pcie-xilinx-nwl.c | 52 ++++++++++++------------
 1 file changed, 26 insertions(+), 26 deletions(-)

diff --git a/drivers/pci/controller/pcie-xilinx-nwl.c b/drivers/pci/controller/pcie-xilinx-nwl.c
index e307aceba5c9..0408f4d612b5 100644
--- a/drivers/pci/controller/pcie-xilinx-nwl.c
+++ b/drivers/pci/controller/pcie-xilinx-nwl.c
@@ -166,7 +166,7 @@ struct nwl_pcie {
 	int irq_intx;
 	int irq_misc;
 	struct nwl_msi msi;
-	struct irq_domain *legacy_irq_domain;
+	struct irq_domain *intx_irq_domain;
 	struct clk *clk;
 	raw_spinlock_t leg_mask_lock;
 };
@@ -324,7 +324,7 @@ static void nwl_pcie_leg_handler(struct irq_desc *desc)
 	while ((status = nwl_bridge_readl(pcie, MSGF_LEG_STATUS) &
 				MSGF_LEG_SR_MASKALL) != 0) {
 		for_each_set_bit(bit, &status, PCI_NUM_INTX)
-			generic_handle_domain_irq(pcie->legacy_irq_domain, bit);
+			generic_handle_domain_irq(pcie->intx_irq_domain, bit);
 	}
 
 	chained_irq_exit(chip, desc);
@@ -364,7 +364,7 @@ static void nwl_pcie_msi_handler_low(struct irq_desc *desc)
 	chained_irq_exit(chip, desc);
 }
 
-static void nwl_mask_leg_irq(struct irq_data *data)
+static void nwl_mask_intx_irq(struct irq_data *data)
 {
 	struct nwl_pcie *pcie = irq_data_get_irq_chip_data(data);
 	unsigned long flags;
@@ -378,7 +378,7 @@ static void nwl_mask_leg_irq(struct irq_data *data)
 	raw_spin_unlock_irqrestore(&pcie->leg_mask_lock, flags);
 }
 
-static void nwl_unmask_leg_irq(struct irq_data *data)
+static void nwl_unmask_intx_irq(struct irq_data *data)
 {
 	struct nwl_pcie *pcie = irq_data_get_irq_chip_data(data);
 	unsigned long flags;
@@ -392,26 +392,26 @@ static void nwl_unmask_leg_irq(struct irq_data *data)
 	raw_spin_unlock_irqrestore(&pcie->leg_mask_lock, flags);
 }
 
-static struct irq_chip nwl_leg_irq_chip = {
+static struct irq_chip nwl_intx_irq_chip = {
 	.name = "nwl_pcie:legacy",
-	.irq_enable = nwl_unmask_leg_irq,
-	.irq_disable = nwl_mask_leg_irq,
-	.irq_mask = nwl_mask_leg_irq,
-	.irq_unmask = nwl_unmask_leg_irq,
+	.irq_enable = nwl_unmask_intx_irq,
+	.irq_disable = nwl_mask_intx_irq,
+	.irq_mask = nwl_mask_intx_irq,
+	.irq_unmask = nwl_unmask_intx_irq,
 };
 
-static int nwl_legacy_map(struct irq_domain *domain, unsigned int irq,
-			  irq_hw_number_t hwirq)
+static int nwl_intx_map(struct irq_domain *domain, unsigned int irq,
+			irq_hw_number_t hwirq)
 {
-	irq_set_chip_and_handler(irq, &nwl_leg_irq_chip, handle_level_irq);
+	irq_set_chip_and_handler(irq, &nwl_intx_irq_chip, handle_level_irq);
 	irq_set_chip_data(irq, domain->host_data);
 	irq_set_status_flags(irq, IRQ_LEVEL);
 
 	return 0;
 }
 
-static const struct irq_domain_ops legacy_domain_ops = {
-	.map = nwl_legacy_map,
+static const struct irq_domain_ops intx_domain_ops = {
+	.map = nwl_intx_map,
 	.xlate = pci_irqd_intx_xlate,
 };
 
@@ -525,20 +525,20 @@ static int nwl_pcie_init_irq_domain(struct nwl_pcie *pcie)
 {
 	struct device *dev = pcie->dev;
 	struct device_node *node = dev->of_node;
-	struct device_node *legacy_intc_node;
+	struct device_node *intc_node;
 
-	legacy_intc_node = of_get_next_child(node, NULL);
-	if (!legacy_intc_node) {
+	intc_node = of_get_next_child(node, NULL);
+	if (!intc_node) {
 		dev_err(dev, "No legacy intc node found\n");
 		return -EINVAL;
 	}
 
-	pcie->legacy_irq_domain = irq_domain_add_linear(legacy_intc_node,
-							PCI_NUM_INTX,
-							&legacy_domain_ops,
-							pcie);
-	of_node_put(legacy_intc_node);
-	if (!pcie->legacy_irq_domain) {
+	pcie->intx_irq_domain = irq_domain_add_linear(intc_node,
+						      PCI_NUM_INTX,
+						      &intx_domain_ops,
+						      pcie);
+	of_node_put(intc_node);
+	if (!pcie->intx_irq_domain) {
 		dev_err(dev, "failed to create IRQ domain\n");
 		return -ENOMEM;
 	}
@@ -710,14 +710,14 @@ static int nwl_pcie_bridge_init(struct nwl_pcie *pcie)
 	/* Enable all misc interrupts */
 	nwl_bridge_writel(pcie, MSGF_MISC_SR_MASKALL, MSGF_MISC_MASK);
 
-	/* Disable all legacy interrupts */
+	/* Disable all INTX interrupts */
 	nwl_bridge_writel(pcie, (u32)~MSGF_LEG_SR_MASKALL, MSGF_LEG_MASK);
 
-	/* Clear pending legacy interrupts */
+	/* Clear pending INTX interrupts */
 	nwl_bridge_writel(pcie, nwl_bridge_readl(pcie, MSGF_LEG_STATUS) &
 			  MSGF_LEG_SR_MASKALL, MSGF_LEG_STATUS);
 
-	/* Enable all legacy interrupts */
+	/* Enable all INTX interrupts */
 	nwl_bridge_writel(pcie, MSGF_LEG_SR_MASKALL, MSGF_LEG_MASK);
 
 	/* Enable the bridge config interrupt */
-- 
2.42.0


  parent reply	other threads:[~2023-11-22  6:04 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-22  6:03 [PATCH v4 00/16] Cleanup IRQ type definitions Damien Le Moal
2023-11-22  6:03 ` [PATCH v4 01/16] PCI: Rename PCI_IRQ_LEGACY to PCI_IRQ_INTX Damien Le Moal
2023-11-22  6:15   ` Christoph Hellwig
2023-11-22  6:03 ` [PATCH v4 02/16] PCI: endpoint: Drop PCI_EPC_IRQ_XXX definitions Damien Le Moal
2023-11-22  6:15   ` Christoph Hellwig
2023-11-22  6:03 ` [PATCH v4 03/16] PCI: endpoint: Use INTX instead of legacy Damien Le Moal
2023-11-22  6:16   ` Christoph Hellwig
2023-11-22  6:03 ` [PATCH v4 04/16] PCI: endpoint: Rename LEGACY to INTX in test function driver Damien Le Moal
2023-11-22  6:16   ` Christoph Hellwig
2023-11-22  6:03 ` [PATCH v4 05/16] misc: pci_endpoint_test: Use INTX instead of LEGACY Damien Le Moal
2023-11-22  6:16   ` Christoph Hellwig
2023-11-22  6:03 ` [PATCH v4 06/16] PCI: portdrv: Use PCI_IRQ_INTX Damien Le Moal
2023-11-22  6:17   ` Christoph Hellwig
2023-11-22  6:22     ` Damien Le Moal
2023-11-22  6:23       ` Christoph Hellwig
2023-11-22  6:33         ` Damien Le Moal
2023-11-22  6:36           ` Christoph Hellwig
2023-11-22  6:49             ` Damien Le Moal
2023-11-22  6:54               ` Christoph Hellwig
2023-11-22  6:59                 ` Damien Le Moal
2023-12-19 10:07                   ` Lorenzo Pieralisi
2023-12-20  4:41                     ` Damien Le Moal
2023-11-22  6:03 ` [PATCH v4 07/16] PCI: dra7xx: Rename dra7xx_pcie_raise_legacy_irq() Damien Le Moal
2023-11-22  6:17   ` Christoph Hellwig
2023-11-22  6:03 ` [PATCH v4 08/16] PCI: cadence: Use INTX instead of legacy Damien Le Moal
2023-11-22  6:18   ` Christoph Hellwig
2023-11-22  6:03 ` [PATCH v4 09/16] PCI: dwc: Rename dw_pcie_ep_raise_legacy_irq() Damien Le Moal
2023-11-22  6:18   ` Christoph Hellwig
2023-11-22 13:38   ` Serge Semin
2023-11-22  6:04 ` [PATCH v4 10/16] PCI: keystone: Use INTX instead of legacy Damien Le Moal
2023-11-22  6:18   ` Christoph Hellwig
2023-11-22  6:04 ` [PATCH v4 11/16] PCI: dw-rockchip: Rename rockchip_pcie_legacy_int_handler() Damien Le Moal
2023-11-22  6:18   ` Christoph Hellwig
2023-11-22  6:04 ` [PATCH v4 12/16] PCI: tegra194: Use INTX instead of legacy Damien Le Moal
2023-11-22  6:18   ` Christoph Hellwig
2023-11-22  6:04 ` [PATCH v4 13/16] PCI: uniphier: " Damien Le Moal
2023-11-22  6:19   ` Christoph Hellwig
2023-11-22  6:04 ` [PATCH v4 14/16] PCI: rockchip-ep: " Damien Le Moal
2023-11-22  6:19   ` Christoph Hellwig
2023-11-22  6:04 ` [PATCH v4 15/16] PCI: rockchip-host: Rename rockchip_pcie_legacy_int_handler() Damien Le Moal
2023-11-22  6:21   ` Christoph Hellwig
2023-11-22  6:04 ` Damien Le Moal [this message]
2023-11-22  6:21   ` [PATCH v4 16/16] PCI: xilinx-nwl: Use INTX instead of legacy Christoph Hellwig
2023-11-30  8:30 ` [PATCH v4 00/16] Cleanup IRQ type definitions Damien Le Moal
2023-11-30  8:40 ` Manivannan Sadhasivami
2023-12-01  0:52 ` Bjorn Helgaas
2023-12-18 10:10   ` Damien Le Moal
2023-12-18 15:54 ` Lorenzo Pieralisi

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20231122060406.14695-17-dlemoal@kernel.org \
    --to=dlemoal@kernel.org \
    --cc=bhelgaas@google.com \
    --cc=fancer.lancer@gmail.com \
    --cc=kishon@kernel.org \
    --cc=kw@linux.com \
    --cc=linux-pci@vger.kernel.org \
    --cc=lpieralisi@kernel.org \
    --cc=manivannan.sadhasivam@linaro.org \
    --cc=yoshihiro.shimoda.uh@renesas.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.