From: Vasant Hegde <vasant.hegde@amd.com>
To: <iommu@lists.linux.dev>, <joro@8bytes.org>
Cc: <suravee.suthikulpanit@amd.com>, <jgg@ziepe.ca>,
Vasant Hegde <vasant.hegde@amd.com>,
Jason Gunthorpe <jgg@nvidia.com>
Subject: [PATCH v2 1/9] iommu/amd: Rename iommu_flush_all_caches() -> amd_iommu_flush_all_caches()
Date: Wed, 22 Nov 2023 09:02:07 +0000 [thread overview]
Message-ID: <20231122090215.6191-2-vasant.hegde@amd.com> (raw)
In-Reply-To: <20231122090215.6191-1-vasant.hegde@amd.com>
Rename function inline with driver naming convention.
No functional changes.
Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
Reviewed-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
---
drivers/iommu/amd/amd_iommu.h | 5 +++++
drivers/iommu/amd/amd_iommu_types.h | 6 ------
drivers/iommu/amd/init.c | 8 ++++----
drivers/iommu/amd/iommu.c | 2 +-
4 files changed, 10 insertions(+), 11 deletions(-)
diff --git a/drivers/iommu/amd/amd_iommu.h b/drivers/iommu/amd/amd_iommu.h
index 86be1edd50ee..234db57cd320 100644
--- a/drivers/iommu/amd/amd_iommu.h
+++ b/drivers/iommu/amd/amd_iommu.h
@@ -53,6 +53,11 @@ int amd_iommu_pdev_enable_cap_pri(struct pci_dev *pdev);
void amd_iommu_pdev_disable_cap_pri(struct pci_dev *pdev);
int amd_iommu_flush_page(struct iommu_domain *dom, u32 pasid, u64 address);
+/*
+ * This function flushes all internal caches of
+ * the IOMMU used by this driver.
+ */
+void amd_iommu_flush_all_caches(struct amd_iommu *iommu);
void amd_iommu_update_and_flush_device_table(struct protection_domain *domain);
void amd_iommu_domain_update(struct protection_domain *domain);
void amd_iommu_domain_flush_complete(struct protection_domain *domain);
diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
index 90b7d7950a9e..809d74faa1a5 100644
--- a/drivers/iommu/amd/amd_iommu_types.h
+++ b/drivers/iommu/amd/amd_iommu_types.h
@@ -902,12 +902,6 @@ extern int amd_iommu_max_glx_val;
extern u64 amd_iommu_efr;
extern u64 amd_iommu_efr2;
-/*
- * This function flushes all internal caches of
- * the IOMMU used by this driver.
- */
-void iommu_flush_all_caches(struct amd_iommu *iommu);
-
static inline int get_ioapic_devid(int id)
{
struct devid_map *entry;
diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c
index 64bcf3df37ee..c83bd0c2a1c9 100644
--- a/drivers/iommu/amd/init.c
+++ b/drivers/iommu/amd/init.c
@@ -2223,7 +2223,7 @@ static int __init amd_iommu_init_pci(void)
init_device_table_dma(pci_seg);
for_each_iommu(iommu)
- iommu_flush_all_caches(iommu);
+ amd_iommu_flush_all_caches(iommu);
print_iommu_info();
@@ -2773,7 +2773,7 @@ static void early_enable_iommu(struct amd_iommu *iommu)
iommu_enable_xt(iommu);
iommu_enable_irtcachedis(iommu);
iommu_enable(iommu);
- iommu_flush_all_caches(iommu);
+ amd_iommu_flush_all_caches(iommu);
}
/*
@@ -2829,7 +2829,7 @@ static void early_enable_iommus(void)
iommu_enable_xt(iommu);
iommu_enable_irtcachedis(iommu);
iommu_set_device_table(iommu);
- iommu_flush_all_caches(iommu);
+ amd_iommu_flush_all_caches(iommu);
}
}
}
@@ -3293,7 +3293,7 @@ static int __init state_next(void)
uninit_device_table_dma(pci_seg);
for_each_iommu(iommu)
- iommu_flush_all_caches(iommu);
+ amd_iommu_flush_all_caches(iommu);
}
}
return ret;
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index fcc987f5d4ed..6a43ebddaf87 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -1392,7 +1392,7 @@ static void amd_iommu_flush_irt_all(struct amd_iommu *iommu)
iommu_completion_wait(iommu);
}
-void iommu_flush_all_caches(struct amd_iommu *iommu)
+void amd_iommu_flush_all_caches(struct amd_iommu *iommu)
{
if (check_feature(FEATURE_IA)) {
amd_iommu_flush_all(iommu);
--
2.31.1
next prev parent reply other threads:[~2023-11-22 9:03 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-22 9:02 [PATCH v2 0/9] Improve TLB invalidation logic Vasant Hegde
2023-11-22 9:02 ` Vasant Hegde [this message]
2023-11-22 9:02 ` [PATCH v2 2/9] iommu/amd: Remove redundant domain flush from attach_device() Vasant Hegde
2023-11-22 9:02 ` [PATCH v2 3/9] iommu/amd: Remove redundant passing of PDE bit Vasant Hegde
2023-11-22 9:02 ` [PATCH v2 4/9] iommu/amd: Add support to invalidate multiple guest pages Vasant Hegde
2023-11-22 9:02 ` [PATCH v2 5/9] iommu/amd: Refactor IOMMU tlb invalidation code Vasant Hegde
2023-11-22 9:02 ` [PATCH v2 6/9] iommu/amd: Refactor device iotlb " Vasant Hegde
2023-11-22 9:02 ` [PATCH v2 7/9] iommu/amd: Consolidate amd_iommu_domain_flush_complete() call Vasant Hegde
2023-11-30 17:51 ` Jason Gunthorpe
2023-11-22 9:02 ` [PATCH v2 8/9] iommu/amd: Make domain_flush_pages as global function Vasant Hegde
2023-11-30 17:52 ` Jason Gunthorpe
2023-11-22 9:02 ` [PATCH v2 9/9] iommu/amd/pgtbl_v2: Invalidate updated page ranges only Vasant Hegde
2023-11-30 17:53 ` Jason Gunthorpe
2023-12-11 14:26 ` [PATCH v2 0/9] Improve TLB invalidation logic Joerg Roedel
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