From: Sascha Hauer <s.hauer@pengutronix.de>
To: Andy Yan <andyshrk@163.com>
Cc: heiko@sntech.de, hjc@rock-chips.com,
dri-devel@lists.freedesktop.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
krzysztof.kozlowski+dt@linaro.org, robh+dt@kernel.org,
devicetree@vger.kernel.org, sebastian.reichel@collabora.com,
kever.yang@rock-chips.com, chris.obbard@collabora.com,
Andy Yan <andy.yan@rock-chips.com>
Subject: Re: [PATCH v2 03/12] drm/rockchip: vop2: set half_block_en bit in all mode
Date: Mon, 27 Nov 2023 15:04:26 +0100 [thread overview]
Message-ID: <20231127140426.GD977968@pengutronix.de> (raw)
In-Reply-To: <20231122125413.3454489-1-andyshrk@163.com>
On Wed, Nov 22, 2023 at 08:54:13PM +0800, Andy Yan wrote:
> From: Andy Yan <andy.yan@rock-chips.com>
>
> At first we thought the half_block_en bit in AFBCD_CTRL register
> only work in afbc mode. But the fact is that it control the line
> buffer in all mode(afbc/tile/line), so we need configure it in
> all case.
>
> Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha
> ---
>
> (no changes since v1)
>
> drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 25 ++++++++++++++------
> 1 file changed, 18 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
> index 57784d0a22a6..639dfebc6bd1 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
> @@ -521,6 +521,18 @@ static bool rockchip_vop2_mod_supported(struct drm_plane *plane, u32 format,
> return vop2_convert_afbc_format(format) >= 0;
> }
>
> +/*
> + * 0: Full mode, 16 lines for one tail
> + * 1: half block mode, 8 lines one tail
> + */
> +static bool vop2_half_block_enable(struct drm_plane_state *pstate)
> +{
> + if (pstate->rotation & (DRM_MODE_ROTATE_270 | DRM_MODE_ROTATE_90))
> + return false;
> + else
> + return true;
> +}
> +
> static u32 vop2_afbc_transform_offset(struct drm_plane_state *pstate,
> bool afbc_half_block_en)
> {
> @@ -1144,6 +1156,7 @@ static void vop2_plane_atomic_update(struct drm_plane *plane,
> bool rotate_90 = pstate->rotation & DRM_MODE_ROTATE_90;
> struct rockchip_gem_object *rk_obj;
> unsigned long offset;
> + bool half_block_en;
> bool afbc_en;
> dma_addr_t yrgb_mst;
> dma_addr_t uv_mst;
> @@ -1236,6 +1249,7 @@ static void vop2_plane_atomic_update(struct drm_plane *plane,
> dsp_info = (dsp_h - 1) << 16 | ((dsp_w - 1) & 0xffff);
>
> format = vop2_convert_format(fb->format->format);
> + half_block_en = vop2_half_block_enable(pstate);
>
> drm_dbg(vop2->drm, "vp%d update %s[%dx%d->%dx%d@%dx%d] fmt[%p4cc_%s] addr[%pad]\n",
> vp->id, win->data->name, actual_w, actual_h, dsp_w, dsp_h,
> @@ -1243,6 +1257,9 @@ static void vop2_plane_atomic_update(struct drm_plane *plane,
> &fb->format->format,
> afbc_en ? "AFBC" : "", &yrgb_mst);
>
> + if (vop2_cluster_window(win))
> + vop2_win_write(win, VOP2_WIN_AFBC_HALF_BLOCK_EN, half_block_en);
> +
> if (afbc_en) {
> u32 stride;
>
> @@ -1283,13 +1300,7 @@ static void vop2_plane_atomic_update(struct drm_plane *plane,
> vop2_win_write(win, VOP2_WIN_AFBC_UV_SWAP, uv_swap);
> vop2_win_write(win, VOP2_WIN_AFBC_AUTO_GATING_EN, 0);
> vop2_win_write(win, VOP2_WIN_AFBC_BLOCK_SPLIT_EN, 0);
> - if (pstate->rotation & (DRM_MODE_ROTATE_270 | DRM_MODE_ROTATE_90)) {
> - vop2_win_write(win, VOP2_WIN_AFBC_HALF_BLOCK_EN, 0);
> - transform_offset = vop2_afbc_transform_offset(pstate, false);
> - } else {
> - vop2_win_write(win, VOP2_WIN_AFBC_HALF_BLOCK_EN, 1);
> - transform_offset = vop2_afbc_transform_offset(pstate, true);
> - }
> + transform_offset = vop2_afbc_transform_offset(pstate, half_block_en);
> vop2_win_write(win, VOP2_WIN_AFBC_HDR_PTR, yrgb_mst);
> vop2_win_write(win, VOP2_WIN_AFBC_PIC_SIZE, act_info);
> vop2_win_write(win, VOP2_WIN_AFBC_TRANSFORM_OFFSET, transform_offset);
> --
> 2.34.1
>
>
>
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
WARNING: multiple messages have this Message-ID (diff)
From: Sascha Hauer <s.hauer@pengutronix.de>
To: Andy Yan <andyshrk@163.com>
Cc: heiko@sntech.de, hjc@rock-chips.com,
dri-devel@lists.freedesktop.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
krzysztof.kozlowski+dt@linaro.org, robh+dt@kernel.org,
devicetree@vger.kernel.org, sebastian.reichel@collabora.com,
kever.yang@rock-chips.com, chris.obbard@collabora.com,
Andy Yan <andy.yan@rock-chips.com>
Subject: Re: [PATCH v2 03/12] drm/rockchip: vop2: set half_block_en bit in all mode
Date: Mon, 27 Nov 2023 15:04:26 +0100 [thread overview]
Message-ID: <20231127140426.GD977968@pengutronix.de> (raw)
In-Reply-To: <20231122125413.3454489-1-andyshrk@163.com>
On Wed, Nov 22, 2023 at 08:54:13PM +0800, Andy Yan wrote:
> From: Andy Yan <andy.yan@rock-chips.com>
>
> At first we thought the half_block_en bit in AFBCD_CTRL register
> only work in afbc mode. But the fact is that it control the line
> buffer in all mode(afbc/tile/line), so we need configure it in
> all case.
>
> Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha
> ---
>
> (no changes since v1)
>
> drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 25 ++++++++++++++------
> 1 file changed, 18 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
> index 57784d0a22a6..639dfebc6bd1 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
> @@ -521,6 +521,18 @@ static bool rockchip_vop2_mod_supported(struct drm_plane *plane, u32 format,
> return vop2_convert_afbc_format(format) >= 0;
> }
>
> +/*
> + * 0: Full mode, 16 lines for one tail
> + * 1: half block mode, 8 lines one tail
> + */
> +static bool vop2_half_block_enable(struct drm_plane_state *pstate)
> +{
> + if (pstate->rotation & (DRM_MODE_ROTATE_270 | DRM_MODE_ROTATE_90))
> + return false;
> + else
> + return true;
> +}
> +
> static u32 vop2_afbc_transform_offset(struct drm_plane_state *pstate,
> bool afbc_half_block_en)
> {
> @@ -1144,6 +1156,7 @@ static void vop2_plane_atomic_update(struct drm_plane *plane,
> bool rotate_90 = pstate->rotation & DRM_MODE_ROTATE_90;
> struct rockchip_gem_object *rk_obj;
> unsigned long offset;
> + bool half_block_en;
> bool afbc_en;
> dma_addr_t yrgb_mst;
> dma_addr_t uv_mst;
> @@ -1236,6 +1249,7 @@ static void vop2_plane_atomic_update(struct drm_plane *plane,
> dsp_info = (dsp_h - 1) << 16 | ((dsp_w - 1) & 0xffff);
>
> format = vop2_convert_format(fb->format->format);
> + half_block_en = vop2_half_block_enable(pstate);
>
> drm_dbg(vop2->drm, "vp%d update %s[%dx%d->%dx%d@%dx%d] fmt[%p4cc_%s] addr[%pad]\n",
> vp->id, win->data->name, actual_w, actual_h, dsp_w, dsp_h,
> @@ -1243,6 +1257,9 @@ static void vop2_plane_atomic_update(struct drm_plane *plane,
> &fb->format->format,
> afbc_en ? "AFBC" : "", &yrgb_mst);
>
> + if (vop2_cluster_window(win))
> + vop2_win_write(win, VOP2_WIN_AFBC_HALF_BLOCK_EN, half_block_en);
> +
> if (afbc_en) {
> u32 stride;
>
> @@ -1283,13 +1300,7 @@ static void vop2_plane_atomic_update(struct drm_plane *plane,
> vop2_win_write(win, VOP2_WIN_AFBC_UV_SWAP, uv_swap);
> vop2_win_write(win, VOP2_WIN_AFBC_AUTO_GATING_EN, 0);
> vop2_win_write(win, VOP2_WIN_AFBC_BLOCK_SPLIT_EN, 0);
> - if (pstate->rotation & (DRM_MODE_ROTATE_270 | DRM_MODE_ROTATE_90)) {
> - vop2_win_write(win, VOP2_WIN_AFBC_HALF_BLOCK_EN, 0);
> - transform_offset = vop2_afbc_transform_offset(pstate, false);
> - } else {
> - vop2_win_write(win, VOP2_WIN_AFBC_HALF_BLOCK_EN, 1);
> - transform_offset = vop2_afbc_transform_offset(pstate, true);
> - }
> + transform_offset = vop2_afbc_transform_offset(pstate, half_block_en);
> vop2_win_write(win, VOP2_WIN_AFBC_HDR_PTR, yrgb_mst);
> vop2_win_write(win, VOP2_WIN_AFBC_PIC_SIZE, act_info);
> vop2_win_write(win, VOP2_WIN_AFBC_TRANSFORM_OFFSET, transform_offset);
> --
> 2.34.1
>
>
>
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
WARNING: multiple messages have this Message-ID (diff)
From: Sascha Hauer <s.hauer@pengutronix.de>
To: Andy Yan <andyshrk@163.com>
Cc: devicetree@vger.kernel.org, chris.obbard@collabora.com,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
hjc@rock-chips.com, kever.yang@rock-chips.com,
linux-rockchip@lists.infradead.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org,
Andy Yan <andy.yan@rock-chips.com>,
sebastian.reichel@collabora.com
Subject: Re: [PATCH v2 03/12] drm/rockchip: vop2: set half_block_en bit in all mode
Date: Mon, 27 Nov 2023 15:04:26 +0100 [thread overview]
Message-ID: <20231127140426.GD977968@pengutronix.de> (raw)
In-Reply-To: <20231122125413.3454489-1-andyshrk@163.com>
On Wed, Nov 22, 2023 at 08:54:13PM +0800, Andy Yan wrote:
> From: Andy Yan <andy.yan@rock-chips.com>
>
> At first we thought the half_block_en bit in AFBCD_CTRL register
> only work in afbc mode. But the fact is that it control the line
> buffer in all mode(afbc/tile/line), so we need configure it in
> all case.
>
> Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha
> ---
>
> (no changes since v1)
>
> drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 25 ++++++++++++++------
> 1 file changed, 18 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
> index 57784d0a22a6..639dfebc6bd1 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
> @@ -521,6 +521,18 @@ static bool rockchip_vop2_mod_supported(struct drm_plane *plane, u32 format,
> return vop2_convert_afbc_format(format) >= 0;
> }
>
> +/*
> + * 0: Full mode, 16 lines for one tail
> + * 1: half block mode, 8 lines one tail
> + */
> +static bool vop2_half_block_enable(struct drm_plane_state *pstate)
> +{
> + if (pstate->rotation & (DRM_MODE_ROTATE_270 | DRM_MODE_ROTATE_90))
> + return false;
> + else
> + return true;
> +}
> +
> static u32 vop2_afbc_transform_offset(struct drm_plane_state *pstate,
> bool afbc_half_block_en)
> {
> @@ -1144,6 +1156,7 @@ static void vop2_plane_atomic_update(struct drm_plane *plane,
> bool rotate_90 = pstate->rotation & DRM_MODE_ROTATE_90;
> struct rockchip_gem_object *rk_obj;
> unsigned long offset;
> + bool half_block_en;
> bool afbc_en;
> dma_addr_t yrgb_mst;
> dma_addr_t uv_mst;
> @@ -1236,6 +1249,7 @@ static void vop2_plane_atomic_update(struct drm_plane *plane,
> dsp_info = (dsp_h - 1) << 16 | ((dsp_w - 1) & 0xffff);
>
> format = vop2_convert_format(fb->format->format);
> + half_block_en = vop2_half_block_enable(pstate);
>
> drm_dbg(vop2->drm, "vp%d update %s[%dx%d->%dx%d@%dx%d] fmt[%p4cc_%s] addr[%pad]\n",
> vp->id, win->data->name, actual_w, actual_h, dsp_w, dsp_h,
> @@ -1243,6 +1257,9 @@ static void vop2_plane_atomic_update(struct drm_plane *plane,
> &fb->format->format,
> afbc_en ? "AFBC" : "", &yrgb_mst);
>
> + if (vop2_cluster_window(win))
> + vop2_win_write(win, VOP2_WIN_AFBC_HALF_BLOCK_EN, half_block_en);
> +
> if (afbc_en) {
> u32 stride;
>
> @@ -1283,13 +1300,7 @@ static void vop2_plane_atomic_update(struct drm_plane *plane,
> vop2_win_write(win, VOP2_WIN_AFBC_UV_SWAP, uv_swap);
> vop2_win_write(win, VOP2_WIN_AFBC_AUTO_GATING_EN, 0);
> vop2_win_write(win, VOP2_WIN_AFBC_BLOCK_SPLIT_EN, 0);
> - if (pstate->rotation & (DRM_MODE_ROTATE_270 | DRM_MODE_ROTATE_90)) {
> - vop2_win_write(win, VOP2_WIN_AFBC_HALF_BLOCK_EN, 0);
> - transform_offset = vop2_afbc_transform_offset(pstate, false);
> - } else {
> - vop2_win_write(win, VOP2_WIN_AFBC_HALF_BLOCK_EN, 1);
> - transform_offset = vop2_afbc_transform_offset(pstate, true);
> - }
> + transform_offset = vop2_afbc_transform_offset(pstate, half_block_en);
> vop2_win_write(win, VOP2_WIN_AFBC_HDR_PTR, yrgb_mst);
> vop2_win_write(win, VOP2_WIN_AFBC_PIC_SIZE, act_info);
> vop2_win_write(win, VOP2_WIN_AFBC_TRANSFORM_OFFSET, transform_offset);
> --
> 2.34.1
>
>
>
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
next prev parent reply other threads:[~2023-11-27 14:04 UTC|newest]
Thread overview: 118+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-22 12:53 [PATCH v2 00/12] Add VOP2 support on rk3588 Andy Yan
2023-11-22 12:53 ` Andy Yan
2023-11-22 12:53 ` Andy Yan
2023-11-22 12:53 ` [PATCH v2 01/12] drm/rockchip: move output interface related definition to rockchip_drm_drv.h Andy Yan
2023-11-22 12:53 ` Andy Yan
2023-11-22 12:53 ` Andy Yan
2023-11-27 14:03 ` Sascha Hauer
2023-11-27 14:03 ` Sascha Hauer
2023-11-27 14:03 ` Sascha Hauer
2023-11-22 12:54 ` [PATCH v2 02/12] Revert "drm/rockchip: vop2: Use regcache_sync() to fix suspend/resume" Andy Yan
2023-11-22 12:54 ` Andy Yan
2023-11-22 12:54 ` Andy Yan
2023-11-27 14:04 ` Sascha Hauer
2023-11-27 14:04 ` Sascha Hauer
2023-11-27 14:04 ` Sascha Hauer
2023-11-22 12:54 ` [PATCH v2 03/12] drm/rockchip: vop2: set half_block_en bit in all mode Andy Yan
2023-11-22 12:54 ` Andy Yan
2023-11-22 12:54 ` Andy Yan
2023-11-27 14:04 ` Sascha Hauer [this message]
2023-11-27 14:04 ` Sascha Hauer
2023-11-27 14:04 ` Sascha Hauer
2023-11-27 15:01 ` Heiko Stübner
2023-11-27 15:01 ` Heiko Stübner
2023-11-27 15:01 ` Heiko Stübner
2023-11-22 12:54 ` [PATCH v2 04/12] drm/rockchip: vop2: clear afbc en and transform bit for cluster window at linear mode Andy Yan
2023-11-22 12:54 ` Andy Yan
2023-11-22 12:54 ` Andy Yan
2023-11-27 14:04 ` Sascha Hauer
2023-11-27 14:04 ` Sascha Hauer
2023-11-27 14:04 ` Sascha Hauer
2023-11-27 15:02 ` Heiko Stübner
2023-11-27 15:02 ` Heiko Stübner
2023-11-27 15:02 ` Heiko Stübner
2023-11-28 8:03 ` Andy Yan
2023-11-28 8:03 ` Andy Yan
2023-11-28 8:03 ` Andy Yan
2023-11-28 8:30 ` Heiko Stübner
2023-11-28 8:30 ` Heiko Stübner
2023-11-28 8:30 ` Heiko Stübner
2023-11-28 9:44 ` Andy Yan
2023-11-28 9:44 ` Andy Yan
2023-11-28 9:44 ` Andy Yan
2023-11-22 12:54 ` [PATCH v2 05/12] drm/rockchip: vop2: Set YUV/RGB overlay mode Andy Yan
2023-11-22 12:54 ` Andy Yan
2023-11-22 12:54 ` Andy Yan
2023-11-27 14:16 ` Sascha Hauer
2023-11-27 14:16 ` Sascha Hauer
2023-11-27 14:16 ` Sascha Hauer
2023-11-29 6:52 ` Andy Yan
2023-11-29 6:52 ` Andy Yan
2023-11-29 6:52 ` Andy Yan
2023-11-22 12:54 ` [PATCH v2 06/12] drm/rockchip: vop2: rename grf to sys_grf Andy Yan
2023-11-22 12:54 ` Andy Yan
2023-11-22 12:54 ` Andy Yan
2023-11-27 14:17 ` Sascha Hauer
2023-11-27 14:17 ` Sascha Hauer
2023-11-27 14:17 ` Sascha Hauer
2023-11-22 12:55 ` [PATCH v2 07/12] dt-bindings: soc: rockchip: add rk3588 vop/vo syscon Andy Yan
2023-11-22 12:55 ` Andy Yan
2023-11-22 12:55 ` Andy Yan
2023-11-22 12:55 ` [PATCH v2 08/12] dt-bindings: display: vop2: Add rk3588 support Andy Yan
2023-11-22 12:55 ` Andy Yan
2023-11-22 12:55 ` Andy Yan
2023-11-22 19:07 ` Krzysztof Kozlowski
2023-11-22 19:07 ` Krzysztof Kozlowski
2023-11-22 19:07 ` Krzysztof Kozlowski
2023-11-30 12:32 ` Andy Yan
2023-11-30 12:32 ` Andy Yan
2023-11-30 12:32 ` Andy Yan
2023-11-22 12:55 ` [PATCH v2 09/12] dt-bindings: soc: vop2: Add more endpoint definition Andy Yan
2023-11-22 12:55 ` Andy Yan
2023-11-22 12:55 ` Andy Yan
2023-11-22 19:08 ` Krzysztof Kozlowski
2023-11-22 19:08 ` Krzysztof Kozlowski
2023-11-22 19:08 ` Krzysztof Kozlowski
2023-11-22 12:55 ` [PATCH v2 10/12] drm/rockchip: vop2: Add support for rk3588 Andy Yan
2023-11-22 12:55 ` Andy Yan
2023-11-22 12:55 ` Andy Yan
2023-11-27 11:19 ` Sascha Hauer
2023-11-27 11:19 ` Sascha Hauer
2023-11-27 11:19 ` Sascha Hauer
2023-11-29 8:28 ` Andy Yan
2023-11-29 8:28 ` Andy Yan
2023-11-29 8:28 ` Andy Yan
2023-11-27 15:29 ` Heiko Stübner
2023-11-27 15:29 ` Heiko Stübner
2023-11-27 15:29 ` Heiko Stübner
2023-11-28 9:32 ` Andy Yan
2023-11-28 9:32 ` Andy Yan
2023-11-28 9:32 ` Andy Yan
2023-11-28 9:44 ` Heiko Stübner
2023-11-28 9:44 ` Heiko Stübner
2023-11-28 9:44 ` Heiko Stübner
2023-11-28 10:11 ` Andy Yan
2023-11-28 10:11 ` Andy Yan
2023-11-28 10:11 ` Andy Yan
2023-11-22 12:56 ` [PATCH v2 11/12] drm/rockchip: vop2: Add debugfs support Andy Yan
2023-11-22 12:56 ` Andy Yan
2023-11-22 12:56 ` Andy Yan
2023-11-27 10:13 ` Sascha Hauer
2023-11-27 10:13 ` Sascha Hauer
2023-11-27 10:13 ` Sascha Hauer
2023-11-27 10:56 ` Andy Yan
2023-11-29 8:52 ` Sascha Hauer
2023-11-29 8:52 ` Sascha Hauer
2023-11-29 8:52 ` Sascha Hauer
2023-11-29 11:01 ` Andy Yan
2023-11-29 11:01 ` Andy Yan
2023-11-29 11:01 ` Andy Yan
2023-11-29 12:59 ` Sascha Hauer
2023-11-29 12:59 ` Sascha Hauer
2023-11-29 12:59 ` Sascha Hauer
2023-11-30 1:15 ` Andy Yan
2023-11-30 1:15 ` Andy Yan
2023-11-30 1:15 ` Andy Yan
2023-11-22 12:56 ` [PATCH v2 12/12] arm64: dts: rockchip: Add vop on rk3588 Andy Yan
2023-11-22 12:56 ` Andy Yan
2023-11-22 12:56 ` Andy Yan
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