From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-qv1-f44.google.com (mail-qv1-f44.google.com [209.85.219.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D587B51C50 for ; Thu, 30 Nov 2023 16:51:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="qIRHKpOU" Received: by mail-qv1-f44.google.com with SMTP id 6a1803df08f44-67a73619fc4so6457626d6.2 for ; Thu, 30 Nov 2023 08:51:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1701363071; x=1701967871; darn=lists.linux.dev; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date:from:to :cc:subject:date:message-id:reply-to; bh=utw4KTuk3SE3y1D2yo/rUQfAbbyptZOivZr+Lu23J1Q=; b=qIRHKpOUlp5ypfNf/58RUlu0ycm0c+rQ5aaT5m+DIHtGLu9NOe8QslwjnvrLiGmlg3 ETbB/O05y4FXHoQKY6xp7p2AMrv3i6D2fevPbPSl+2J4j6PG2WOu7HAYs0vgMAfkXbUU kFCrYv6C0OcEdoPYF5zG2AO5fkaIaQaVTVXVWWr6OHMoOJk81B+95glIOGw08XUhNiE9 0FRSgH23maG8mIyLZ3IaSZ54F8ko6VlQmZAgqw0K3Ksz3u/ZQ6QZGKD/xpj3NUyA4Qn8 Rzn8lVlOGSEKz8Ii481THYx1dA38bxzD8IO1XjUwWBKL+MwwEj59Hp5rj6oFaqk0NNhO 935w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1701363071; x=1701967871; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=utw4KTuk3SE3y1D2yo/rUQfAbbyptZOivZr+Lu23J1Q=; b=meKoKjCbayc6Q0T7n69m2I4zNaz6npzoEC407P8inXBN+6L/7LtLDIhMZA11/i0QAm 63L3SZ2xwQdivKoh+NWoyDIJ+4XleATwmkCwR5pbHFoaMY/jCSDFvQcT2+aY9e/+9cuj ERRxh703jFGvqr52RKklJQFTNVSvx84uOWmpkKRqLpow+Sgd96/rXymfIfChZ5ok4wgZ KBoiDkdoubkgBbIc4djd3TGhJJqTXfDeMAdusDmPk15hioUA+x/iuhudZ5Pa5aVQBVPH VkF2j0oX+OfaIJUQiMhtUggNKw3Pci7e9XgM9BLueIk//eUn5ShmaGGZhwMmJzXGEaij ZYIw== X-Gm-Message-State: AOJu0YwEl2Opc/NMe5+EiWi23NnKqYFPcd9KJ2dmj8KvUKmHRhPUaloV p5rOO86szx7cxpB7b0yRTOmChGclzpv7B/T3sw== X-Google-Smtp-Source: AGHT+IERXWT08jVAe9ZbWDR/pNrAJrgo4gr7lr9NP15/wA+iYSlr52t4YrQ+Anua7VoZTtf/uwzbgA== X-Received: by 2002:ad4:4c07:0:b0:67a:2bbe:a02a with SMTP id bz7-20020ad44c07000000b0067a2bbea02amr18478142qvb.57.1701363071661; Thu, 30 Nov 2023 08:51:11 -0800 (PST) Received: from thinkpad ([117.213.102.92]) by smtp.gmail.com with ESMTPSA id y2-20020a0cd982000000b0067a34deb15asm649952qvj.9.2023.11.30.08.51.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Nov 2023 08:51:11 -0800 (PST) Date: Thu, 30 Nov 2023 22:21:00 +0530 From: Manivannan Sadhasivam To: Frank Li Cc: bhelgaas@google.com, imx@lists.linux.dev, kw@linux.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, lpieralisi@kernel.org, minghuan.Lian@nxp.com, mingkai.hu@nxp.com, robh@kernel.org, roy.zang@nxp.com Subject: Re: [PATCH v4 4/4] PCI: layerscape: Add suspend/resume for ls1043a Message-ID: <20231130165100.GV3043@thinkpad> References: <20231129214412.327633-1-Frank.Li@nxp.com> <20231129214412.327633-5-Frank.Li@nxp.com> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20231129214412.327633-5-Frank.Li@nxp.com> On Wed, Nov 29, 2023 at 04:44:12PM -0500, Frank Li wrote: > In the suspend path, PME_Turn_Off message is sent to the endpoint to > transition the link to L2/L3_Ready state. In this SoC, there is no way to > check if the controller has received the PME_To_Ack from the endpoint or > not. So to be on the safer side, the driver just waits for > PCIE_PME_TO_L2_TIMEOUT_US before asserting the SoC specific PMXMTTURNOFF > bit to complete the PME_Turn_Off handshake. This link would then enter > L2/L3 state depending on the VAUX supply. > > In the resume path, the link is brought back from L2 to L0 by doing a > software reset. > Same comment on the patch description as on patch 2/4. > Signed-off-by: Frank Li > --- > > Notes: > Change from v3 to v4 > - Call scfg_pcie_send_turnoff_msg() shared with ls1021a > - update commit message > > Change from v2 to v3 > - Remove ls_pcie_lut_readl(writel) function > > Change from v1 to v2 > - Update subject 'a' to 'A' > > drivers/pci/controller/dwc/pci-layerscape.c | 63 ++++++++++++++++++++- > 1 file changed, 62 insertions(+), 1 deletion(-) > > diff --git a/drivers/pci/controller/dwc/pci-layerscape.c b/drivers/pci/controller/dwc/pci-layerscape.c > index 590e07bb27002..d39700b3afaaa 100644 > --- a/drivers/pci/controller/dwc/pci-layerscape.c > +++ b/drivers/pci/controller/dwc/pci-layerscape.c > @@ -41,6 +41,15 @@ > #define SCFG_PEXSFTRSTCR 0x190 > #define PEXSR(idx) BIT(idx) > > +/* LS1043A PEX PME control register */ > +#define SCFG_PEXPMECR 0x144 > +#define PEXPME(idx) BIT(31 - (idx) * 4) > + > +/* LS1043A PEX LUT debug register */ > +#define LS_PCIE_LDBG 0x7fc > +#define LDBG_SR BIT(30) > +#define LDBG_WE BIT(31) > + > #define PCIE_IATU_NUM 6 > > struct ls_pcie_drvdata { > @@ -225,6 +234,45 @@ static int ls1021a_pcie_exit_from_l2(struct dw_pcie_rp *pp) > return scfg_pcie_exit_from_l2(pcie->scfg, SCFG_PEXSFTRSTCR, PEXSR(pcie->index)); > } > > +static void ls1043a_pcie_send_turnoff_msg(struct dw_pcie_rp *pp) > +{ > + struct dw_pcie *pci = to_dw_pcie_from_pp(pp); > + struct ls_pcie *pcie = to_ls_pcie(pci); > + > + scfg_pcie_send_turnoff_msg(pcie->scfg, SCFG_PEXPMECR, PEXPME(pcie->index)); > +} > + > +static int ls1043a_pcie_exit_from_l2(struct dw_pcie_rp *pp) > +{ > + struct dw_pcie *pci = to_dw_pcie_from_pp(pp); > + struct ls_pcie *pcie = to_ls_pcie(pci); > + u32 val; > + > + /* > + * Only way let PEX module exit L2 is do a software reset. Can you expand PEX? What is it used for? Also if the reset is only for the PEX module, please use the same comment in both patches 2 and 4. Patch 2 doesn't mention PEX in the comment. - Mani > + * LDBG_WE: allows the user to have write access to the PEXDBG[SR] for both setting and > + * clearing the soft reset on the PEX module. > + * LDBG_SR: When SR is set to 1, the PEX module enters soft reset. > + */ > + val = ls_pcie_pf_lut_readl(pcie, LS_PCIE_LDBG); > + val |= LDBG_WE; > + ls_pcie_pf_lut_writel(pcie, LS_PCIE_LDBG, val); > + > + val = ls_pcie_pf_lut_readl(pcie, LS_PCIE_LDBG); > + val |= LDBG_SR; > + ls_pcie_pf_lut_writel(pcie, LS_PCIE_LDBG, val); > + > + val = ls_pcie_pf_lut_readl(pcie, LS_PCIE_LDBG); > + val &= ~LDBG_SR; > + ls_pcie_pf_lut_writel(pcie, LS_PCIE_LDBG, val); > + > + val = ls_pcie_pf_lut_readl(pcie, LS_PCIE_LDBG); > + val &= ~LDBG_WE; > + ls_pcie_pf_lut_writel(pcie, LS_PCIE_LDBG, val); > + > + return 0; > +} > + > static const struct dw_pcie_host_ops ls_pcie_host_ops = { > .host_init = ls_pcie_host_init, > .pme_turn_off = ls_pcie_send_turnoff_msg, > @@ -242,6 +290,19 @@ static const struct ls_pcie_drvdata ls1021a_drvdata = { > .exit_from_l2 = ls1021a_pcie_exit_from_l2, > }; > > +static const struct dw_pcie_host_ops ls1043a_pcie_host_ops = { > + .host_init = ls_pcie_host_init, > + .pme_turn_off = ls1043a_pcie_send_turnoff_msg, > +}; > + > +static const struct ls_pcie_drvdata ls1043a_drvdata = { > + .pf_lut_off = 0x10000, > + .pm_support = true, > + .scfg_support = true, > + .ops = &ls1043a_pcie_host_ops, > + .exit_from_l2 = ls1043a_pcie_exit_from_l2, > +}; > + > static const struct ls_pcie_drvdata layerscape_drvdata = { > .pf_lut_off = 0xc0000, > .pm_support = true, > @@ -252,7 +313,7 @@ static const struct of_device_id ls_pcie_of_match[] = { > { .compatible = "fsl,ls1012a-pcie", .data = &layerscape_drvdata }, > { .compatible = "fsl,ls1021a-pcie", .data = &ls1021a_drvdata }, > { .compatible = "fsl,ls1028a-pcie", .data = &layerscape_drvdata }, > - { .compatible = "fsl,ls1043a-pcie", .data = &ls1021a_drvdata }, > + { .compatible = "fsl,ls1043a-pcie", .data = &ls1043a_drvdata }, > { .compatible = "fsl,ls1046a-pcie", .data = &layerscape_drvdata }, > { .compatible = "fsl,ls2080a-pcie", .data = &layerscape_drvdata }, > { .compatible = "fsl,ls2085a-pcie", .data = &layerscape_drvdata }, > -- > 2.34.1 > -- மணிவண்ணன் சதாசிவம் From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 650DBC4167B for ; Thu, 30 Nov 2023 16:52:08 +0000 (UTC) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=EnmtWt39; dkim-atps=neutral Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4Sh2Kf6q3xz3dFx for ; Fri, 1 Dec 2023 03:52:06 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=EnmtWt39; dkim-atps=neutral Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=linaro.org (client-ip=2607:f8b0:4864:20::833; helo=mail-qt1-x833.google.com; envelope-from=manivannan.sadhasivam@linaro.org; receiver=lists.ozlabs.org) Received: from mail-qt1-x833.google.com (mail-qt1-x833.google.com [IPv6:2607:f8b0:4864:20::833]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4Sh2Jk3gsmz2ykC for ; Fri, 1 Dec 2023 03:51:16 +1100 (AEDT) Received: by mail-qt1-x833.google.com with SMTP id d75a77b69052e-423a7dd0803so6604571cf.3 for ; Thu, 30 Nov 2023 08:51:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1701363071; x=1701967871; darn=lists.ozlabs.org; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date:from:to :cc:subject:date:message-id:reply-to; bh=utw4KTuk3SE3y1D2yo/rUQfAbbyptZOivZr+Lu23J1Q=; b=EnmtWt39YkJ+xZbw6EWjrv27f4nF7gmE/y+9Xiq4Uddup0ewfnunFDlC8fMNKB9zNS zWTh2A8fAA8gNseNMbKh0socHNwLOkE+kCo/j2Dy9UWw5+bYOlemzjoWwUnOBV5O1lrH EOxTxwJNpRK3PI1oL/Y5S7S/YZI2wlsDGn4jQxnEqtodm5aLMfyBtqKz/HQkAQ7Fdxxi +1QcdA9qyM56zwiBDnUK7nzYwiURFM9myHVy+xJaEclDiiU2oR+XWpXN8eUFaXlQaY3+ GYWNTUO/6Sx8beMklNx69IypQrKZMbqSrOOoHSEZ6Axf/Fd2LjFfJo6/R15uEW0tg1wu NYyw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1701363071; x=1701967871; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=utw4KTuk3SE3y1D2yo/rUQfAbbyptZOivZr+Lu23J1Q=; b=qmMscxh/MYtKzN9pQSpfClhAytgrI1Nm57jmz8ySVsyLCKmoi/kcKkoSwcEBCEajiH Rfx1VfbACh10OIKo++ulYvBuHNa/bfNpLUgSUcwEZ4CDRKczzdEvgZWSZN/ewMJFggTu E8yChKxiQ16eXbqdTHAAD3Ap69k7eil2NlQVTgJ9F2HMe42G+vpFI/0G2juIjTQ4QlFz JMAYTd56n5Ks7HYtDpK3FVfLb+ws2NiTs/ISy6Ok+Eyxnzp+Dzixqy/Ml17lpG3XOWTO G6aRIUnOQzlfBwpfplk/cOXcfoxdHnlSPq71cn8rdy2wNTbfy7nVXfqSjxlNq4Nhf5cd mILg== X-Gm-Message-State: AOJu0YwFiAxTXlZKUe5M759JLddKa2GqiBu3WBiuvutFMUwdav8r1RJH E5hFFDhfh4hLM0QnajJxR1mh X-Google-Smtp-Source: AGHT+IERXWT08jVAe9ZbWDR/pNrAJrgo4gr7lr9NP15/wA+iYSlr52t4YrQ+Anua7VoZTtf/uwzbgA== X-Received: by 2002:ad4:4c07:0:b0:67a:2bbe:a02a with SMTP id bz7-20020ad44c07000000b0067a2bbea02amr18478142qvb.57.1701363071661; Thu, 30 Nov 2023 08:51:11 -0800 (PST) Received: from thinkpad ([117.213.102.92]) by smtp.gmail.com with ESMTPSA id y2-20020a0cd982000000b0067a34deb15asm649952qvj.9.2023.11.30.08.51.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Nov 2023 08:51:11 -0800 (PST) Date: Thu, 30 Nov 2023 22:21:00 +0530 From: Manivannan Sadhasivam To: Frank Li Subject: Re: [PATCH v4 4/4] PCI: layerscape: Add suspend/resume for ls1043a Message-ID: <20231130165100.GV3043@thinkpad> References: <20231129214412.327633-1-Frank.Li@nxp.com> <20231129214412.327633-5-Frank.Li@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20231129214412.327633-5-Frank.Li@nxp.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: imx@lists.linux.dev, kw@linux.com, linux-pci@vger.kernel.org, lpieralisi@kernel.org, linux-kernel@vger.kernel.org, minghuan.Lian@nxp.com, mingkai.hu@nxp.com, roy.zang@nxp.com, bhelgaas@google.com, linuxppc-dev@lists.ozlabs.org, robh@kernel.org, linux-arm-kernel@lists.infradead.org Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Wed, Nov 29, 2023 at 04:44:12PM -0500, Frank Li wrote: > In the suspend path, PME_Turn_Off message is sent to the endpoint to > transition the link to L2/L3_Ready state. In this SoC, there is no way to > check if the controller has received the PME_To_Ack from the endpoint or > not. So to be on the safer side, the driver just waits for > PCIE_PME_TO_L2_TIMEOUT_US before asserting the SoC specific PMXMTTURNOFF > bit to complete the PME_Turn_Off handshake. This link would then enter > L2/L3 state depending on the VAUX supply. > > In the resume path, the link is brought back from L2 to L0 by doing a > software reset. > Same comment on the patch description as on patch 2/4. > Signed-off-by: Frank Li > --- > > Notes: > Change from v3 to v4 > - Call scfg_pcie_send_turnoff_msg() shared with ls1021a > - update commit message > > Change from v2 to v3 > - Remove ls_pcie_lut_readl(writel) function > > Change from v1 to v2 > - Update subject 'a' to 'A' > > drivers/pci/controller/dwc/pci-layerscape.c | 63 ++++++++++++++++++++- > 1 file changed, 62 insertions(+), 1 deletion(-) > > diff --git a/drivers/pci/controller/dwc/pci-layerscape.c b/drivers/pci/controller/dwc/pci-layerscape.c > index 590e07bb27002..d39700b3afaaa 100644 > --- a/drivers/pci/controller/dwc/pci-layerscape.c > +++ b/drivers/pci/controller/dwc/pci-layerscape.c > @@ -41,6 +41,15 @@ > #define SCFG_PEXSFTRSTCR 0x190 > #define PEXSR(idx) BIT(idx) > > +/* LS1043A PEX PME control register */ > +#define SCFG_PEXPMECR 0x144 > +#define PEXPME(idx) BIT(31 - (idx) * 4) > + > +/* LS1043A PEX LUT debug register */ > +#define LS_PCIE_LDBG 0x7fc > +#define LDBG_SR BIT(30) > +#define LDBG_WE BIT(31) > + > #define PCIE_IATU_NUM 6 > > struct ls_pcie_drvdata { > @@ -225,6 +234,45 @@ static int ls1021a_pcie_exit_from_l2(struct dw_pcie_rp *pp) > return scfg_pcie_exit_from_l2(pcie->scfg, SCFG_PEXSFTRSTCR, PEXSR(pcie->index)); > } > > +static void ls1043a_pcie_send_turnoff_msg(struct dw_pcie_rp *pp) > +{ > + struct dw_pcie *pci = to_dw_pcie_from_pp(pp); > + struct ls_pcie *pcie = to_ls_pcie(pci); > + > + scfg_pcie_send_turnoff_msg(pcie->scfg, SCFG_PEXPMECR, PEXPME(pcie->index)); > +} > + > +static int ls1043a_pcie_exit_from_l2(struct dw_pcie_rp *pp) > +{ > + struct dw_pcie *pci = to_dw_pcie_from_pp(pp); > + struct ls_pcie *pcie = to_ls_pcie(pci); > + u32 val; > + > + /* > + * Only way let PEX module exit L2 is do a software reset. Can you expand PEX? What is it used for? Also if the reset is only for the PEX module, please use the same comment in both patches 2 and 4. Patch 2 doesn't mention PEX in the comment. - Mani > + * LDBG_WE: allows the user to have write access to the PEXDBG[SR] for both setting and > + * clearing the soft reset on the PEX module. > + * LDBG_SR: When SR is set to 1, the PEX module enters soft reset. > + */ > + val = ls_pcie_pf_lut_readl(pcie, LS_PCIE_LDBG); > + val |= LDBG_WE; > + ls_pcie_pf_lut_writel(pcie, LS_PCIE_LDBG, val); > + > + val = ls_pcie_pf_lut_readl(pcie, LS_PCIE_LDBG); > + val |= LDBG_SR; > + ls_pcie_pf_lut_writel(pcie, LS_PCIE_LDBG, val); > + > + val = ls_pcie_pf_lut_readl(pcie, LS_PCIE_LDBG); > + val &= ~LDBG_SR; > + ls_pcie_pf_lut_writel(pcie, LS_PCIE_LDBG, val); > + > + val = ls_pcie_pf_lut_readl(pcie, LS_PCIE_LDBG); > + val &= ~LDBG_WE; > + ls_pcie_pf_lut_writel(pcie, LS_PCIE_LDBG, val); > + > + return 0; > +} > + > static const struct dw_pcie_host_ops ls_pcie_host_ops = { > .host_init = ls_pcie_host_init, > .pme_turn_off = ls_pcie_send_turnoff_msg, > @@ -242,6 +290,19 @@ static const struct ls_pcie_drvdata ls1021a_drvdata = { > .exit_from_l2 = ls1021a_pcie_exit_from_l2, > }; > > +static const struct dw_pcie_host_ops ls1043a_pcie_host_ops = { > + .host_init = ls_pcie_host_init, > + .pme_turn_off = ls1043a_pcie_send_turnoff_msg, > +}; > + > +static const struct ls_pcie_drvdata ls1043a_drvdata = { > + .pf_lut_off = 0x10000, > + .pm_support = true, > + .scfg_support = true, > + .ops = &ls1043a_pcie_host_ops, > + .exit_from_l2 = ls1043a_pcie_exit_from_l2, > +}; > + > static const struct ls_pcie_drvdata layerscape_drvdata = { > .pf_lut_off = 0xc0000, > .pm_support = true, > @@ -252,7 +313,7 @@ static const struct of_device_id ls_pcie_of_match[] = { > { .compatible = "fsl,ls1012a-pcie", .data = &layerscape_drvdata }, > { .compatible = "fsl,ls1021a-pcie", .data = &ls1021a_drvdata }, > { .compatible = "fsl,ls1028a-pcie", .data = &layerscape_drvdata }, > - { .compatible = "fsl,ls1043a-pcie", .data = &ls1021a_drvdata }, > + { .compatible = "fsl,ls1043a-pcie", .data = &ls1043a_drvdata }, > { .compatible = "fsl,ls1046a-pcie", .data = &layerscape_drvdata }, > { .compatible = "fsl,ls2080a-pcie", .data = &layerscape_drvdata }, > { .compatible = "fsl,ls2085a-pcie", .data = &layerscape_drvdata }, > -- > 2.34.1 > -- மணிவண்ணன் சதாசிவம் From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E69E6C4167B for ; Thu, 30 Nov 2023 16:51:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=rzuD30qAr3cGuF7S+Y8I942gp7ZPVp77XoSm1mLmbr8=; b=k+SCw+BuZQESoI WkXmV9L06mARvF7hmmpScfDs5EotVwVGfb5VJbIlsUm/wUBJ4iJYRJJlmjyMS5CCRe7Pk9+QeUD2/ 0V/DrobnRo6A6ZX3+JuJgG/7SbY0r+BjqELkRvjoZR8oNIYo5KMzZaAr6EgQJT45UznKMnLOMoPaO TxoJBb3BwsSQZ7uOFJK9kinSVDQXpbuyKoJ6mA4WeR1UGGMTCoyfpPJC652BQ2io3lDeOs8FCNH1b Z3sS/CDn+RHQYaArdsepdjyWlRhtTLNxn4Xe5JbzyEJFsFYa6eMgVtUTNVQffLihx0mvADZd+VorP vKACakr3aZnOajvLsctg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1r8kG1-00BPB4-0G; Thu, 30 Nov 2023 16:51:21 +0000 Received: from mail-qv1-xf2a.google.com ([2607:f8b0:4864:20::f2a]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1r8kFy-00BP8F-0X for linux-arm-kernel@lists.infradead.org; Thu, 30 Nov 2023 16:51:19 +0000 Received: by mail-qv1-xf2a.google.com with SMTP id 6a1803df08f44-67a894ccb4eso3081416d6.3 for ; Thu, 30 Nov 2023 08:51:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1701363071; x=1701967871; darn=lists.infradead.org; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date:from:to :cc:subject:date:message-id:reply-to; bh=utw4KTuk3SE3y1D2yo/rUQfAbbyptZOivZr+Lu23J1Q=; b=OFoeo5myQjNl0/uwLIip3Mos+673pJ2K9v+dh41bEv3lEDcEU0elRuyB20yM+td8ya L00zASjcG6t21Ch+vGfvsaQki8sVgH81YHa1f+/kWXXKMHNdLHXHGNWVa6+J7lWGzMje /c/iOvNpNR0kDm8nFCEHnqrwnPWYoGMQ1SB838/aA2FG7oHgbNTOk7ipJ3/SiOszx/++ sz1dzTMTHaKioMThaRdaxz4/XMJLE1co4YKNPhO3HhEPwC99Mf8PZxob8MF3L7ccU60t vOejJnKQm68DwfkIanVpDGQ0MeB3/VvD5rybJooQ33izC+9v3LCyJgKqFaA53RkeEndL 1tog== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1701363071; x=1701967871; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=utw4KTuk3SE3y1D2yo/rUQfAbbyptZOivZr+Lu23J1Q=; b=lGsyzR9w7BfxNhCcK6TgatLjYAuKjhzccQ3jseZZXCs57Fpjshp0/elQ/il9jOLID6 gPbxDLMXYD3kfB+cif8gYIwbMe9yFo4wuTjUDYGdGoKmknXCsN7uPVye3HPBGfSaTGRh fkWlJ2z2dnjw8DF+tMM50jeEjE0idXjX6Yr6+VKP4HFLj41dmSLq8gklpFmzAgDzJzBc +j7rrsMKIuA3+x3q4/8lK86uuvqa80XlpHwj4PFJMhi0S3V96vkKyXFNtTmq6nBnciRN SO181GdLmiVDvltRYuyED/cPUw9RfY2wNCHe6KhgumZPccsHMsqL8aZzOpYxhFyjg+p4 p5ow== X-Gm-Message-State: AOJu0Yysroqjq0bORM9LjCl6nJvE10WXSRaw1DYvs816xCzMNIdJoVTt qzycsWUXbgL6XYFgvlnL+a/J X-Google-Smtp-Source: AGHT+IERXWT08jVAe9ZbWDR/pNrAJrgo4gr7lr9NP15/wA+iYSlr52t4YrQ+Anua7VoZTtf/uwzbgA== X-Received: by 2002:ad4:4c07:0:b0:67a:2bbe:a02a with SMTP id bz7-20020ad44c07000000b0067a2bbea02amr18478142qvb.57.1701363071661; Thu, 30 Nov 2023 08:51:11 -0800 (PST) Received: from thinkpad ([117.213.102.92]) by smtp.gmail.com with ESMTPSA id y2-20020a0cd982000000b0067a34deb15asm649952qvj.9.2023.11.30.08.51.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Nov 2023 08:51:11 -0800 (PST) Date: Thu, 30 Nov 2023 22:21:00 +0530 From: Manivannan Sadhasivam To: Frank Li Cc: bhelgaas@google.com, imx@lists.linux.dev, kw@linux.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, lpieralisi@kernel.org, minghuan.Lian@nxp.com, mingkai.hu@nxp.com, robh@kernel.org, roy.zang@nxp.com Subject: Re: [PATCH v4 4/4] PCI: layerscape: Add suspend/resume for ls1043a Message-ID: <20231130165100.GV3043@thinkpad> References: <20231129214412.327633-1-Frank.Li@nxp.com> <20231129214412.327633-5-Frank.Li@nxp.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20231129214412.327633-5-Frank.Li@nxp.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231130_085118_207439_FA33FB36 X-CRM114-Status: GOOD ( 31.28 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org T24gV2VkLCBOb3YgMjksIDIwMjMgYXQgMDQ6NDQ6MTJQTSAtMDUwMCwgRnJhbmsgTGkgd3JvdGU6 Cj4gSW4gdGhlIHN1c3BlbmQgcGF0aCwgUE1FX1R1cm5fT2ZmIG1lc3NhZ2UgaXMgc2VudCB0byB0 aGUgZW5kcG9pbnQgdG8KPiB0cmFuc2l0aW9uIHRoZSBsaW5rIHRvIEwyL0wzX1JlYWR5IHN0YXRl LiBJbiB0aGlzIFNvQywgdGhlcmUgaXMgbm8gd2F5IHRvCj4gY2hlY2sgaWYgdGhlIGNvbnRyb2xs ZXIgaGFzIHJlY2VpdmVkIHRoZSBQTUVfVG9fQWNrIGZyb20gdGhlIGVuZHBvaW50IG9yCj4gbm90 LiBTbyB0byBiZSBvbiB0aGUgc2FmZXIgc2lkZSwgdGhlIGRyaXZlciBqdXN0IHdhaXRzIGZvcgo+ IFBDSUVfUE1FX1RPX0wyX1RJTUVPVVRfVVMgYmVmb3JlIGFzc2VydGluZyB0aGUgU29DIHNwZWNp ZmljIFBNWE1UVFVSTk9GRgo+IGJpdCB0byBjb21wbGV0ZSB0aGUgUE1FX1R1cm5fT2ZmIGhhbmRz aGFrZS4gVGhpcyBsaW5rIHdvdWxkIHRoZW4gZW50ZXIKPiBMMi9MMyBzdGF0ZSBkZXBlbmRpbmcg b24gdGhlIFZBVVggc3VwcGx5Lgo+IAo+IEluIHRoZSByZXN1bWUgcGF0aCwgdGhlIGxpbmsgaXMg YnJvdWdodCBiYWNrIGZyb20gTDIgdG8gTDAgYnkgZG9pbmcgYQo+IHNvZnR3YXJlIHJlc2V0Lgo+ IAoKU2FtZSBjb21tZW50IG9uIHRoZSBwYXRjaCBkZXNjcmlwdGlvbiBhcyBvbiBwYXRjaCAyLzQu Cgo+IFNpZ25lZC1vZmYtYnk6IEZyYW5rIExpIDxGcmFuay5MaUBueHAuY29tPgo+IC0tLQo+IAo+ IE5vdGVzOgo+ICAgICBDaGFuZ2UgZnJvbSB2MyB0byB2NAo+ICAgICAtIENhbGwgc2NmZ19wY2ll X3NlbmRfdHVybm9mZl9tc2coKSBzaGFyZWQgd2l0aCBsczEwMjFhCj4gICAgIC0gdXBkYXRlIGNv bW1pdCBtZXNzYWdlCj4gICAgIAo+ICAgICBDaGFuZ2UgZnJvbSB2MiB0byB2Mwo+ICAgICAtIFJl bW92ZSBsc19wY2llX2x1dF9yZWFkbCh3cml0ZWwpIGZ1bmN0aW9uCj4gICAgIAo+ICAgICBDaGFu Z2UgZnJvbSB2MSB0byB2Mgo+ICAgICAtIFVwZGF0ZSBzdWJqZWN0ICdhJyB0byAnQScKPiAKPiAg ZHJpdmVycy9wY2kvY29udHJvbGxlci9kd2MvcGNpLWxheWVyc2NhcGUuYyB8IDYzICsrKysrKysr KysrKysrKysrKysrLQo+ICAxIGZpbGUgY2hhbmdlZCwgNjIgaW5zZXJ0aW9ucygrKSwgMSBkZWxl dGlvbigtKQo+IAo+IGRpZmYgLS1naXQgYS9kcml2ZXJzL3BjaS9jb250cm9sbGVyL2R3Yy9wY2kt bGF5ZXJzY2FwZS5jIGIvZHJpdmVycy9wY2kvY29udHJvbGxlci9kd2MvcGNpLWxheWVyc2NhcGUu Ywo+IGluZGV4IDU5MGUwN2JiMjcwMDIuLmQzOTcwMGIzYWZhYWEgMTAwNjQ0Cj4gLS0tIGEvZHJp dmVycy9wY2kvY29udHJvbGxlci9kd2MvcGNpLWxheWVyc2NhcGUuYwo+ICsrKyBiL2RyaXZlcnMv cGNpL2NvbnRyb2xsZXIvZHdjL3BjaS1sYXllcnNjYXBlLmMKPiBAQCAtNDEsNiArNDEsMTUgQEAK PiAgI2RlZmluZSBTQ0ZHX1BFWFNGVFJTVENSCTB4MTkwCj4gICNkZWZpbmUgUEVYU1IoaWR4KQkJ QklUKGlkeCkKPiAgCj4gKy8qIExTMTA0M0EgUEVYIFBNRSBjb250cm9sIHJlZ2lzdGVyICovCj4g KyNkZWZpbmUgU0NGR19QRVhQTUVDUgkJMHgxNDQKPiArI2RlZmluZSBQRVhQTUUoaWR4KQkJQklU KDMxIC0gKGlkeCkgKiA0KQo+ICsKPiArLyogTFMxMDQzQSBQRVggTFVUIGRlYnVnIHJlZ2lzdGVy ICovCj4gKyNkZWZpbmUgTFNfUENJRV9MREJHCTB4N2ZjCj4gKyNkZWZpbmUgTERCR19TUgkJQklU KDMwKQo+ICsjZGVmaW5lIExEQkdfV0UJCUJJVCgzMSkKPiArCj4gICNkZWZpbmUgUENJRV9JQVRV X05VTQkJNgo+ICAKPiAgc3RydWN0IGxzX3BjaWVfZHJ2ZGF0YSB7Cj4gQEAgLTIyNSw2ICsyMzQs NDUgQEAgc3RhdGljIGludCBsczEwMjFhX3BjaWVfZXhpdF9mcm9tX2wyKHN0cnVjdCBkd19wY2ll X3JwICpwcCkKPiAgCXJldHVybiBzY2ZnX3BjaWVfZXhpdF9mcm9tX2wyKHBjaWUtPnNjZmcsIFND RkdfUEVYU0ZUUlNUQ1IsIFBFWFNSKHBjaWUtPmluZGV4KSk7Cj4gIH0KPiAgCj4gK3N0YXRpYyB2 b2lkIGxzMTA0M2FfcGNpZV9zZW5kX3R1cm5vZmZfbXNnKHN0cnVjdCBkd19wY2llX3JwICpwcCkK PiArewo+ICsJc3RydWN0IGR3X3BjaWUgKnBjaSA9IHRvX2R3X3BjaWVfZnJvbV9wcChwcCk7Cj4g KwlzdHJ1Y3QgbHNfcGNpZSAqcGNpZSA9IHRvX2xzX3BjaWUocGNpKTsKPiArCj4gKwlzY2ZnX3Bj aWVfc2VuZF90dXJub2ZmX21zZyhwY2llLT5zY2ZnLCBTQ0ZHX1BFWFBNRUNSLCBQRVhQTUUocGNp ZS0+aW5kZXgpKTsKPiArfQo+ICsKPiArc3RhdGljIGludCBsczEwNDNhX3BjaWVfZXhpdF9mcm9t X2wyKHN0cnVjdCBkd19wY2llX3JwICpwcCkKPiArewo+ICsJc3RydWN0IGR3X3BjaWUgKnBjaSA9 IHRvX2R3X3BjaWVfZnJvbV9wcChwcCk7Cj4gKwlzdHJ1Y3QgbHNfcGNpZSAqcGNpZSA9IHRvX2xz X3BjaWUocGNpKTsKPiArCXUzMiB2YWw7Cj4gKwo+ICsJLyoKPiArCSAqIE9ubHkgd2F5IGxldCBQ RVggbW9kdWxlIGV4aXQgTDIgaXMgZG8gYSBzb2Z0d2FyZSByZXNldC4KCkNhbiB5b3UgZXhwYW5k IFBFWD8gV2hhdCBpcyBpdCB1c2VkIGZvcj8KCkFsc28gaWYgdGhlIHJlc2V0IGlzIG9ubHkgZm9y IHRoZSBQRVggbW9kdWxlLCBwbGVhc2UgdXNlIHRoZSBzYW1lIGNvbW1lbnQgaW4KYm90aCBwYXRj aGVzIDIgYW5kIDQuIFBhdGNoIDIgZG9lc24ndCBtZW50aW9uIFBFWCBpbiB0aGUgY29tbWVudC4K Ci0gTWFuaQoKPiArCSAqIExEQkdfV0U6IGFsbG93cyB0aGUgdXNlciB0byBoYXZlIHdyaXRlIGFj Y2VzcyB0byB0aGUgUEVYREJHW1NSXSBmb3IgYm90aCBzZXR0aW5nIGFuZAo+ICsJICoJICAgIGNs ZWFyaW5nIHRoZSBzb2Z0IHJlc2V0IG9uIHRoZSBQRVggbW9kdWxlLgo+ICsJICogTERCR19TUjog V2hlbiBTUiBpcyBzZXQgdG8gMSwgdGhlIFBFWCBtb2R1bGUgZW50ZXJzIHNvZnQgcmVzZXQuCj4g KwkgKi8KPiArCXZhbCA9IGxzX3BjaWVfcGZfbHV0X3JlYWRsKHBjaWUsIExTX1BDSUVfTERCRyk7 Cj4gKwl2YWwgfD0gTERCR19XRTsKPiArCWxzX3BjaWVfcGZfbHV0X3dyaXRlbChwY2llLCBMU19Q Q0lFX0xEQkcsIHZhbCk7Cj4gKwo+ICsJdmFsID0gbHNfcGNpZV9wZl9sdXRfcmVhZGwocGNpZSwg TFNfUENJRV9MREJHKTsKPiArCXZhbCB8PSBMREJHX1NSOwo+ICsJbHNfcGNpZV9wZl9sdXRfd3Jp dGVsKHBjaWUsIExTX1BDSUVfTERCRywgdmFsKTsKPiArCj4gKwl2YWwgPSBsc19wY2llX3BmX2x1 dF9yZWFkbChwY2llLCBMU19QQ0lFX0xEQkcpOwo+ICsJdmFsICY9IH5MREJHX1NSOwo+ICsJbHNf cGNpZV9wZl9sdXRfd3JpdGVsKHBjaWUsIExTX1BDSUVfTERCRywgdmFsKTsKPiArCj4gKwl2YWwg PSBsc19wY2llX3BmX2x1dF9yZWFkbChwY2llLCBMU19QQ0lFX0xEQkcpOwo+ICsJdmFsICY9IH5M REJHX1dFOwo+ICsJbHNfcGNpZV9wZl9sdXRfd3JpdGVsKHBjaWUsIExTX1BDSUVfTERCRywgdmFs KTsKPiArCj4gKwlyZXR1cm4gMDsKPiArfQo+ICsKPiAgc3RhdGljIGNvbnN0IHN0cnVjdCBkd19w Y2llX2hvc3Rfb3BzIGxzX3BjaWVfaG9zdF9vcHMgPSB7Cj4gIAkuaG9zdF9pbml0ID0gbHNfcGNp ZV9ob3N0X2luaXQsCj4gIAkucG1lX3R1cm5fb2ZmID0gbHNfcGNpZV9zZW5kX3R1cm5vZmZfbXNn LAo+IEBAIC0yNDIsNiArMjkwLDE5IEBAIHN0YXRpYyBjb25zdCBzdHJ1Y3QgbHNfcGNpZV9kcnZk YXRhIGxzMTAyMWFfZHJ2ZGF0YSA9IHsKPiAgCS5leGl0X2Zyb21fbDIgPSBsczEwMjFhX3BjaWVf ZXhpdF9mcm9tX2wyLAo+ICB9Owo+ICAKPiArc3RhdGljIGNvbnN0IHN0cnVjdCBkd19wY2llX2hv c3Rfb3BzIGxzMTA0M2FfcGNpZV9ob3N0X29wcyA9IHsKPiArCS5ob3N0X2luaXQgPSBsc19wY2ll X2hvc3RfaW5pdCwKPiArCS5wbWVfdHVybl9vZmYgPSBsczEwNDNhX3BjaWVfc2VuZF90dXJub2Zm X21zZywKPiArfTsKPiArCj4gK3N0YXRpYyBjb25zdCBzdHJ1Y3QgbHNfcGNpZV9kcnZkYXRhIGxz MTA0M2FfZHJ2ZGF0YSA9IHsKPiArCS5wZl9sdXRfb2ZmID0gMHgxMDAwMCwKPiArCS5wbV9zdXBw b3J0ID0gdHJ1ZSwKPiArCS5zY2ZnX3N1cHBvcnQgPSB0cnVlLAo+ICsJLm9wcyA9ICZsczEwNDNh X3BjaWVfaG9zdF9vcHMsCj4gKwkuZXhpdF9mcm9tX2wyID0gbHMxMDQzYV9wY2llX2V4aXRfZnJv bV9sMiwKPiArfTsKPiArCj4gIHN0YXRpYyBjb25zdCBzdHJ1Y3QgbHNfcGNpZV9kcnZkYXRhIGxh eWVyc2NhcGVfZHJ2ZGF0YSA9IHsKPiAgCS5wZl9sdXRfb2ZmID0gMHhjMDAwMCwKPiAgCS5wbV9z dXBwb3J0ID0gdHJ1ZSwKPiBAQCAtMjUyLDcgKzMxMyw3IEBAIHN0YXRpYyBjb25zdCBzdHJ1Y3Qg b2ZfZGV2aWNlX2lkIGxzX3BjaWVfb2ZfbWF0Y2hbXSA9IHsKPiAgCXsgLmNvbXBhdGlibGUgPSAi ZnNsLGxzMTAxMmEtcGNpZSIsIC5kYXRhID0gJmxheWVyc2NhcGVfZHJ2ZGF0YSB9LAo+ICAJeyAu Y29tcGF0aWJsZSA9ICJmc2wsbHMxMDIxYS1wY2llIiwgLmRhdGEgPSAmbHMxMDIxYV9kcnZkYXRh IH0sCj4gIAl7IC5jb21wYXRpYmxlID0gImZzbCxsczEwMjhhLXBjaWUiLCAuZGF0YSA9ICZsYXll cnNjYXBlX2RydmRhdGEgfSwKPiAtCXsgLmNvbXBhdGlibGUgPSAiZnNsLGxzMTA0M2EtcGNpZSIs IC5kYXRhID0gJmxzMTAyMWFfZHJ2ZGF0YSB9LAo+ICsJeyAuY29tcGF0aWJsZSA9ICJmc2wsbHMx MDQzYS1wY2llIiwgLmRhdGEgPSAmbHMxMDQzYV9kcnZkYXRhIH0sCj4gIAl7IC5jb21wYXRpYmxl ID0gImZzbCxsczEwNDZhLXBjaWUiLCAuZGF0YSA9ICZsYXllcnNjYXBlX2RydmRhdGEgfSwKPiAg CXsgLmNvbXBhdGlibGUgPSAiZnNsLGxzMjA4MGEtcGNpZSIsIC5kYXRhID0gJmxheWVyc2NhcGVf ZHJ2ZGF0YSB9LAo+ICAJeyAuY29tcGF0aWJsZSA9ICJmc2wsbHMyMDg1YS1wY2llIiwgLmRhdGEg PSAmbGF5ZXJzY2FwZV9kcnZkYXRhIH0sCj4gLS0gCj4gMi4zNC4xCj4gCgotLSAK4K6u4K6j4K6/ 4K614K6j4K+N4K6j4K6p4K+NIOCumuCupOCuvuCumuCuv+CuteCuruCvjQoKX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KbGludXgtYXJtLWtlcm5lbCBtYWls aW5nIGxpc3QKbGludXgtYXJtLWtlcm5lbEBsaXN0cy5pbmZyYWRlYWQub3JnCmh0dHA6Ly9saXN0 cy5pbmZyYWRlYWQub3JnL21haWxtYW4vbGlzdGluZm8vbGludXgtYXJtLWtlcm5lbAo=