From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 82630364C7; Wed, 6 Dec 2023 12:27:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="UlRCcDlx" Received: by smtp.kernel.org (Postfix) with ESMTPSA id BC1BDC433C8; Wed, 6 Dec 2023 12:27:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1701865634; bh=SFu4/bR/AMrjm4JlTuMfP6+O1LKZw8xcETHgeCdmOcw=; h=From:List-Id:To:Cc:Subject:Date:In-Reply-To:References:From; b=UlRCcDlxBcdIYtZoPpzMTuhqHXiPWCYfA6idr0x7B3j3Y2UMcQ+waxv51fpaH13zM zxfEclP72Liv5bjZpSgP6sDpzhrxzmK3JYaucrIB1EAhBZjXvf4/sAPiDQBTtVJAhX AaGDCeqqHHBAhSRQF7QuWR3OnECuf/4QxAY40FEZf31Tla//HUoSY+Pgvm0AJ/fn3j 7dfkSQgkmcJJtou2/vXNZMiW0yDZuj7jH49rmmPIlZSL0zZAMSfR+smj12+l1E3BNJ wnQ1zNYJ1Y624VCEyb3EArLu3uKZgp/f7+o+lHj+NmiWNUFj6Gu/R3Cj4GK20GbDSt z+2M1Lo5wc4UQ== From: Conor Dooley To: soc@kernel.org, Conor Dooley Cc: Conor Dooley , Arnd Bergmann , Daire McNamara , Rob Herring , Krzysztof Kozlowski , Moritz Fischer , Wu Hao , Xu Yilun , Tom Rix , Russ Weight , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-fpga@vger.kernel.org Subject: Re: [PATCH v3 0/6] PolarFire SoC Auto Update Support Date: Wed, 6 Dec 2023 12:25:58 +0000 Message-Id: <20231206-catfight-trailing-47b7b547e79b@spud> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231020-agreeably-filing-3d48708e6262@spud> References: <20231020-agreeably-filing-3d48708e6262@spud> Precedence: bulk X-Mailing-List: linux-fpga@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Developer-Signature: v=1; a=openpgp-sha256; l=1335; i=conor.dooley@microchip.com; h=from:subject:message-id; bh=zTxZ7tRHD+kYdL3Atrz/x5KAMx98vgPG50Y04wXmGgk=; b=owGbwMvMwCFWscWwfUFT0iXG02pJDKkFGcHW+uFcuo67KtRWbXzAJcHVK2PBLG9zq8H3gOyPZ 98fK7zrKGVhEONgkBVTZEm83dcitf6Pyw7nnrcwc1iZQIYwcHEKwETq/jD8szAQym13+xgbeTva UWzKI+W50QJ8bS6WPW6nejyqOk5/YGRofxHUuPRLGNept/eWWBrNfvnPZIqGxIOCdzyLy81bgt/ zAwA= X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C Content-Transfer-Encoding: 8bit From: Conor Dooley On Fri, 20 Oct 2023 14:18:38 +0100, Conor Dooley wrote: > Hey all, > > This patchset adds support for the "Auto Update" feature on PolarFire > SoC that allows for writing an FPGA bistream to the SPI flash connected > to the system controller. > On powercycle (or reboot depending on how the firmware implements the > openSBI SRST extension) "Auto Update" will take place, and program the > FPGA with the contents of the SPI flash - provided that that image is > valid and an actual upgrade from that already programmed. > > [...] Arnd, I've gone and applied this stuff since things have been dead since I sent it & will send it to you for the upcoming mw in a few weeks. [1/6] dt-bindings: soc: microchip: add a property for system controller flash https://git.kernel.org/conor/c/98d62e97c39f [2/6] soc: microchip: mpfs: enable access to the system controller's flash https://git.kernel.org/conor/c/742aa6c563d2 [3/6] soc: microchip: mpfs: print service status in warning message https://git.kernel.org/conor/c/a8f00589be7b [4/6] soc: microchip: mpfs: add auto-update subdev to system controller https://git.kernel.org/conor/c/fad13b5b73e0 [5/6] firmware: microchip: add PolarFire SoC Auto Update support https://git.kernel.org/conor/c/ec5b0f1193ad Thanks, Conor. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 20B4DC4167B for ; Wed, 6 Dec 2023 12:27:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Vt9jDizEE5YdWteSwe73cw7LJFVl3RVgstG/mRookII=; b=ex9ExqcftbWlPr M3ADZwaQRGXK+OZg5X6H446BH5/hFTKtGdgAKX33PKDejTA1XktVFK+pZ+ztcf5KFczD+eXVzoGx5 QCt+wRNAM+hPBuvTo7CGDY7xC3GNcI8oS4031Zw70wNfcOW2ln4M9dWoRc218WFm1YtBwGeUc+h4X NyXo5kVTogYXZgD33bNM5HpxZZVJUi6aRW4psJE/oEhWwsT4y4VjciW5hfKDTsH1c2uyHETficwTj oo7HA+CDGpAURAzQy2uJN2VkID+YSeqNxhqe4Nc2gGwjVshVnK4MRoAwfQJH/4jOXDtMLKN12uf8u nUF6GJmO6rLDhU7izztQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rAqzo-00AFe3-0q; Wed, 06 Dec 2023 12:27:20 +0000 Received: from ams.source.kernel.org ([145.40.68.75]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rAqzl-00AFdB-0F for linux-riscv@lists.infradead.org; Wed, 06 Dec 2023 12:27:18 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by ams.source.kernel.org (Postfix) with ESMTP id 8054CB8207D; Wed, 6 Dec 2023 12:27:15 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id BC1BDC433C8; Wed, 6 Dec 2023 12:27:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1701865634; bh=SFu4/bR/AMrjm4JlTuMfP6+O1LKZw8xcETHgeCdmOcw=; h=From:List-Id:To:Cc:Subject:Date:In-Reply-To:References:From; b=UlRCcDlxBcdIYtZoPpzMTuhqHXiPWCYfA6idr0x7B3j3Y2UMcQ+waxv51fpaH13zM zxfEclP72Liv5bjZpSgP6sDpzhrxzmK3JYaucrIB1EAhBZjXvf4/sAPiDQBTtVJAhX AaGDCeqqHHBAhSRQF7QuWR3OnECuf/4QxAY40FEZf31Tla//HUoSY+Pgvm0AJ/fn3j 7dfkSQgkmcJJtou2/vXNZMiW0yDZuj7jH49rmmPIlZSL0zZAMSfR+smj12+l1E3BNJ wnQ1zNYJ1Y624VCEyb3EArLu3uKZgp/f7+o+lHj+NmiWNUFj6Gu/R3Cj4GK20GbDSt z+2M1Lo5wc4UQ== From: Conor Dooley To: soc@kernel.org, Conor Dooley Cc: Conor Dooley , Arnd Bergmann , Daire McNamara , Rob Herring , Krzysztof Kozlowski , Moritz Fischer , Wu Hao , Xu Yilun , Tom Rix , Russ Weight , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-fpga@vger.kernel.org Subject: Re: [PATCH v3 0/6] PolarFire SoC Auto Update Support Date: Wed, 6 Dec 2023 12:25:58 +0000 Message-Id: <20231206-catfight-trailing-47b7b547e79b@spud> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231020-agreeably-filing-3d48708e6262@spud> References: <20231020-agreeably-filing-3d48708e6262@spud> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1335; i=conor.dooley@microchip.com; h=from:subject:message-id; bh=zTxZ7tRHD+kYdL3Atrz/x5KAMx98vgPG50Y04wXmGgk=; b=owGbwMvMwCFWscWwfUFT0iXG02pJDKkFGcHW+uFcuo67KtRWbXzAJcHVK2PBLG9zq8H3gOyPZ 98fK7zrKGVhEONgkBVTZEm83dcitf6Pyw7nnrcwc1iZQIYwcHEKwETq/jD8szAQym13+xgbeTva UWzKI+W50QJ8bS6WPW6nejyqOk5/YGRofxHUuPRLGNept/eWWBrNfvnPZIqGxIOCdzyLy81bgt/ zAwA= X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231206_042717_263967_A89147ED X-CRM114-Status: GOOD ( 11.59 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Conor Dooley On Fri, 20 Oct 2023 14:18:38 +0100, Conor Dooley wrote: > Hey all, > > This patchset adds support for the "Auto Update" feature on PolarFire > SoC that allows for writing an FPGA bistream to the SPI flash connected > to the system controller. > On powercycle (or reboot depending on how the firmware implements the > openSBI SRST extension) "Auto Update" will take place, and program the > FPGA with the contents of the SPI flash - provided that that image is > valid and an actual upgrade from that already programmed. > > [...] Arnd, I've gone and applied this stuff since things have been dead since I sent it & will send it to you for the upcoming mw in a few weeks. [1/6] dt-bindings: soc: microchip: add a property for system controller flash https://git.kernel.org/conor/c/98d62e97c39f [2/6] soc: microchip: mpfs: enable access to the system controller's flash https://git.kernel.org/conor/c/742aa6c563d2 [3/6] soc: microchip: mpfs: print service status in warning message https://git.kernel.org/conor/c/a8f00589be7b [4/6] soc: microchip: mpfs: add auto-update subdev to system controller https://git.kernel.org/conor/c/fad13b5b73e0 [5/6] firmware: microchip: add PolarFire SoC Auto Update support https://git.kernel.org/conor/c/ec5b0f1193ad Thanks, Conor. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv