diff for duplicates of <20231213170951.93453-12-ajones@ventanamicro.com>

diff --git a/a/1.txt b/N1/1.txt
index c6bcbcd..7b8c970 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -97,3 +97,9 @@ index d146ca71e0c0..6c25f7843ef4 100644
  }
 -- 
 2.43.0
+
+
+_______________________________________________
+linux-riscv mailing list
+linux-riscv@lists.infradead.org
+http://lists.infradead.org/mailman/listinfo/linux-riscv
diff --git a/a/content_digest b/N1/content_digest
index 7892177..b0d0378 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -2,7 +2,12 @@
  "From\0Andrew Jones <ajones@ventanamicro.com>\0"
  "Subject\0[PATCH v2 4/6] KVM: riscv: selftests: Add RISCV_SBI_EXT_REG\0"
  "Date\0Wed, 13 Dec 2023 18:09:56 +0100\0"
- "To\0kvm-riscv@lists.infradead.org\0"
+ "To\0kvm-riscv@lists.infradead.org"
+ " linux-riscv@lists.infradead.org\0"
+ "Cc\0anup@brainfault.org"
+  atishp@atishpatra.org
+  palmer@dabbelt.com
+ " haibo1.xu@intel.com\0"
  "\00:1\0"
  "b\0"
  "While adding RISCV_SBI_EXT_REG(), acknowledge that some registers\n"
@@ -103,6 +108,12 @@
  " \treturn vcpu;\n"
  " }\n"
  "-- \n"
- 2.43.0
+ "2.43.0\n"
+ "\n"
+ "\n"
+ "_______________________________________________\n"
+ "linux-riscv mailing list\n"
+ "linux-riscv@lists.infradead.org\n"
+ http://lists.infradead.org/mailman/listinfo/linux-riscv
 
-5736beacffa1fbb21de0163dde2fe8bf635464e57143da40652446a6a6e957b7
+e10e6a8ed3fac1c1fdb197a2bad5650bfd499621e9b22010869174719fdddfd1
