From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B60E5C46CD4 for ; Fri, 29 Dec 2023 08:33:05 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id E07A487AF6; Fri, 29 Dec 2023 09:32:54 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=quarantine dis=none) header.from=andestech.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 5CF9C87AF0; Fri, 29 Dec 2023 09:32:53 +0100 (CET) Received: from Atcsqr.andestech.com (60-248-80-70.hinet-ip.hinet.net [60.248.80.70]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id C76C987B05 for ; Fri, 29 Dec 2023 09:32:49 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=quarantine dis=none) header.from=andestech.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=randolph@andestech.com Received: from mail.andestech.com (ATCPCS16.andestech.com [10.0.1.222]) by Atcsqr.andestech.com with ESMTP id 3BT8Wg1M082384; Fri, 29 Dec 2023 16:32:42 +0800 (+08) (envelope-from randolph@andestech.com) Received: from atctrx.andestech.com (10.0.15.173) by ATCPCS16.andestech.com (10.0.1.222) with Microsoft SMTP Server id 14.3.498.0; Fri, 29 Dec 2023 16:32:39 +0800 From: Randolph To: CC: , , , Randolph Subject: [PATCH V4 2/3] spl: riscv: falcon: move fdt blob to specified address Date: Fri, 29 Dec 2023 16:32:22 +0800 Message-ID: <20231229083223.3867307-3-randolph@andestech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231229083223.3867307-1-randolph@andestech.com> References: <20231229083223.3867307-1-randolph@andestech.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.0.15.173] X-DNSRBL: X-MAIL: Atcsqr.andestech.com 3BT8Wg1M082384 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean In Falcon Boot mode, the fdt blob should be move to the RAM from kernel BSS section. To avoid being cleared by BSS initialisation. SPL_PAYLOAD_ARGS_ADDR is the address where SPL copies. Signed-off-by: Randolph --- board/AndesTech/ae350/ae350.c | 25 ------------------------- common/spl/Kconfig | 2 +- common/spl/spl_opensbi.c | 15 +++++++++++++++ 3 files changed, 16 insertions(+), 26 deletions(-) diff --git a/board/AndesTech/ae350/ae350.c b/board/AndesTech/ae350/ae350.c index 772c6bf1ee..36375d9def 100644 --- a/board/AndesTech/ae350/ae350.c +++ b/board/AndesTech/ae350/ae350.c @@ -19,8 +19,6 @@ #include #include #include -#include -#include DECLARE_GLOBAL_DATA_PTR; @@ -28,29 +26,6 @@ DECLARE_GLOBAL_DATA_PTR; * Miscellaneous platform dependent initializations */ -#if CONFIG_IS_ENABLED(LOAD_FIT) || CONFIG_IS_ENABLED(LOAD_FIT_FULL) -#define ANDES_SPL_FDT_ADDR (CONFIG_TEXT_BASE - 0x100000) -void spl_perform_fixups(struct spl_image_info *spl_image) -{ - /* - * Originally, u-boot-spl will place DTB directly after the kernel, - * but the size of the kernel did not include the BSS section, which - * means u-boot-spl will place the DTB in the kernel BSS section - * causing the DTB to be cleared by kernel BSS initializtion. - * Moving DTB in front of the kernel can avoid the error. - */ - if (ANDES_SPL_FDT_ADDR < 0) { - printf("%s: CONFIG_TEXT_BASE needs to be larger than 0x100000\n", - __func__); - hang(); - } - - memcpy((void *)ANDES_SPL_FDT_ADDR, spl_image->fdt_addr, - fdt_totalsize(spl_image->fdt_addr)); - spl_image->fdt_addr = map_sysmem(ANDES_SPL_FDT_ADDR, 0); -} -#endif - int board_init(void) { gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400; diff --git a/common/spl/Kconfig b/common/spl/Kconfig index c521b02f4a..bb283d823e 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -1081,7 +1081,7 @@ config SPL_OS_BOOT config SPL_PAYLOAD_ARGS_ADDR hex "Address in memory to load 'args' file for Falcon Mode to" - depends on SPL_OS_BOOT + depends on SPL_OS_BOOT || SPL_LOAD_FIT_OPENSBI_OS_BOOT default 0x88000000 if ARCH_OMAP2PLUS help Address in memory where the 'args' file, typically a device tree diff --git a/common/spl/spl_opensbi.c b/common/spl/spl_opensbi.c index 9801d38c0b..8127ebc946 100644 --- a/common/spl/spl_opensbi.c +++ b/common/spl/spl_opensbi.c @@ -16,6 +16,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -57,6 +58,20 @@ void __noreturn spl_invoke_opensbi(struct spl_image_info *spl_image) hang(); } + /* + * Originally, u-boot-spl will place DTB directly after the kernel, + * but the size of the kernel did not include the BSS section, which + * means u-boot-spl will place the DTB in the kernel BSS section + * causing the DTB to be cleared by kernel BSS initializtion. + * Moving DTB in front of the kernel can avoid the error. + */ +#if CONFIG_IS_ENABLED(LOAD_FIT_OPENSBI_OS_BOOT) && \ + CONFIG_IS_ENABLED(PAYLOAD_ARGS_ADDR) + memcpy((void *)CONFIG_SPL_PAYLOAD_ARGS_ADDR, spl_image->fdt_addr, + fdt_totalsize(spl_image->fdt_addr)); + spl_image->fdt_addr = map_sysmem(CONFIG_SPL_PAYLOAD_ARGS_ADDR, 0); +#endif + /* * Find next os image in /fit-images * The next os image default is u-boot proper, once enable -- 2.34.1