[krzk-github:n/audio-sm8650-on-neil-codelinaro-topic-sm8650-upstream-integ 16454/16521] drivers/mailbox/qcom-cpucp-mbox.c:55:18: error: implicit declaration of function 'readq'; did you mean 'readl'?

[kernel test robot <lkp@intel.com>]

tree:   https://github.com/krzk/linux n/audio-sm8650-on-neil-codelinaro-topic-sm8650-upstream-integ
head:   a793d03eceb5f77a083fbe3513016239b281fb0c
commit: 391f455feb268821a2dadc021a1438208cbd382d [16454/16521] mailbox: Add support for QTI CPUCP mailbox controller
config: microblaze-allmodconfig (https://download.01.org/0day-ci/archive/20240105/202401050446.ManicaWd-lkp@intel.com/config)
compiler: microblaze-linux-gcc (GCC) 13.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240105/202401050446.ManicaWd-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202401050446.ManicaWd-lkp@intel.com/

All errors (new ones prefixed by >>):

   drivers/mailbox/qcom-cpucp-mbox.c: In function 'qcom_cpucp_mbox_irq_fn':
>> drivers/mailbox/qcom-cpucp-mbox.c:55:18: error: implicit declaration of function 'readq'; did you mean 'readl'? [-Werror=implicit-function-declaration]
      55 |         status = readq(cpucp->rx_base + APSS_CPUCP_RX_MBOX_STAT);
         |                  ^~~~~
         |                  readl
>> drivers/mailbox/qcom-cpucp-mbox.c:62:25: error: implicit declaration of function 'writeq'; did you mean 'writel'? [-Werror=implicit-function-declaration]
      62 |                         writeq(status, cpucp->rx_base + APSS_CPUCP_RX_MBOX_CLEAR);
         |                         ^~~~~~
         |                         writel
   cc1: some warnings being treated as errors


vim +55 drivers/mailbox/qcom-cpucp-mbox.c

    47	
    48	static irqreturn_t qcom_cpucp_mbox_irq_fn(int irq, void *data)
    49	{
    50		struct qcom_cpucp_mbox *cpucp = data;
    51		u64 status;
    52		u32 val;
    53		int i;
    54	
  > 55		status = readq(cpucp->rx_base + APSS_CPUCP_RX_MBOX_STAT);
    56	
    57		for (i = 0; i < cpucp->num_chan; i++) {
    58			val = 0;
    59			if (status & ((u64)1 << i)) {
    60				val = readl(cpucp->rx_base + APSS_CPUCP_RX_MBOX_CMD + (i * 8) + APSS_CPUCP_MBOX_CMD_OFF);
    61				mbox_chan_received_data(&cpucp->chans[i], &val);
  > 62				writeq(status, cpucp->rx_base + APSS_CPUCP_RX_MBOX_CLEAR);
    63			}
    64		}
    65	
    66		return IRQ_HANDLED;
    67	}
    68	

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