From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-qv1-f41.google.com (mail-qv1-f41.google.com [209.85.219.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8E7AD241F0 for ; Fri, 19 Jan 2024 08:36:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.219.41 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705653416; cv=none; b=WWpB2BEWgto9l3oEtw/ZPA55V/AS34PXX7rSvWdopBImESdH1YlBZU35KstcbJlOfrFtI8thNoMtH/2xCktTVSAow11CfhdNf8568AAesGNeJKWuNpPCXLxfrqiO3kQ6kMNyMotGSnkLP4vmz/dDJ9drMLP0Hf4fXyi9xJosLGM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705653416; c=relaxed/simple; bh=An74sy0Qj9Fshhiuou7kSc+ngOIXJBHat6su2pQipds=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=g1QY95doB5ibW0grtiavEMhP+lLUVPX6O4D/90TfGJ2ZXHsUxTjrLkmJV1aHjRNr2vPcwiPOiMr/Oyu4ZfgBA2wu5Q96L3XXNWjclDjVl/RaKU4SEgxmGJAQd/I5V/QxkIqSpEz24RMvtFq9oz0TkI2+Z+5ENxPze7isYJKTdvw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=I56NxTDL; arc=none smtp.client-ip=209.85.219.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="I56NxTDL" Received: by mail-qv1-f41.google.com with SMTP id 6a1803df08f44-681781f8401so3957266d6.1 for ; Fri, 19 Jan 2024 00:36:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1705653412; x=1706258212; darn=lists.linux.dev; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date:from:to :cc:subject:date:message-id:reply-to; bh=/m9Dn2s7DAcJl6iK8lEgisV9JoAgGh1R4B8Dzyz9OsA=; b=I56NxTDLztQTm974EADCZgJfXgeuqlyBQXAdKYR5aWdhnOwN2Loh79QWIQ8icdifkX sZWNT6bo2GlX59/2MS2mnO+b8X0V9V0n+fC57JdWALibWC8JkD9GcHm71qCLOOiqISVl TERDlkWyo7tdLJ5n+D8qbsl6ahl9UcCP6/JI59Ga4JQVeCkjL7M2VAIdm6vaseMJEKI5 ZPSpgHosnQUC4snsuN48S4bf7iagl3QBeC573zZ9EwdWhGGbnRKUqCr+DlyP6N9JKV4D VxR60z8hAbNjM7Q/KO75Y4VzrjJQscp3F4nC7t+G5rnRNweU0v2YHZRCxEvPWHZ9ZqZl nHrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705653412; x=1706258212; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=/m9Dn2s7DAcJl6iK8lEgisV9JoAgGh1R4B8Dzyz9OsA=; b=ugfRhukRwDZyaF5d+ATGPw1EHqbNRC8+Z91tcJt5GlGCTFjgVW10XK2S4undYvwJ/3 oI4l8xHyyPu97tsB+mJQRJ2pWrKb+Ij4dPzIt0D3dyyJd2X/xq8SieKs7SXlCp7P1H2y V3nkbmlD+/BjgLxwoegKhgl+ltl5qTvoZkliePiLvft5zPp+tFaI3PrX1GAyKaDJ0aAw R7YUhlTupMA29EhV2rbFAw40CXL9gEOv+/XxYtYFZflBJvG4cHrLX9Y2SEPaBtGfSAPr g73qMuqZ0pUg3v8t/upCMvt67LeLkARXT31e1rdAKPnYRbo1deRKUNiwgP642kNu/H2v 3arQ== X-Gm-Message-State: AOJu0YzWt7ZRs5VpGsgXb5bseOgNB0A+BqI5TMB/PQS+KEBWcq0vJFiS GVkOSo68gVxDH0L8wKq3/p+1rvanBS0QKql5iixBkiBCp1griG9cBi6etFC7+g== X-Google-Smtp-Source: AGHT+IGlb7Np49bNK6MfN45X9m/DEmw7SZ2hsGwQDKQU1UGOoLwHr2Rse3cZQJORbM9zYpOtddks/w== X-Received: by 2002:a05:6214:440a:b0:683:29e6:d696 with SMTP id oj10-20020a056214440a00b0068329e6d696mr680148qvb.102.1705653412167; Fri, 19 Jan 2024 00:36:52 -0800 (PST) Received: from thinkpad ([117.248.2.56]) by smtp.gmail.com with ESMTPSA id lu19-20020a0562145a1300b0068200592351sm498483qvb.89.2024.01.19.00.36.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 19 Jan 2024 00:36:51 -0800 (PST) Date: Fri, 19 Jan 2024 14:06:39 +0530 From: Manivannan Sadhasivam To: Frank Li Cc: krzysztof.kozlowski@linaro.org, bhelgaas@google.com, conor+dt@kernel.org, devicetree@vger.kernel.org, festevam@gmail.com, helgaas@kernel.org, hongxing.zhu@nxp.com, imx@lists.linux.dev, kernel@pengutronix.de, krzysztof.kozlowski+dt@linaro.org, kw@linux.com, l.stach@pengutronix.de, linux-arm-kernel@lists.infradead.org, linux-imx@nxp.com, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, lpieralisi@kernel.org, robh@kernel.org, s.hauer@pengutronix.de, shawnguo@kernel.org Subject: Re: [PATCH v8 16/16] PCI: imx6: Add iMX95 Endpoint (EP) support Message-ID: <20240119083639.GI2866@thinkpad> References: <20240108232145.2116455-1-Frank.Li@nxp.com> <20240108232145.2116455-17-Frank.Li@nxp.com> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20240108232145.2116455-17-Frank.Li@nxp.com> On Mon, Jan 08, 2024 at 06:21:45PM -0500, Frank Li wrote: > Add iMX95 EP support and add 64bit address support. Internal bus bridge for > PCI support 64bit dma address in iMX95. Hence, call > dma_set_mask_and_coherent() to set 64 bit DMA mask. > > Signed-off-by: Frank Li One comment below. With that addressed, Reviewed-by: Manivannan Sadhasivam > --- > > Notes: > Change from v7 to v8 > - Update commit message > - Using Fixme > - Update clks_cnts by ARRAY_SIZE > > Change from v4 to v7 > - none > Change from v3 to v4 > - change align to 4k for imx95 > Change from v1 to v3 > - new patches at v3 > > drivers/pci/controller/dwc/pci-imx6.c | 46 +++++++++++++++++++++++++++ > 1 file changed, 46 insertions(+) > > diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c > index 3f474d4749dce..69ba72c3a9c9c 100644 > --- a/drivers/pci/controller/dwc/pci-imx6.c > +++ b/drivers/pci/controller/dwc/pci-imx6.c > @@ -75,6 +75,7 @@ enum imx6_pcie_variants { > IMX8MQ_EP, > IMX8MM_EP, > IMX8MP_EP, > + IMX95_EP, > }; > > #define IMX6_PCIE_FLAG_IMX6_PHY BIT(0) > @@ -84,6 +85,7 @@ enum imx6_pcie_variants { > #define IMX6_PCIE_FLAG_HAS_APP_RESET BIT(4) > #define IMX6_PCIE_FLAG_HAS_PHY_RESET BIT(5) > #define IMX6_PCIE_FLAG_HAS_SERDES BIT(6) > +#define IMX6_PCIE_FLAG_SUPPORT_64BIT BIT(7) > > #define imx6_check_flag(pci, val) (pci->drvdata->flags & val) > > @@ -616,6 +618,7 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie) > break; > case IMX7D: > case IMX95: > + case IMX95_EP: > break; > case IMX8MM: > case IMX8MM_EP: > @@ -1050,6 +1053,23 @@ static const struct pci_epc_features imx8m_pcie_epc_features = { > .align = SZ_64K, > }; > > +/* > + * BAR# | Default BAR enable | Default BAR Type | Default BAR Size | BAR Sizing Scheme > + * ================================================================================================ > + * BAR0 | Enable | 64-bit | 1 MB | Programmable Size > + * BAR1 | Disable | 32-bit | 64 KB | Fixed Size > + * | (If BAR0 is 64-bit) | (if BAR0 is 32-bit) | (if BAR0 is 32-bit) | As Bar0 is 64bit I think the above comment needs some fixup. I think you want to say that if BAR0 is 64bit then BAR1 should be disabled? If not, please clarify. > + * BAR2 | Enable | 32-bit | 1 MB | Programmable Size > + * BAR3 | Enable | 32-bit | 64 KB | Programmable Size > + * BAR4 | Enable | 32-bit | 1M | Programmable Size > + * BAR5 | Enable | 32-bit | 64 KB | Programmable Size > + */ > +static const struct pci_epc_features imx95_pcie_epc_features = { > + .msi_capable = true, > + .bar_fixed_size[1] = SZ_64K, > + .align = SZ_4K, > +}; > + > static const struct pci_epc_features* > imx6_pcie_ep_get_features(struct dw_pcie_ep *ep) > { > @@ -1092,6 +1112,14 @@ static int imx6_add_pcie_ep(struct imx6_pcie *imx6_pcie, > > pci->dbi_base2 = pci->dbi_base + pcie_dbi2_offset; > > + /* > + * FIXME: dbi2 information should fetch from dtb file. dw_pcie_ep_init() can get dbi_base2 > + * from "dbi2" if pci->dbi_base2 is NULL. All code related pcie_dbi2_offset should be > + * removed after all dts added "dbi2" reg. > + */ FIXME: Ideally, dbi2 base address should come from DT. But since only IMX95 is defining "dbi2" in DT, "dbi_base2" is set to NULL here for that platform alone so that the DWC core code can fetch that from DT. But once all platform DTs were fixed, this and the above "dbi_base2" setting should be removed. - Mani > + if (imx6_pcie->drvdata->variant == IMX95_EP) > + pci->dbi_base2 = NULL; > + > ret = dw_pcie_ep_init(ep); > if (ret) { > dev_err(dev, "failed to initialize endpoint\n"); > @@ -1345,6 +1373,9 @@ static int imx6_pcie_probe(struct platform_device *pdev) > "unable to find iomuxc registers\n"); > } > > + if (imx6_check_flag(imx6_pcie, IMX6_PCIE_FLAG_SUPPORT_64BIT)) > + dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64)); > + > /* Grab PCIe PHY Tx Settings */ > if (of_property_read_u32(node, "fsl,tx-deemph-gen1", > &imx6_pcie->tx_deemph_gen1)) > @@ -1567,6 +1598,20 @@ static const struct imx6_pcie_drvdata drvdata[] = { > .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE, > .epc_features = &imx8m_pcie_epc_features, > }, > + [IMX95_EP] = { > + .variant = IMX95_EP, > + .flags = IMX6_PCIE_FLAG_HAS_SERDES | > + IMX6_PCIE_FLAG_SUPPORT_64BIT, > + .clk_names = imx6_4clks_bus_pcie_phy_aux, > + .clks_cnt = ARRAY_SIZE(imx6_4clks_bus_pcie_phy_aux), > + .ltssm_off = IMX95_PE0_GEN_CTRL_3, > + .ltssm_mask = IMX95_PCIE_LTSSM_EN, > + .mode_off[0] = IMX95_PE0_GEN_CTRL_1, > + .mode_mask[0] = IMX95_PCIE_DEVICE_TYPE, > + .init_phy = imx95_pcie_init_phy, > + .epc_features = &imx95_pcie_epc_features, > + .mode = DW_PCIE_EP_TYPE, > + }, > }; > > static const struct of_device_id imx6_pcie_of_match[] = { > @@ -1581,6 +1626,7 @@ static const struct of_device_id imx6_pcie_of_match[] = { > { .compatible = "fsl,imx8mq-pcie-ep", .data = &drvdata[IMX8MQ_EP], }, > { .compatible = "fsl,imx8mm-pcie-ep", .data = &drvdata[IMX8MM_EP], }, > { .compatible = "fsl,imx8mp-pcie-ep", .data = &drvdata[IMX8MP_EP], }, > + { .compatible = "fsl,imx95-pcie-ep", .data = &drvdata[IMX95_EP], }, > {}, > }; > > -- > 2.34.1 > -- மணிவண்ணன் சதாசிவம் From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 23560C4725D for ; Fri, 19 Jan 2024 08:37:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=/w6PxL2eUXwU+z8FecOb6gIM6YPJbfoOT6IMtMupHjA=; b=XcIVo/2+zif9rR Ndj9UAyeZQR0oMbf1Y6sHiI5ALUL73/tL0+SOQ0ujxOJeGaZubHehxDcF+Oof6kdGfkFiZaHarJjb y9uwwqFWB9nNqgayvRgr7xP6zSwP3AmoA4TPcw3HnYMSR8GsicG6WtxFYBkaF0xRH6N/FN7SuzyeM 70yO6Csd9aS+b0wpfBlUhDrmvRqRw8+UkmQ/rQq0+Kzw3rP9gB2zYpp3m2jZZl6VLY2TgUH4X3zlT VEEi66pLE7/oulqdI5F8eVCEc5/MHhW8wodIKXm9b/EJ9+cnN7o+572CI0R8e+AMW6tu0Q8JywWg2 19lLX0tHvoZ527+AQKfw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rQkN5-004r6t-15; Fri, 19 Jan 2024 08:37:03 +0000 Received: from mail-qv1-xf35.google.com ([2607:f8b0:4864:20::f35]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rQkN2-004r5v-0R for linux-arm-kernel@lists.infradead.org; Fri, 19 Jan 2024 08:37:01 +0000 Received: by mail-qv1-xf35.google.com with SMTP id 6a1803df08f44-680a13af19bso2781596d6.0 for ; Fri, 19 Jan 2024 00:36:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1705653412; x=1706258212; darn=lists.infradead.org; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date:from:to :cc:subject:date:message-id:reply-to; bh=/m9Dn2s7DAcJl6iK8lEgisV9JoAgGh1R4B8Dzyz9OsA=; b=COLO+8zBLzt2TniV8QDHBhUVOpJ0zklNIlF5qq/AKXa+atRxoF0nlGF4UZn2Zq0GPw a6PKRtxX/1M6gO/RpemU3QULt4m+2o4WeiOKxswjE3nf/Jzfc437mxycBTzajq/5sK8g 7750059YwHYm9ahi1KD0/dXBC9g30tzaLdtZxTE6WMHZYIteGLFj1OwyFqmnmLQqg1B2 EOLTS+z05lFEKAarPmhLnRPokGvBFN9pPYOW4vrIIm4Q/7wKlx7ivIHUHH9dt2GXbYv1 ffjGolYE0roVTzBHDdc1Wy/+A/CbRArBPMcnviUf+fJDSs26kx/+t45fX2VzxJWFtVY1 3mrg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705653412; x=1706258212; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=/m9Dn2s7DAcJl6iK8lEgisV9JoAgGh1R4B8Dzyz9OsA=; b=M5htY9kR1w1LwIXLHF58HHf0dhh5xOu85O52eqUUpetS6ZBBmhqYY6zNTeuZCW0qPV 25c3XAnhgp213wdcZH1aSODxIN2owslI2bE09HekV/oBkeXxUIFNAkxWUozyrIYsIyHX /SZc6xAa39cCFzZrSf45zRFSx1wMnVKU61tGdogXIDzQ68UfoXL34qf1+KpVN4p93oDG w5F8DGDBF85+N/f0Opg+7TId1EGAlv8WpCBxr2S69ky8BuS6mO5Ly68tYiu/mr4i53O4 6bsW4LoeJ2Ij8HcVoV3FNrtHYtmMOXY3LSDwYTV+GprIQmvV+zLVKbw3VJ5B69LqXNjH H5jA== X-Gm-Message-State: AOJu0YxecsSezgyzN6QvuJBM8zeNouT3Ry5N0O4vAyM7QKxyxHJsaZBS uVYNBwp3znBlfmg1lSfFYm93/wjGe9qMGtgL90jkVHzpRv7wSmfYTfqF6aj1NQ== X-Google-Smtp-Source: AGHT+IGlb7Np49bNK6MfN45X9m/DEmw7SZ2hsGwQDKQU1UGOoLwHr2Rse3cZQJORbM9zYpOtddks/w== X-Received: by 2002:a05:6214:440a:b0:683:29e6:d696 with SMTP id oj10-20020a056214440a00b0068329e6d696mr680148qvb.102.1705653412167; Fri, 19 Jan 2024 00:36:52 -0800 (PST) Received: from thinkpad ([117.248.2.56]) by smtp.gmail.com with ESMTPSA id lu19-20020a0562145a1300b0068200592351sm498483qvb.89.2024.01.19.00.36.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 19 Jan 2024 00:36:51 -0800 (PST) Date: Fri, 19 Jan 2024 14:06:39 +0530 From: Manivannan Sadhasivam To: Frank Li Cc: krzysztof.kozlowski@linaro.org, bhelgaas@google.com, conor+dt@kernel.org, devicetree@vger.kernel.org, festevam@gmail.com, helgaas@kernel.org, hongxing.zhu@nxp.com, imx@lists.linux.dev, kernel@pengutronix.de, krzysztof.kozlowski+dt@linaro.org, kw@linux.com, l.stach@pengutronix.de, linux-arm-kernel@lists.infradead.org, linux-imx@nxp.com, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, lpieralisi@kernel.org, robh@kernel.org, s.hauer@pengutronix.de, shawnguo@kernel.org Subject: Re: [PATCH v8 16/16] PCI: imx6: Add iMX95 Endpoint (EP) support Message-ID: <20240119083639.GI2866@thinkpad> References: <20240108232145.2116455-1-Frank.Li@nxp.com> <20240108232145.2116455-17-Frank.Li@nxp.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20240108232145.2116455-17-Frank.Li@nxp.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240119_003700_176077_2D950B07 X-CRM114-Status: GOOD ( 27.18 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org T24gTW9uLCBKYW4gMDgsIDIwMjQgYXQgMDY6MjE6NDVQTSAtMDUwMCwgRnJhbmsgTGkgd3JvdGU6 Cj4gQWRkIGlNWDk1IEVQIHN1cHBvcnQgYW5kIGFkZCA2NGJpdCBhZGRyZXNzIHN1cHBvcnQuIElu dGVybmFsIGJ1cyBicmlkZ2UgZm9yCj4gUENJIHN1cHBvcnQgNjRiaXQgZG1hIGFkZHJlc3MgaW4g aU1YOTUuIEhlbmNlLCBjYWxsCj4gZG1hX3NldF9tYXNrX2FuZF9jb2hlcmVudCgpIHRvIHNldCA2 NCBiaXQgRE1BIG1hc2suCj4gCj4gU2lnbmVkLW9mZi1ieTogRnJhbmsgTGkgPEZyYW5rLkxpQG54 cC5jb20+CgpPbmUgY29tbWVudCBiZWxvdy4gV2l0aCB0aGF0IGFkZHJlc3NlZCwKClJldmlld2Vk LWJ5OiBNYW5pdmFubmFuIFNhZGhhc2l2YW0gPG1hbml2YW5uYW4uc2FkaGFzaXZhbUBsaW5hcm8u b3JnPgoKPiAtLS0KPiAKPiBOb3RlczoKPiAgICAgQ2hhbmdlIGZyb20gdjcgdG8gdjgKPiAgICAg LSBVcGRhdGUgY29tbWl0IG1lc3NhZ2UKPiAgICAgLSBVc2luZyBGaXhtZQo+ICAgICAtIFVwZGF0 ZSBjbGtzX2NudHMgYnkgQVJSQVlfU0laRQo+ICAgICAKPiAgICAgQ2hhbmdlIGZyb20gdjQgdG8g djcKPiAgICAgLSBub25lCj4gICAgIENoYW5nZSBmcm9tIHYzIHRvIHY0Cj4gICAgIC0gY2hhbmdl IGFsaWduIHRvIDRrIGZvciBpbXg5NQo+ICAgICBDaGFuZ2UgZnJvbSB2MSB0byB2Mwo+ICAgICAt IG5ldyBwYXRjaGVzIGF0IHYzCj4gCj4gIGRyaXZlcnMvcGNpL2NvbnRyb2xsZXIvZHdjL3BjaS1p bXg2LmMgfCA0NiArKysrKysrKysrKysrKysrKysrKysrKysrKysKPiAgMSBmaWxlIGNoYW5nZWQs IDQ2IGluc2VydGlvbnMoKykKPiAKPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9wY2kvY29udHJvbGxl ci9kd2MvcGNpLWlteDYuYyBiL2RyaXZlcnMvcGNpL2NvbnRyb2xsZXIvZHdjL3BjaS1pbXg2LmMK PiBpbmRleCAzZjQ3NGQ0NzQ5ZGNlLi42OWJhNzJjM2E5YzljIDEwMDY0NAo+IC0tLSBhL2RyaXZl cnMvcGNpL2NvbnRyb2xsZXIvZHdjL3BjaS1pbXg2LmMKPiArKysgYi9kcml2ZXJzL3BjaS9jb250 cm9sbGVyL2R3Yy9wY2ktaW14Ni5jCj4gQEAgLTc1LDYgKzc1LDcgQEAgZW51bSBpbXg2X3BjaWVf dmFyaWFudHMgewo+ICAJSU1YOE1RX0VQLAo+ICAJSU1YOE1NX0VQLAo+ICAJSU1YOE1QX0VQLAo+ ICsJSU1YOTVfRVAsCj4gIH07Cj4gIAo+ICAjZGVmaW5lIElNWDZfUENJRV9GTEFHX0lNWDZfUEhZ CQkJQklUKDApCj4gQEAgLTg0LDYgKzg1LDcgQEAgZW51bSBpbXg2X3BjaWVfdmFyaWFudHMgewo+ ICAjZGVmaW5lIElNWDZfUENJRV9GTEFHX0hBU19BUFBfUkVTRVQJCUJJVCg0KQo+ICAjZGVmaW5l IElNWDZfUENJRV9GTEFHX0hBU19QSFlfUkVTRVQJCUJJVCg1KQo+ICAjZGVmaW5lIElNWDZfUENJ RV9GTEFHX0hBU19TRVJERVMJCUJJVCg2KQo+ICsjZGVmaW5lIElNWDZfUENJRV9GTEFHX1NVUFBP UlRfNjRCSVQJCUJJVCg3KQo+ICAKPiAgI2RlZmluZSBpbXg2X2NoZWNrX2ZsYWcocGNpLCB2YWwp ICAgICAocGNpLT5kcnZkYXRhLT5mbGFncyAmIHZhbCkKPiAgCj4gQEAgLTYxNiw2ICs2MTgsNyBA QCBzdGF0aWMgaW50IGlteDZfcGNpZV9lbmFibGVfcmVmX2NsayhzdHJ1Y3QgaW14Nl9wY2llICpp bXg2X3BjaWUpCj4gIAkJYnJlYWs7Cj4gIAljYXNlIElNWDdEOgo+ICAJY2FzZSBJTVg5NToKPiAr CWNhc2UgSU1YOTVfRVA6Cj4gIAkJYnJlYWs7Cj4gIAljYXNlIElNWDhNTToKPiAgCWNhc2UgSU1Y OE1NX0VQOgo+IEBAIC0xMDUwLDYgKzEwNTMsMjMgQEAgc3RhdGljIGNvbnN0IHN0cnVjdCBwY2lf ZXBjX2ZlYXR1cmVzIGlteDhtX3BjaWVfZXBjX2ZlYXR1cmVzID0gewo+ICAJLmFsaWduID0gU1pf NjRLLAo+ICB9Owo+ICAKPiArLyoKPiArICogQkFSIwl8IERlZmF1bHQgQkFSIGVuYWJsZQl8IERl ZmF1bHQgQkFSIFR5cGUJfCBEZWZhdWx0IEJBUiBTaXplCXwgQkFSIFNpemluZyBTY2hlbWUKPiAr ICogPT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09 PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09Cj4gKyAqIEJBUjAJfCBF bmFibGUJCXwgNjQtYml0CQl8IDEgTUIJCQl8IFByb2dyYW1tYWJsZSBTaXplCj4gKyAqIEJBUjEJ fCBEaXNhYmxlCQl8IDMyLWJpdAkJfCA2NCBLQgkJCXwgRml4ZWQgU2l6ZQo+ICsgKgl8IChJZiBC QVIwIGlzIDY0LWJpdCkJfCAoaWYgQkFSMCBpcyAzMi1iaXQpCXwgKGlmIEJBUjAgaXMgMzItYml0 KQl8IEFzIEJhcjAgaXMgNjRiaXQKCkkgdGhpbmsgdGhlIGFib3ZlIGNvbW1lbnQgbmVlZHMgc29t ZSBmaXh1cC4gSSB0aGluayB5b3Ugd2FudCB0byBzYXkgdGhhdCBpZiBCQVIwCmlzIDY0Yml0IHRo ZW4gQkFSMSBzaG91bGQgYmUgZGlzYWJsZWQ/IElmIG5vdCwgcGxlYXNlIGNsYXJpZnkuCgo+ICsg KiBCQVIyCXwgRW5hYmxlCQl8IDMyLWJpdAkJfCAxIE1CCQkJfCBQcm9ncmFtbWFibGUgU2l6ZQo+ ICsgKiBCQVIzCXwgRW5hYmxlCQl8IDMyLWJpdAkJfCA2NCBLQgkJCXwgUHJvZ3JhbW1hYmxlIFNp emUKPiArICogQkFSNAl8IEVuYWJsZQkJfCAzMi1iaXQJCXwgMU0JCQl8IFByb2dyYW1tYWJsZSBT aXplCj4gKyAqIEJBUjUJfCBFbmFibGUJCXwgMzItYml0CQl8IDY0IEtCCQkJfCBQcm9ncmFtbWFi bGUgU2l6ZQo+ICsgKi8KPiArc3RhdGljIGNvbnN0IHN0cnVjdCBwY2lfZXBjX2ZlYXR1cmVzIGlt eDk1X3BjaWVfZXBjX2ZlYXR1cmVzID0gewo+ICsJLm1zaV9jYXBhYmxlID0gdHJ1ZSwKPiArCS5i YXJfZml4ZWRfc2l6ZVsxXSA9IFNaXzY0SywKPiArCS5hbGlnbiA9IFNaXzRLLAo+ICt9Owo+ICsK PiAgc3RhdGljIGNvbnN0IHN0cnVjdCBwY2lfZXBjX2ZlYXR1cmVzKgo+ICBpbXg2X3BjaWVfZXBf Z2V0X2ZlYXR1cmVzKHN0cnVjdCBkd19wY2llX2VwICplcCkKPiAgewo+IEBAIC0xMDkyLDYgKzEx MTIsMTQgQEAgc3RhdGljIGludCBpbXg2X2FkZF9wY2llX2VwKHN0cnVjdCBpbXg2X3BjaWUgKmlt eDZfcGNpZSwKPiAgCj4gIAlwY2ktPmRiaV9iYXNlMiA9IHBjaS0+ZGJpX2Jhc2UgKyBwY2llX2Ri aTJfb2Zmc2V0Owo+ICAKPiArCS8qCj4gKwkgKiBGSVhNRTogZGJpMiBpbmZvcm1hdGlvbiBzaG91 bGQgZmV0Y2ggZnJvbSBkdGIgZmlsZS4gZHdfcGNpZV9lcF9pbml0KCkgY2FuIGdldCBkYmlfYmFz ZTIKPiArCSAqIGZyb20gImRiaTIiIGlmIHBjaS0+ZGJpX2Jhc2UyIGlzIE5VTEwuIEFsbCBjb2Rl IHJlbGF0ZWQgcGNpZV9kYmkyX29mZnNldCBzaG91bGQgYmUKPiArCSAqIHJlbW92ZWQgYWZ0ZXIg YWxsIGR0cyBhZGRlZCAiZGJpMiIgcmVnLgo+ICsJICovCgoJRklYTUU6IElkZWFsbHksIGRiaTIg YmFzZSBhZGRyZXNzIHNob3VsZCBjb21lIGZyb20gRFQuIEJ1dCBzaW5jZSBvbmx5IElNWDk1IGlz CglkZWZpbmluZyAiZGJpMiIgaW4gRFQsICJkYmlfYmFzZTIiIGlzIHNldCB0byBOVUxMIGhlcmUg Zm9yIHRoYXQgcGxhdGZvcm0gYWxvbmUKCXNvIHRoYXQgdGhlIERXQyBjb3JlIGNvZGUgY2FuIGZl dGNoIHRoYXQgZnJvbSBEVC4gQnV0IG9uY2UgYWxsIHBsYXRmb3JtCglEVHMgd2VyZSBmaXhlZCwg dGhpcyBhbmQgdGhlIGFib3ZlICJkYmlfYmFzZTIiIHNldHRpbmcgc2hvdWxkIGJlIHJlbW92ZWQu CgotIE1hbmkKCj4gKwlpZiAoaW14Nl9wY2llLT5kcnZkYXRhLT52YXJpYW50ID09IElNWDk1X0VQ KQo+ICsJCXBjaS0+ZGJpX2Jhc2UyID0gTlVMTDsKPiArCj4gIAlyZXQgPSBkd19wY2llX2VwX2lu aXQoZXApOwo+ICAJaWYgKHJldCkgewo+ICAJCWRldl9lcnIoZGV2LCAiZmFpbGVkIHRvIGluaXRp YWxpemUgZW5kcG9pbnRcbiIpOwo+IEBAIC0xMzQ1LDYgKzEzNzMsOSBAQCBzdGF0aWMgaW50IGlt eDZfcGNpZV9wcm9iZShzdHJ1Y3QgcGxhdGZvcm1fZGV2aWNlICpwZGV2KQo+ICAJCQkJCSAgICAg InVuYWJsZSB0byBmaW5kIGlvbXV4YyByZWdpc3RlcnNcbiIpOwo+ICAJfQo+ICAKPiArCWlmIChp bXg2X2NoZWNrX2ZsYWcoaW14Nl9wY2llLCBJTVg2X1BDSUVfRkxBR19TVVBQT1JUXzY0QklUKSkK PiArCQlkbWFfc2V0X21hc2tfYW5kX2NvaGVyZW50KGRldiwgRE1BX0JJVF9NQVNLKDY0KSk7Cj4g Kwo+ICAJLyogR3JhYiBQQ0llIFBIWSBUeCBTZXR0aW5ncyAqLwo+ICAJaWYgKG9mX3Byb3BlcnR5 X3JlYWRfdTMyKG5vZGUsICJmc2wsdHgtZGVlbXBoLWdlbjEiLAo+ICAJCQkJICZpbXg2X3BjaWUt PnR4X2RlZW1waF9nZW4xKSkKPiBAQCAtMTU2Nyw2ICsxNTk4LDIwIEBAIHN0YXRpYyBjb25zdCBz dHJ1Y3QgaW14Nl9wY2llX2RydmRhdGEgZHJ2ZGF0YVtdID0gewo+ICAJCS5tb2RlX21hc2tbMF0g PSBJTVg2UV9HUFIxMl9ERVZJQ0VfVFlQRSwKPiAgCQkuZXBjX2ZlYXR1cmVzID0gJmlteDhtX3Bj aWVfZXBjX2ZlYXR1cmVzLAo+ICAJfSwKPiArCVtJTVg5NV9FUF0gPSB7Cj4gKwkJLnZhcmlhbnQg PSBJTVg5NV9FUCwKPiArCQkuZmxhZ3MgPSBJTVg2X1BDSUVfRkxBR19IQVNfU0VSREVTIHwKPiAr CQkJIElNWDZfUENJRV9GTEFHX1NVUFBPUlRfNjRCSVQsCj4gKwkJLmNsa19uYW1lcyA9IGlteDZf NGNsa3NfYnVzX3BjaWVfcGh5X2F1eCwKPiArCQkuY2xrc19jbnQgPSBBUlJBWV9TSVpFKGlteDZf NGNsa3NfYnVzX3BjaWVfcGh5X2F1eCksCj4gKwkJLmx0c3NtX29mZiA9IElNWDk1X1BFMF9HRU5f Q1RSTF8zLAo+ICsJCS5sdHNzbV9tYXNrID0gSU1YOTVfUENJRV9MVFNTTV9FTiwKPiArCQkubW9k ZV9vZmZbMF0gID0gSU1YOTVfUEUwX0dFTl9DVFJMXzEsCj4gKwkJLm1vZGVfbWFza1swXSA9IElN WDk1X1BDSUVfREVWSUNFX1RZUEUsCj4gKwkJLmluaXRfcGh5ID0gaW14OTVfcGNpZV9pbml0X3Bo eSwKPiArCQkuZXBjX2ZlYXR1cmVzID0gJmlteDk1X3BjaWVfZXBjX2ZlYXR1cmVzLAo+ICsJCS5t b2RlID0gRFdfUENJRV9FUF9UWVBFLAo+ICsJfSwKPiAgfTsKPiAgCj4gIHN0YXRpYyBjb25zdCBz dHJ1Y3Qgb2ZfZGV2aWNlX2lkIGlteDZfcGNpZV9vZl9tYXRjaFtdID0gewo+IEBAIC0xNTgxLDYg KzE2MjYsNyBAQCBzdGF0aWMgY29uc3Qgc3RydWN0IG9mX2RldmljZV9pZCBpbXg2X3BjaWVfb2Zf bWF0Y2hbXSA9IHsKPiAgCXsgLmNvbXBhdGlibGUgPSAiZnNsLGlteDhtcS1wY2llLWVwIiwgLmRh dGEgPSAmZHJ2ZGF0YVtJTVg4TVFfRVBdLCB9LAo+ICAJeyAuY29tcGF0aWJsZSA9ICJmc2wsaW14 OG1tLXBjaWUtZXAiLCAuZGF0YSA9ICZkcnZkYXRhW0lNWDhNTV9FUF0sIH0sCj4gIAl7IC5jb21w YXRpYmxlID0gImZzbCxpbXg4bXAtcGNpZS1lcCIsIC5kYXRhID0gJmRydmRhdGFbSU1YOE1QX0VQ XSwgfSwKPiArCXsgLmNvbXBhdGlibGUgPSAiZnNsLGlteDk1LXBjaWUtZXAiLCAuZGF0YSA9ICZk cnZkYXRhW0lNWDk1X0VQXSwgfSwKPiAgCXt9LAo+ICB9Owo+ICAKPiAtLSAKPiAyLjM0LjEKPiAK Ci0tIArgrq7grqPgrr/grrXgrqPgr43grqPgrqngr40g4K6a4K6k4K6+4K6a4K6/4K614K6u4K+N CgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpsaW51eC1h cm0ta2VybmVsIG1haWxpbmcgbGlzdApsaW51eC1hcm0ta2VybmVsQGxpc3RzLmluZnJhZGVhZC5v cmcKaHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5mby9saW51eC1hcm0t a2VybmVsCg==