Re: [PATCH v2] drm/amd/display: Add NULL test for 'timing generator' in 'dcn21_set_pipe()'

[Kees Cook <keescook@chromium.org>]

On Thu, Feb 01, 2024 at 03:28:45PM +0530, Srinivasan Shanmugam wrote:
> In "u32 otg_inst = pipe_ctx->stream_res.tg->inst;"
> pipe_ctx->stream_res.tg could be NULL, it is relying on the caller to
> ensure the tg is not NULL.
> 
> Fixes: 474ac4a875ca ("drm/amd/display: Implement some asic specific abm call backs.")
> Cc: Yongqiang Sun <yongqiang.sun@amd.com>
> Cc: Anthony Koo <Anthony.Koo@amd.com>
> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
> ---
> v2:
>   - s/u32/uint32_t for consistency (Anthony)
> 
>  .../amd/display/dc/hwss/dcn21/dcn21_hwseq.c   | 24 +++++++++++--------
>  1 file changed, 14 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c
> index 8e88dcaf88f5..8323077bba15 100644
> --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c
> +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c
> @@ -206,28 +206,32 @@ void dcn21_set_abm_immediate_disable(struct pipe_ctx *pipe_ctx)
>  void dcn21_set_pipe(struct pipe_ctx *pipe_ctx)
>  {
>  	struct abm *abm = pipe_ctx->stream_res.abm;
> -	uint32_t otg_inst = pipe_ctx->stream_res.tg->inst;
> +	struct timing_generator *tg = pipe_ctx->stream_res.tg;
>  	struct panel_cntl *panel_cntl = pipe_ctx->stream->link->panel_cntl;
>  	struct dmcu *dmcu = pipe_ctx->stream->ctx->dc->res_pool->dmcu;
> +	uint32_t otg_inst;
> +
> +	if (!abm && !tg && !panel_cntl)
> +		return;
> +
> +	otg_inst = tg->inst;

Is the "if" supposed to be using "||"s instead of "&&"s? I noticed
Coverity complained "tg may be NULL" for the "tg->inst" dereference...

-Kees

-- 
Kees Cook