[opencloudos:linux-5.4/lts/5.4.119-20.0009.phytium 38/41] drivers/pwm/pwm-phytium.c:182:13: warning: variable 'reg' set but not used

[kernel test robot <lkp@intel.com>]

tree:   https://gitee.com/OpenCloudOS/OpenCloudOS-Kernel.git linux-5.4/lts/5.4.119-20.0009.phytium
head:   974a90e098c75ef0e62d4bbbde4535368a61f98b
commit: b12112fafd081884ccd1c123360335d6cdad284c [38/41] Add PWM supprt on Phytium SoCs
config: arm64-allmodconfig (https://download.01.org/0day-ci/archive/20240224/202402242057.8bRWI3iA-lkp@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 13.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240224/202402242057.8bRWI3iA-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202402242057.8bRWI3iA-lkp@intel.com/

All warnings (new ones prefixed by >>):

   drivers/pwm/pwm-phytium.c: In function 'pwm_phytium_set_periodns':
>> drivers/pwm/pwm-phytium.c:182:13: warning: variable 'reg' set but not used [-Wunused-but-set-variable]
     182 |         u32 reg;
         |             ^~~
   drivers/pwm/pwm-phytium.c: In function 'pwm_phytium_set_duty':
   drivers/pwm/pwm-phytium.c:200:13: warning: variable 'reg' set but not used [-Wunused-but-set-variable]
     200 |         u32 reg;
         |             ^~~


vim +/reg +182 drivers/pwm/pwm-phytium.c

   178	
   179	static void pwm_phytium_set_periodns(struct pwm_chip *chip, unsigned int periodns, int n)
   180	{
   181		struct phytium_pwm_chip *our_chip = to_phytium_pwm_chip(chip);
 > 182		u32 reg;
   183		int div = our_chip->state.div;
   184		u64 cycles;
   185	
   186		cycles = clk_get_rate(our_chip->base_clk);
   187		cycles *= (periodns / (div + 1));
   188		do_div(cycles, NSEC_PER_SEC);
   189	
   190		reg = readl(our_chip->base + PWM_N(n) + REG_TPERIOD);
   191		cycles = (cycles & PWM_PERIOD_MASK) - 0x1;
   192		our_chip->state_pm[n].period = cycles;
   193	
   194		writel(cycles, our_chip->base + PWM_N(n) + REG_TPERIOD);
   195	}
   196	

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