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Mon, 26 Feb 2024 15:11:17 -0600 From: Harry Wentland To: , CC: , Harry Wentland Subject: [RFC PATCH v4 19/42] drm/colorop: Introduce DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE Date: Mon, 26 Feb 2024 16:10:33 -0500 Message-ID: <20240226211100.100108-20-harry.wentland@amd.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240226211100.100108-1-harry.wentland@amd.com> References: <20240226211100.100108-1-harry.wentland@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Received-SPF: None (SATLEXMB03.amd.com: harry.wentland@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS2PEPF0000343D:EE_|CY5PR12MB6369:EE_ X-MS-Office365-Filtering-Correlation-Id: 15f61b0c-ebb8-43d4-8761-08dc370f7b4c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: /wSOv4czljg49a6j9JVT91SN4gxGeAcnR1mF87CM5KgUQZ+8SXnWJu9dMUPZGQQQDbt215dlBEwRT6uabBEFh1TVRbe6hdxYH0QrQOUT4YH/9Z3BIvQGqJOxyDwFDbxKM5khLCFEDT4vQ8BKdap9Go5Fy3SB45YvAAWDDH34qMI6D5IhAlOSjbTLUtrolhSJZrQQzo9tj3W0/LexbmPTXFiXFhYQpS1RN6wTOMvWiQIMJsnMKNhmtLsfd6jFKuyGalCkGwnWmWPyCCBXlG1vzs9m5c19kfaOSlcXdpPL6wt7A/QoXzip4n65YQea9ApLNsVLNRCJ/mNmk6Zk8177XMTviBDmRMYl+kI8PXMMwdt5vCWAEMdJ+U4R9hIKx/JHCLhNgswYX/kgD5aVoNasHwtxxlQwiSh+c6bWq2tpEnBqD3zH3Y6srnYxfyFVREuK+TXlBptKXE+gpRgIMoRH5sHbDtCxd7NuFVjbXWNEOG3yIPtRmjap6n+p1YWp//yS9Bio3WiM82NdiCaHY0m8mRqrXI5ZSky9tfzt+lNnn8cLqi47t4cm/Gue0pBRjnrsHzk58n1XfmZAQMKn3ZxIlXmKO7DM1IS2JURJOVTw/vShGZzFgYBRfLidoHPG3zNTpmKdVBH9scmfG/4YS4ZjU9efW7VGiemvdOs6oLpR8We9uUbHx1icN1wRkO9z4Ok7w0wqDyfQFeuDJ/08opHsYhiAUjePc2XfBBcWHRjq3kHT9Frnv/qKeIGbav6lONyK X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(36860700004); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Feb 2024 21:11:21.1636 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 15f61b0c-ebb8-43d4-8761-08dc370f7b4c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS2PEPF0000343D.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6369 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" With the introduction of the pre-blending color pipeline we can no longer have color operations that don't have a clear position in the color pipeline. We deprecate all existing plane properties. For upstream drivers those are: - COLOR_ENCODING - COLOR_RANGE Drivers are expected to ignore these properties when programming the HW. Setting of the COLOR_PIPELINE plane property or drm_colorop properties is only allowed for userspace that sets this client cap. v4: - Don't block setting of COLOR_RANGE and COLOR_ENCODING when client cap is set Signed-off-by: Harry Wentland --- drivers/gpu/drm/drm_atomic_uapi.c | 13 ++++++++++++- drivers/gpu/drm/drm_ioctl.c | 7 +++++++ include/drm/drm_file.h | 7 +++++++ include/uapi/drm/drm.h | 16 ++++++++++++++++ 4 files changed, 42 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c index 86f77a9aa3a8..ff258b34544e 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -570,6 +570,12 @@ static int drm_atomic_plane_set_property(struct drm_plane *plane, } else if (property == plane->color_range_property) { state->color_range = val; } else if (property == plane->color_pipeline_property) { + if (!file_priv->plane_color_pipeline) { + drm_dbg_atomic(dev, + "Setting COLOR_PIPELINE plane property not permitted unless DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE is set\n"); + return -EINVAL; + } + /* find DRM colorop object */ struct drm_colorop *colorop = NULL; colorop = drm_colorop_find(dev, file_priv, val); @@ -1179,6 +1185,12 @@ int drm_atomic_set_property(struct drm_atomic_state *state, break; } case DRM_MODE_OBJECT_COLOROP: { + if (!file_priv->plane_color_pipeline) { + drm_dbg_atomic(prop->dev, + "[OBJECT:%d] is a colorop but DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE not set\n", + obj->id); + ret = -EINVAL; + } struct drm_colorop *colorop = obj_to_colorop(obj); struct drm_colorop_state *colorop_state; @@ -1191,7 +1203,6 @@ int drm_atomic_set_property(struct drm_atomic_state *state, ret = drm_atomic_colorop_set_property(colorop, colorop_state, file_priv, prop, prop_value); - break; } default: diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c index e368fc084c77..da59e37ae228 100644 --- a/drivers/gpu/drm/drm_ioctl.c +++ b/drivers/gpu/drm/drm_ioctl.c @@ -373,6 +373,13 @@ drm_setclientcap(struct drm_device *dev, void *data, struct drm_file *file_priv) return -EINVAL; file_priv->supports_virtualized_cursor_plane = req->value; break; + case DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE: + if (!file_priv->atomic) + return -EINVAL; + if (req->value > 1) + return -EINVAL; + file_priv->plane_color_pipeline = req->value; + break; default: return -EINVAL; } diff --git a/include/drm/drm_file.h b/include/drm/drm_file.h index ab230d3af138..63c1d29b8520 100644 --- a/include/drm/drm_file.h +++ b/include/drm/drm_file.h @@ -204,6 +204,13 @@ struct drm_file { */ bool writeback_connectors; + /** + * @plane_color_pipeline: + * + * True if client understands plane color pipelines + */ + bool plane_color_pipeline; + /** * @was_master: * diff --git a/include/uapi/drm/drm.h b/include/uapi/drm/drm.h index 16122819edfe..2d74c49274ee 100644 --- a/include/uapi/drm/drm.h +++ b/include/uapi/drm/drm.h @@ -875,6 +875,22 @@ struct drm_get_cap { */ #define DRM_CLIENT_CAP_CURSOR_PLANE_HOTSPOT 6 +/** + * DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE + * + * If set to 1 + * - the DRM core will allow setting of plane the COLOR_PIPELINE + * property, as well as drm_colorop properties. + * - Drivers will ignore these properties + * - COLOR_ENCODING + * - COLOR_RANGE + * + * The client must enable &DRM_CLIENT_CAP_ATOMIC first. + * + * This capability is currently in development. + */ +#define DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE 7 + /* DRM_IOCTL_SET_CLIENT_CAP ioctl argument type */ struct drm_set_client_cap { __u64 capability; -- 2.44.0