From: Rob Herring <robh@kernel.org>
To: Frank Li <Frank.Li@nxp.com>
Cc: Vinod Koul <vkoul@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>, Peng Fan <peng.fan@nxp.com>,
imx@lists.linux.dev, dmaengine@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
Joy Zou <joy.zou@nxp.com>
Subject: Re: [PATCH v2 4/5] dt-bindings: dma: fsl-edma: add fsl,imx8ulp-edma compatible string
Date: Mon, 4 Mar 2024 10:44:23 -0600 [thread overview]
Message-ID: <20240304164423.GA626742-robh@kernel.org> (raw)
In-Reply-To: <20240229-8ulp_edma-v2-4-9d12f883c8f7@nxp.com>
On Thu, Feb 29, 2024 at 03:58:10PM -0500, Frank Li wrote:
> From: Joy Zou <joy.zou@nxp.com>
>
> Introduce the compatible string 'fsl,imx8ulp-edma' to enable support for
> the i.MX8ULP's eDMA, alongside adjusting the clock numbering. The i.MX8ULP
> eDMA architecture features one clock for each DMA channel and an additional
> clock for the core controller. Given a maximum of 32 DMA channels, the
> maximum clock number consequently increases to 33.
>
> Signed-off-by: Joy Zou <joy.zou@nxp.com>
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
> ---
> .../devicetree/bindings/dma/fsl,edma.yaml | 26 ++++++++++++++++++++--
> 1 file changed, 24 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/dma/fsl,edma.yaml b/Documentation/devicetree/bindings/dma/fsl,edma.yaml
> index aa51d278cb67b..55cce79c759f8 100644
> --- a/Documentation/devicetree/bindings/dma/fsl,edma.yaml
> +++ b/Documentation/devicetree/bindings/dma/fsl,edma.yaml
> @@ -23,6 +23,7 @@ properties:
> - fsl,imx7ulp-edma
> - fsl,imx8qm-adma
> - fsl,imx8qm-edma
> + - fsl,imx8ulp-edma
> - fsl,imx93-edma3
> - fsl,imx93-edma4
> - fsl,imx95-edma5
> @@ -53,11 +54,11 @@ properties:
>
> clocks:
> minItems: 1
> - maxItems: 2
> + maxItems: 33
>
> clock-names:
> minItems: 1
> - maxItems: 2
> + maxItems: 33
>
> big-endian:
> description: |
> @@ -108,6 +109,7 @@ allOf:
> properties:
> clocks:
> minItems: 2
> + maxItems: 2
> clock-names:
> items:
> - const: dmamux0
> @@ -136,6 +138,7 @@ allOf:
> properties:
> clock:
> minItems: 2
> + maxItems: 2
> clock-names:
> items:
> - const: dma
> @@ -151,6 +154,25 @@ allOf:
> dma-channels:
> const: 32
>
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: fsl,imx8ulp-edma
> + then:
> + properties:
> + clock:
clocks
> + maxItems: 33
That is already the max. I think you want 'minItems: 33' here.
> + clock-names:
> + items:
> + - const: dma
> + - pattern: "^CH[0-31]-clk$"
'-clk' is redundant. [0-31] is not how you do a range of numbers with
regex.
This doesn't cover clocks 3-33. Not a great way to express in
json-schema, but this should do it:
allOf:
- items:
- const: dma
- items:
oneOf:
- const: dma
- pattern: "^ch([0-9]|[1-2][0-9]|[3[01])$"
That doesn't enforce the order of 'chN' entries though. Probably good
enough.
> + interrupt-names: false
> + interrupts:
> + maxItems: 32
minItems
> + "#dma-cells":
> + const: 3
Is what is in each cell defined somewhere? If not, you need a
description with those details.
Rob
next prev parent reply other threads:[~2024-03-04 16:44 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-29 20:58 [PATCH v2 0/5] dmaengine: fsl-edma: add 8ulp support Frank Li
2024-02-29 20:58 ` [PATCH v2 1/5] dmaengine: fsl-edma: remove 'slave_id' from fsl_edma_chan Frank Li
2024-02-29 20:58 ` [PATCH v2 2/5] dmaengine: fsl-edma: add safety check for 'srcid' Frank Li
2024-02-29 20:58 ` [PATCH v2 3/5] dmaengine: fsl-edma: clean up chclk and FSL_EDMA_DRV_HAS_CHCLK Frank Li
2024-02-29 20:58 ` [PATCH v2 4/5] dt-bindings: dma: fsl-edma: add fsl,imx8ulp-edma compatible string Frank Li
2024-03-04 16:44 ` Rob Herring [this message]
2024-03-04 23:31 ` Frank Li
2024-03-06 20:40 ` Rob Herring
2024-03-07 21:41 ` Frank Li
2024-03-11 2:38 ` Frank Li
2024-03-19 20:12 ` Frank Li
2024-02-29 20:58 ` [PATCH v2 5/5] dmaengine: fsl-edma: add i.MX8ULP edma support Frank Li
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