From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
To: qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com,
bmeng@tinylab.org, liwei1518@gmail.com,
zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com,
"Daniel Henrique Barboza" <dbarboza@ventanamicro.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH v7 5/9] target/riscv: remove 'cpu_vl' global
Date: Wed, 6 Mar 2024 14:19:28 -0300 [thread overview]
Message-ID: <20240306171932.549549-6-dbarboza@ventanamicro.com> (raw)
In-Reply-To: <20240306171932.549549-1-dbarboza@ventanamicro.com>
At this moment the global is used only in do_vsetvl(). Do a direct env
load in do_vsetvl() to read 'vl' and remove the global.
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/riscv/insn_trans/trans_rvv.c.inc | 2 +-
target/riscv/translate.c | 3 +--
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc
index 0114a132b3..279740f147 100644
--- a/target/riscv/insn_trans/trans_rvv.c.inc
+++ b/target/riscv/insn_trans/trans_rvv.c.inc
@@ -157,7 +157,7 @@ static bool do_vsetvl(DisasContext *s, int rd, int rs1, TCGv s2)
if (rd == 0 && rs1 == 0) {
s1 = tcg_temp_new();
- tcg_gen_mov_tl(s1, cpu_vl);
+ tcg_gen_ld_tl(s1, tcg_env, offsetof(CPURISCVState, vl));
} else if (rs1 == 0) {
/* As the mask is at least one bit, RV_VLEN_MAX is >= VLMAX */
s1 = tcg_constant_tl(RV_VLEN_MAX);
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index 3e12371887..002808895c 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -38,7 +38,7 @@
#undef HELPER_H
/* global register indices */
-static TCGv cpu_gpr[32], cpu_gprh[32], cpu_pc, cpu_vl;
+static TCGv cpu_gpr[32], cpu_gprh[32], cpu_pc;
static TCGv_i64 cpu_fpr[32]; /* assume F and D extensions */
static TCGv load_res;
static TCGv load_val;
@@ -1323,7 +1323,6 @@ void riscv_translate_init(void)
}
cpu_pc = tcg_global_mem_new(tcg_env, offsetof(CPURISCVState, pc), "pc");
- cpu_vl = tcg_global_mem_new(tcg_env, offsetof(CPURISCVState, vl), "vl");
load_res = tcg_global_mem_new(tcg_env, offsetof(CPURISCVState, load_res),
"load_res");
load_val = tcg_global_mem_new(tcg_env, offsetof(CPURISCVState, load_val),
--
2.43.2
next prev parent reply other threads:[~2024-03-06 17:22 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-06 17:19 [PATCH v7 0/9] riscv: set vstart_eq_zero on mark_vs_dirty Daniel Henrique Barboza
2024-03-06 17:19 ` [PATCH v7 1/9] trans_rvv.c.inc: mark_vs_dirty() before loads and stores Daniel Henrique Barboza
2024-03-06 17:19 ` [PATCH v7 2/9] trans_rvv.c.inc: remove 'is_store' bool from load/store fns Daniel Henrique Barboza
2024-03-06 17:19 ` [PATCH v7 3/9] target/riscv: remove 'over' brconds from vector trans Daniel Henrique Barboza
2024-03-08 3:34 ` LIU Zhiwei
2024-03-08 10:39 ` Daniel Henrique Barboza
2024-03-08 11:13 ` Alistair Francis
2024-03-08 11:23 ` Daniel Henrique Barboza
2024-03-06 17:19 ` [PATCH v7 4/9] target/riscv/translate.c: remove 'cpu_vstart' global Daniel Henrique Barboza
2024-03-06 17:19 ` Daniel Henrique Barboza [this message]
2024-03-06 17:19 ` [PATCH v7 6/9] target/riscv/vector_helper.c: set vstart = 0 in GEN_VEXT_VSLIDEUP_VX() Daniel Henrique Barboza
2024-03-06 17:19 ` [PATCH v7 7/9] trans_rvv.c.inc: remove redundant mark_vs_dirty() calls Daniel Henrique Barboza
2024-03-06 20:42 ` Philippe Mathieu-Daudé
2024-03-06 17:19 ` [PATCH v7 8/9] target/riscv: Clear vstart_qe_zero flag Daniel Henrique Barboza
2024-03-06 17:19 ` [PATCH v7 9/9] target/riscv/vector_helper.c: optimize loops in ldst helpers Daniel Henrique Barboza
2024-03-07 0:37 ` [PATCH v7 0/9] riscv: set vstart_eq_zero on mark_vs_dirty Alistair Francis
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