From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 093DAC54798 for ; Thu, 7 Mar 2024 14:04:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=lTVS/u6YvS1Y/N5FsHX4QuEcS6WeFya7gcjCiSttoj8=; b=e9khgo56XWe7YY xySrv9wizVcO0VqU6hF5VSfVo2Qa2C9Wjof2CdeZ5fpSJBtBe5s1E8LohszccM2XZWJpVP86wuhn1 ROkKaGGWO126rLyfM1kYRTFY45ImrAUrU0WraIdRN/x8i+mYVnW/+1K0sAY00PtOjaSgxV97lwHDm lDJ2V/ned+NONClon995/+Ca2+EM2NH+InHvGHqc9/fVRSHYp4r5bduCp/sWiHR2CFgLxh3N+X6P8 yLnUT+41hi6qoxcMAT2wcBP07fqmSyoZv8B3/edMa41OhpG+2mNkBN75HngWL1ZzV23SsXHKD3fZA x+XpAI9Se2XW/chgnGeQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1riEMM-00000004wF3-0mCz; Thu, 07 Mar 2024 14:04:34 +0000 Received: from mail-pl1-x62b.google.com ([2607:f8b0:4864:20::62b]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1riELp-00000004vsm-3Q9q for linux-riscv@lists.infradead.org; Thu, 07 Mar 2024 14:04:15 +0000 Received: by mail-pl1-x62b.google.com with SMTP id d9443c01a7336-1dc1ff58fe4so6911185ad.1 for ; Thu, 07 Mar 2024 06:04:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1709820241; x=1710425041; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=IU5X/vDZdCsMdXFx74d7p2R3oQsiUAYZn8cBdmneE/s=; b=OeIy8zBqI8nwrFZeLbXub/jhYgmQevV0CsGcv1utIGmMXJ8rvAbD/2fr6+irL0CZIT O+TNCAk/bQVVmmTVn9Cw4VNQg2i7Qn78qz/gypZNMF+NnDRU7LktnLUFOKNVQB/W4FSL feh+XS90xRTwZ1ek8eEZT/60egFN4b4GT1PLsrCFq97+Juz4JafKjhzRqJsiFqmEzHrr 0Dsq4Nvd7+qL7puxIPsf54fbOqo8Tet2lWNGRDMSmU8mJGFkUVI5Qss1u8NUEJh6rS60 Lep1D+su7Sg5ZVV56v/4Ha+EiphLoJyrojzjOJUp4jp94ASNAa45BugYR1Ll3IARACnl rOiA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709820241; x=1710425041; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=IU5X/vDZdCsMdXFx74d7p2R3oQsiUAYZn8cBdmneE/s=; b=abQLMSwmRS9fYu9tYxyFwTjEjmxvRExXAEjA4rstoc5AqHGXd+GXf4g+SbAMlMwp6A 0bzxfdIN7jcSwJljw2DJXOrPbLZTPFYh1FVhptp65LSCAIMnum72iDjffu69wcslzTYC wETkODMCzQMjQj9lH9I4Wa/M9Xu9KXKq8X3IvQb9eyfADzJuclhTc9Wc/zjXOMDITlXV 6kL8Qyb9NUQzbte/5C/5Idr1sYEd3e3vAykmsInZvJ05+mDc9WuVOcdInPq6ELOIu9Bi e/weCadLrh5ajGN3FHNdCwoQ1781z72o4Rz9O43WYKnsqlfM7HuZYCAUBaaWdw1xs/Rf h59A== X-Forwarded-Encrypted: i=1; AJvYcCWel9PvRM2oW784RQRqWN1f41hfIc2gdg8eQQv4wjAXlftuP54cfHfu+gs0gZM5oZHHNPaLuPjoCeI3zmGoUiRfY6dh7iLj+xKpQQufsDWI X-Gm-Message-State: AOJu0YyhTcGZTQsnqhLQ/7YvtBgjNgmcgVc4DUyn+WV5XDb5MC9HtGIp a94MZPp1mfKigrVU75QABu246FS7vuJopmpvQSYCagl6j2l/oxHe4YhgUEo7+5s= X-Google-Smtp-Source: AGHT+IEDHhy5F9q3HIeeCvmWM4N9C05SjNYCoLQ3BTZ+w2tiUr0UbDe9h+xoizgbjRpYRV0/Edxagg== X-Received: by 2002:a17:902:c402:b0:1db:28bd:2949 with SMTP id k2-20020a170902c40200b001db28bd2949mr9529127plk.0.1709820240435; Thu, 07 Mar 2024 06:04:00 -0800 (PST) Received: from anup-ubuntu-vm.localdomain ([171.76.84.79]) by smtp.gmail.com with ESMTPSA id w1-20020a1709026f0100b001dd6174c651sm386228plk.149.2024.03.07.06.03.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Mar 2024 06:03:59 -0800 (PST) From: Anup Patel To: Palmer Dabbelt , Paul Walmsley , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Frank Rowand , Conor Dooley Subject: [PATCH v16 7/9] irqchip/riscv-aplic: Add support for MSI-mode Date: Thu, 7 Mar 2024 19:33:05 +0530 Message-Id: <20240307140307.646078-8-apatel@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240307140307.646078-1-apatel@ventanamicro.com> References: <20240307140307.646078-1-apatel@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240307_060402_300892_5F3E25CD X-CRM114-Status: GOOD ( 32.13 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Anup Patel , devicetree@vger.kernel.org, Saravana Kannan , Marc Zyngier , Anup Patel , linux-kernel@vger.kernel.org, =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= , Atish Patra , linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Andrew Jones Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org VGhlIFJJU0MtViBhZHZhbmNlZCBwbGF0Zm9ybS1sZXZlbCBpbnRlcnJ1cHQgY29udHJvbGxlciAo QVBMSUMpIGhhcwp0d28gbW9kZXMgb2Ygb3BlcmF0aW9uOiAxKSBEaXJlY3QgbW9kZSBhbmQgMikg TVNJIG1vZGUuCihGb3IgbW9yZSBkZXRhaWxzLCByZWZlciBodHRwczovL2dpdGh1Yi5jb20vcmlz Y3YvcmlzY3YtYWlhKQoKSW4gQVBMSUMgTVNJLW1vZGUsIHdpcmVkIGludGVycnVwdHMgYXJlIGZv cndhcmVkIGFzIG1lc3NhZ2Ugc2lnbmFsZWQKaW50ZXJydXB0cyAoTVNJcykgdG8gQ1BVcyB2aWEg SU1TSUMuCgpFeHRlbmQgdGhlIGV4aXN0aW5nIEFQTElDIGlycWNoaXAgZHJpdmVyIHRvIHN1cHBv cnQgTVNJLW1vZGUgZm9yClJJU0MtViBwbGF0Zm9ybXMgaGF2aW5nIGJvdGggd2lyZWQgaW50ZXJy dXB0cyBhbmQgTVNJcy4KClNpZ25lZC1vZmYtYnk6IEFudXAgUGF0ZWwgPGFwYXRlbEB2ZW50YW5h bWljcm8uY29tPgotLS0KIGRyaXZlcnMvaXJxY2hpcC9LY29uZmlnICAgICAgICAgICAgICAgIHwg ICA2ICsKIGRyaXZlcnMvaXJxY2hpcC9NYWtlZmlsZSAgICAgICAgICAgICAgIHwgICAxICsKIGRy aXZlcnMvaXJxY2hpcC9pcnEtcmlzY3YtYXBsaWMtbWFpbi5jIHwgICAyICstCiBkcml2ZXJzL2ly cWNoaXAvaXJxLXJpc2N2LWFwbGljLW1haW4uaCB8ICAgOCArCiBkcml2ZXJzL2lycWNoaXAvaXJx LXJpc2N2LWFwbGljLW1zaS5jICB8IDI1NyArKysrKysrKysrKysrKysrKysrKysrKysrCiA1IGZp bGVzIGNoYW5nZWQsIDI3MyBpbnNlcnRpb25zKCspLCAxIGRlbGV0aW9uKC0pCiBjcmVhdGUgbW9k ZSAxMDA2NDQgZHJpdmVycy9pcnFjaGlwL2lycS1yaXNjdi1hcGxpYy1tc2kuYwoKZGlmZiAtLWdp dCBhL2RyaXZlcnMvaXJxY2hpcC9LY29uZmlnIGIvZHJpdmVycy9pcnFjaGlwL0tjb25maWcKaW5k ZXggZGJjODgxMWQzNzY0Li44MDZiNWZjY2IzZTggMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvaXJxY2hp cC9LY29uZmlnCisrKyBiL2RyaXZlcnMvaXJxY2hpcC9LY29uZmlnCkBAIC01NTEsNiArNTUxLDEy IEBAIGNvbmZpZyBSSVNDVl9BUExJQwogCWRlcGVuZHMgb24gUklTQ1YKIAlzZWxlY3QgSVJRX0RP TUFJTl9ISUVSQVJDSFkKIAorY29uZmlnIFJJU0NWX0FQTElDX01TSQorCWJvb2wKKwlkZXBlbmRz IG9uIFJJU0NWX0FQTElDCisJc2VsZWN0IEdFTkVSSUNfTVNJX0lSUQorCWRlZmF1bHQgUklTQ1Zf QVBMSUMKKwogY29uZmlnIFJJU0NWX0lNU0lDCiAJYm9vbAogCWRlcGVuZHMgb24gUklTQ1YKZGlm ZiAtLWdpdCBhL2RyaXZlcnMvaXJxY2hpcC9NYWtlZmlsZSBiL2RyaXZlcnMvaXJxY2hpcC9NYWtl ZmlsZQppbmRleCA3ZjgyODk3OTBlZDguLjQ3OTk1ZmRiMmM2MCAxMDA2NDQKLS0tIGEvZHJpdmVy cy9pcnFjaGlwL01ha2VmaWxlCisrKyBiL2RyaXZlcnMvaXJxY2hpcC9NYWtlZmlsZQpAQCAtOTYs NiArOTYsNyBAQCBvYmotJChDT05GSUdfQ1NLWV9NUElOVEMpCQkrPSBpcnEtY3NreS1tcGludGMu bwogb2JqLSQoQ09ORklHX0NTS1lfQVBCX0lOVEMpCQkrPSBpcnEtY3NreS1hcGItaW50Yy5vCiBv YmotJChDT05GSUdfUklTQ1ZfSU5UQykJCSs9IGlycS1yaXNjdi1pbnRjLm8KIG9iai0kKENPTkZJ R19SSVNDVl9BUExJQykJCSs9IGlycS1yaXNjdi1hcGxpYy1tYWluLm8gaXJxLXJpc2N2LWFwbGlj LWRpcmVjdC5vCitvYmotJChDT05GSUdfUklTQ1ZfQVBMSUNfTVNJKQkJKz0gaXJxLXJpc2N2LWFw bGljLW1zaS5vCiBvYmotJChDT05GSUdfUklTQ1ZfSU1TSUMpCQkrPSBpcnEtcmlzY3YtaW1zaWMt c3RhdGUubyBpcnEtcmlzY3YtaW1zaWMtZWFybHkubyBpcnEtcmlzY3YtaW1zaWMtcGxhdGZvcm0u bwogb2JqLSQoQ09ORklHX1NJRklWRV9QTElDKQkJKz0gaXJxLXNpZml2ZS1wbGljLm8KIG9iai0k KENPTkZJR19JTVhfSVJRU1RFRVIpCQkrPSBpcnEtaW14LWlycXN0ZWVyLm8KZGlmZiAtLWdpdCBh L2RyaXZlcnMvaXJxY2hpcC9pcnEtcmlzY3YtYXBsaWMtbWFpbi5jIGIvZHJpdmVycy9pcnFjaGlw L2lycS1yaXNjdi1hcGxpYy1tYWluLmMKaW5kZXggMTYwZmY5OWQ2OTc5Li43NzRhMGM5N2ZkYWIg MTAwNjQ0Ci0tLSBhL2RyaXZlcnMvaXJxY2hpcC9pcnEtcmlzY3YtYXBsaWMtbWFpbi5jCisrKyBi L2RyaXZlcnMvaXJxY2hpcC9pcnEtcmlzY3YtYXBsaWMtbWFpbi5jCkBAIC0xODcsNyArMTg3LDcg QEAgc3RhdGljIGludCBhcGxpY19wcm9iZShzdHJ1Y3QgcGxhdGZvcm1fZGV2aWNlICpwZGV2KQog CWlmIChpc19vZl9ub2RlKGRldi0+Zndub2RlKSkKIAkJbXNpX21vZGUgPSBvZl9wcm9wZXJ0eV9w cmVzZW50KHRvX29mX25vZGUoZGV2LT5md25vZGUpLCAibXNpLXBhcmVudCIpOwogCWlmIChtc2lf bW9kZSkKLQkJcmMgPSAtRU5PREVWOworCQlyYyA9IGFwbGljX21zaV9zZXR1cChkZXYsIHJlZ3Mp OwogCWVsc2UKIAkJcmMgPSBhcGxpY19kaXJlY3Rfc2V0dXAoZGV2LCByZWdzKTsKIAlpZiAocmMp CmRpZmYgLS1naXQgYS9kcml2ZXJzL2lycWNoaXAvaXJxLXJpc2N2LWFwbGljLW1haW4uaCBiL2Ry aXZlcnMvaXJxY2hpcC9pcnEtcmlzY3YtYXBsaWMtbWFpbi5oCmluZGV4IDRjZmJhZGYzN2RkYy4u NDM5MzkyN2Q4YzgwIDEwMDY0NAotLS0gYS9kcml2ZXJzL2lycWNoaXAvaXJxLXJpc2N2LWFwbGlj LW1haW4uaAorKysgYi9kcml2ZXJzL2lycWNoaXAvaXJxLXJpc2N2LWFwbGljLW1haW4uaApAQCAt NDAsNSArNDAsMTMgQEAgaW50IGFwbGljX2lycWRvbWFpbl90cmFuc2xhdGUoc3RydWN0IGlycV9m d3NwZWMgKmZ3c3BlYywgdTMyIGdzaV9iYXNlLAogdm9pZCBhcGxpY19pbml0X2h3X2dsb2JhbChz dHJ1Y3QgYXBsaWNfcHJpdiAqcHJpdiwgYm9vbCBtc2lfbW9kZSk7CiBpbnQgYXBsaWNfc2V0dXBf cHJpdihzdHJ1Y3QgYXBsaWNfcHJpdiAqcHJpdiwgc3RydWN0IGRldmljZSAqZGV2LCB2b2lkIF9f aW9tZW0gKnJlZ3MpOwogaW50IGFwbGljX2RpcmVjdF9zZXR1cChzdHJ1Y3QgZGV2aWNlICpkZXYs IHZvaWQgX19pb21lbSAqcmVncyk7CisjaWZkZWYgQ09ORklHX1JJU0NWX0FQTElDX01TSQoraW50 IGFwbGljX21zaV9zZXR1cChzdHJ1Y3QgZGV2aWNlICpkZXYsIHZvaWQgX19pb21lbSAqcmVncyk7 CisjZWxzZQorc3RhdGljIGlubGluZSBpbnQgYXBsaWNfbXNpX3NldHVwKHN0cnVjdCBkZXZpY2Ug KmRldiwgdm9pZCBfX2lvbWVtICpyZWdzKQoreworCXJldHVybiAtRU5PREVWOworfQorI2VuZGlm CiAKICNlbmRpZgpkaWZmIC0tZ2l0IGEvZHJpdmVycy9pcnFjaGlwL2lycS1yaXNjdi1hcGxpYy1t c2kuYyBiL2RyaXZlcnMvaXJxY2hpcC9pcnEtcmlzY3YtYXBsaWMtbXNpLmMKbmV3IGZpbGUgbW9k ZSAxMDA2NDQKaW5kZXggMDAwMDAwMDAwMDAwLi4zNmNkMDRhNTA1N2IKLS0tIC9kZXYvbnVsbAor KysgYi9kcml2ZXJzL2lycWNoaXAvaXJxLXJpc2N2LWFwbGljLW1zaS5jCkBAIC0wLDAgKzEsMjU3 IEBACisvLyBTUERYLUxpY2Vuc2UtSWRlbnRpZmllcjogR1BMLTIuMAorLyoKKyAqIENvcHlyaWdo dCAoQykgMjAyMSBXZXN0ZXJuIERpZ2l0YWwgQ29ycG9yYXRpb24gb3IgaXRzIGFmZmlsaWF0ZXMu CisgKiBDb3B5cmlnaHQgKEMpIDIwMjIgVmVudGFuYSBNaWNybyBTeXN0ZW1zIEluYy4KKyAqLwor CisjaW5jbHVkZSA8bGludXgvYml0ZmllbGQuaD4KKyNpbmNsdWRlIDxsaW51eC9iaXRvcHMuaD4K KyNpbmNsdWRlIDxsaW51eC9jcHUuaD4KKyNpbmNsdWRlIDxsaW51eC9pbnRlcnJ1cHQuaD4KKyNp bmNsdWRlIDxsaW51eC9pcnFjaGlwLmg+CisjaW5jbHVkZSA8bGludXgvaXJxY2hpcC9yaXNjdi1h cGxpYy5oPgorI2luY2x1ZGUgPGxpbnV4L2lycWNoaXAvcmlzY3YtaW1zaWMuaD4KKyNpbmNsdWRl IDxsaW51eC9tb2R1bGUuaD4KKyNpbmNsdWRlIDxsaW51eC9tc2kuaD4KKyNpbmNsdWRlIDxsaW51 eC9vZl9pcnEuaD4KKyNpbmNsdWRlIDxsaW51eC9wbGF0Zm9ybV9kZXZpY2UuaD4KKyNpbmNsdWRl IDxsaW51eC9wcmludGsuaD4KKyNpbmNsdWRlIDxsaW51eC9zbXAuaD4KKworI2luY2x1ZGUgImly cS1yaXNjdi1hcGxpYy1tYWluLmgiCisKK3N0YXRpYyB2b2lkIGFwbGljX21zaV9pcnFfbWFzayhz dHJ1Y3QgaXJxX2RhdGEgKmQpCit7CisJYXBsaWNfaXJxX21hc2soZCk7CisJaXJxX2NoaXBfbWFz a19wYXJlbnQoZCk7Cit9CisKK3N0YXRpYyB2b2lkIGFwbGljX21zaV9pcnFfdW5tYXNrKHN0cnVj dCBpcnFfZGF0YSAqZCkKK3sKKwlpcnFfY2hpcF91bm1hc2tfcGFyZW50KGQpOworCWFwbGljX2ly cV91bm1hc2soZCk7Cit9CisKK3N0YXRpYyB2b2lkIGFwbGljX21zaV9pcnFfZW9pKHN0cnVjdCBp cnFfZGF0YSAqZCkKK3sKKwlzdHJ1Y3QgYXBsaWNfcHJpdiAqcHJpdiA9IGlycV9kYXRhX2dldF9p cnFfY2hpcF9kYXRhKGQpOworCisJLyoKKwkgKiBFT0kgaGFuZGxpbmcgaXMgcmVxdWlyZWQgb25s eSBmb3IgbGV2ZWwtdHJpZ2dlcmVkIGludGVycnVwdHMKKwkgKiB3aGVuIEFQTElDIGlzIGluIE1T SSBtb2RlLgorCSAqLworCisJc3dpdGNoIChpcnFkX2dldF90cmlnZ2VyX3R5cGUoZCkpIHsKKwlj YXNlIElSUV9UWVBFX0xFVkVMX0xPVzoKKwljYXNlIElSUV9UWVBFX0xFVkVMX0hJR0g6CisJCS8q CisJCSAqIFRoZSBzZWN0aW9uICI0LjkuMiBTcGVjaWFsIGNvbnNpZGVyYXRpb24gZm9yIGxldmVs LXNlbnNpdGl2ZSBpbnRlcnJ1cHQKKwkJICogc291cmNlcyIgb2YgdGhlIFJJU0MtViBBSUEgc3Bl Y2lmaWNhdGlvbiBzYXlzOgorCQkgKgorCQkgKiBBIHNlY29uZCBvcHRpb24gaXMgZm9yIHRoZSBp bnRlcnJ1cHQgc2VydmljZSByb3V0aW5lIHRvIHdyaXRlIHRoZQorCQkgKiBBUExJQ+KAmXMgc291 cmNlIGlkZW50aXR5IG51bWJlciBmb3IgdGhlIGludGVycnVwdCB0byB0aGUgZG9tYWlu4oCZcwor CQkgKiBzZXRpcG51bSByZWdpc3RlciBqdXN0IGJlZm9yZSBleGl0aW5nLiBUaGlzIHdpbGwgY2F1 c2UgdGhlIGludGVycnVwdOKAmXMKKwkJICogcGVuZGluZyBiaXQgdG8gYmUgc2V0IHRvIG9uZSBh Z2FpbiBpZiB0aGUgc291cmNlIGlzIHN0aWxsIGFzc2VydGluZworCQkgKiBhbiBpbnRlcnJ1cHQs IGJ1dCBub3QgaWYgdGhlIHNvdXJjZSBpcyBub3QgYXNzZXJ0aW5nIGFuIGludGVycnVwdC4KKwkJ ICovCisJCXdyaXRlbChkLT5od2lycSwgcHJpdi0+cmVncyArIEFQTElDX1NFVElQTlVNX0xFKTsK KwkJYnJlYWs7CisJfQorfQorCitzdGF0aWMgdm9pZCBhcGxpY19tc2lfd3JpdGVfbXNnKHN0cnVj dCBpcnFfZGF0YSAqZCwgc3RydWN0IG1zaV9tc2cgKm1zZykKK3sKKwl1bnNpZ25lZCBpbnQgZ3Jv dXBfaW5kZXgsIGhhcnRfaW5kZXgsIGd1ZXN0X2luZGV4LCB2YWw7CisJc3RydWN0IGFwbGljX3By aXYgKnByaXYgPSBpcnFfZGF0YV9nZXRfaXJxX2NoaXBfZGF0YShkKTsKKwlzdHJ1Y3QgYXBsaWNf bXNpY2ZnICptYyA9ICZwcml2LT5tc2ljZmc7CisJcGh5c19hZGRyX3QgdHBwbiwgdGJwcG4sIG1z Z19hZGRyOworCXZvaWQgX19pb21lbSAqdGFyZ2V0OworCisJLyogRm9yIHplcm9lZCBNU0ksIHNp bXBseSB3cml0ZSB6ZXJvIGludG8gdGhlIHRhcmdldCByZWdpc3RlciAqLworCWlmICghbXNnLT5h ZGRyZXNzX2hpICYmICFtc2ctPmFkZHJlc3NfbG8gJiYgIW1zZy0+ZGF0YSkgeworCQl0YXJnZXQg PSBwcml2LT5yZWdzICsgQVBMSUNfVEFSR0VUX0JBU0U7CisJCXRhcmdldCArPSAoZC0+aHdpcnEg LSAxKSAqIHNpemVvZih1MzIpOworCQl3cml0ZWwoMCwgdGFyZ2V0KTsKKwkJcmV0dXJuOworCX0K KworCS8qIFNhbml0eSBjaGVjayBvbiBtZXNzYWdlIGRhdGEgKi8KKwlXQVJOX09OKG1zZy0+ZGF0 YSA+IEFQTElDX1RBUkdFVF9FSUlEX01BU0spOworCisJLyogQ29tcHV0ZSB0YXJnZXQgTVNJIGFk ZHJlc3MgKi8KKwltc2dfYWRkciA9ICgoKHU2NCltc2ctPmFkZHJlc3NfaGkpIDw8IDMyKSB8IG1z Zy0+YWRkcmVzc19sbzsKKwl0cHBuID0gbXNnX2FkZHIgPj4gQVBMSUNfeE1TSUNGR0FERFJfUFBO X1NISUZUOworCisJLyogQ29tcHV0ZSB0YXJnZXQgSEFSVCBCYXNlIFBQTiAqLworCXRicHBuID0g dHBwbjsKKwl0YnBwbiAmPSB+QVBMSUNfeE1TSUNGR0FERFJfUFBOX0hBUlQobWMtPmxoeHMpOwor CXRicHBuICY9IH5BUExJQ194TVNJQ0ZHQUREUl9QUE5fTEhYKG1jLT5saHh3LCBtYy0+bGh4cyk7 CisJdGJwcG4gJj0gfkFQTElDX3hNU0lDRkdBRERSX1BQTl9ISFgobWMtPmhoeHcsIG1jLT5oaHhz KTsKKwlXQVJOX09OKHRicHBuICE9IG1jLT5iYXNlX3Bwbik7CisKKwkvKiBDb21wdXRlIHRhcmdl dCBncm91cCBhbmQgaGFydCBpbmRleGVzICovCisJZ3JvdXBfaW5kZXggPSAodHBwbiA+PiBBUExJ Q194TVNJQ0ZHQUREUl9QUE5fSEhYX1NISUZUKG1jLT5oaHhzKSkgJgorCQkgICAgIEFQTElDX3hN U0lDRkdBRERSX1BQTl9ISFhfTUFTSyhtYy0+aGh4dyk7CisJaGFydF9pbmRleCA9ICh0cHBuID4+ IEFQTElDX3hNU0lDRkdBRERSX1BQTl9MSFhfU0hJRlQobWMtPmxoeHMpKSAmCisJCSAgICAgQVBM SUNfeE1TSUNGR0FERFJfUFBOX0xIWF9NQVNLKG1jLT5saHh3KTsKKwloYXJ0X2luZGV4IHw9IChn cm91cF9pbmRleCA8PCBtYy0+bGh4dyk7CisJV0FSTl9PTihoYXJ0X2luZGV4ID4gQVBMSUNfVEFS R0VUX0hBUlRfSURYX01BU0spOworCisJLyogQ29tcHV0ZSB0YXJnZXQgZ3Vlc3QgaW5kZXggKi8K KwlndWVzdF9pbmRleCA9IHRwcG4gJiBBUExJQ194TVNJQ0ZHQUREUl9QUE5fSEFSVChtYy0+bGh4 cyk7CisJV0FSTl9PTihndWVzdF9pbmRleCA+IEFQTElDX1RBUkdFVF9HVUVTVF9JRFhfTUFTSyk7 CisKKwkvKiBVcGRhdGUgSVJRIFRBUkdFVCByZWdpc3RlciAqLworCXRhcmdldCA9IHByaXYtPnJl Z3MgKyBBUExJQ19UQVJHRVRfQkFTRTsKKwl0YXJnZXQgKz0gKGQtPmh3aXJxIC0gMSkgKiBzaXpl b2YodTMyKTsKKwl2YWwgPSBGSUVMRF9QUkVQKEFQTElDX1RBUkdFVF9IQVJUX0lEWCwgaGFydF9p bmRleCk7CisJdmFsIHw9IEZJRUxEX1BSRVAoQVBMSUNfVEFSR0VUX0dVRVNUX0lEWCwgZ3Vlc3Rf aW5kZXgpOworCXZhbCB8PSBGSUVMRF9QUkVQKEFQTElDX1RBUkdFVF9FSUlELCBtc2ctPmRhdGEp OworCXdyaXRlbCh2YWwsIHRhcmdldCk7Cit9CisKK3N0YXRpYyB2b2lkIGFwbGljX21zaV9zZXRf ZGVzYyhtc2lfYWxsb2NfaW5mb190ICphcmcsIHN0cnVjdCBtc2lfZGVzYyAqZGVzYykKK3sKKwlh cmctPmRlc2MgPSBkZXNjOworCWFyZy0+aHdpcnEgPSAodTMyKWRlc2MtPmRhdGEuaWNvb2tpZS52 YWx1ZTsKK30KKworc3RhdGljIGludCBhcGxpY19tc2lfdHJhbnNsYXRlKHN0cnVjdCBpcnFfZG9t YWluICpkLCBzdHJ1Y3QgaXJxX2Z3c3BlYyAqZndzcGVjLAorCQkJICAgICAgIHVuc2lnbmVkIGxv bmcgKmh3aXJxLCB1bnNpZ25lZCBpbnQgKnR5cGUpCit7CisJc3RydWN0IG1zaV9kb21haW5faW5m byAqaW5mbyA9IGQtPmhvc3RfZGF0YTsKKwlzdHJ1Y3QgYXBsaWNfcHJpdiAqcHJpdiA9IGluZm8t PmRhdGE7CisKKwlyZXR1cm4gYXBsaWNfaXJxZG9tYWluX3RyYW5zbGF0ZShmd3NwZWMsIHByaXYt PmdzaV9iYXNlLCBod2lycSwgdHlwZSk7Cit9CisKK3N0YXRpYyBjb25zdCBzdHJ1Y3QgbXNpX2Rv bWFpbl90ZW1wbGF0ZSBhcGxpY19tc2lfdGVtcGxhdGUgPSB7CisJLmNoaXAgPSB7CisJCS5uYW1l CQkJPSAiQVBMSUMtTVNJIiwKKwkJLmlycV9tYXNrCQk9IGFwbGljX21zaV9pcnFfbWFzaywKKwkJ LmlycV91bm1hc2sJCT0gYXBsaWNfbXNpX2lycV91bm1hc2ssCisJCS5pcnFfc2V0X3R5cGUJCT0g YXBsaWNfaXJxX3NldF90eXBlLAorCQkuaXJxX2VvaQkJPSBhcGxpY19tc2lfaXJxX2VvaSwKKyNp ZmRlZiBDT05GSUdfU01QCisJCS5pcnFfc2V0X2FmZmluaXR5CT0gaXJxX2NoaXBfc2V0X2FmZmlu aXR5X3BhcmVudCwKKyNlbmRpZgorCQkuaXJxX3dyaXRlX21zaV9tc2cJPSBhcGxpY19tc2lfd3Jp dGVfbXNnLAorCQkuZmxhZ3MJCQk9IElSUUNISVBfU0VUX1RZUEVfTUFTS0VEIHwKKwkJCQkJICBJ UlFDSElQX1NLSVBfU0VUX1dBS0UgfAorCQkJCQkgIElSUUNISVBfTUFTS19PTl9TVVNQRU5ELAor CX0sCisKKwkub3BzID0geworCQkuc2V0X2Rlc2MJCT0gYXBsaWNfbXNpX3NldF9kZXNjLAorCQku bXNpX3RyYW5zbGF0ZQkJPSBhcGxpY19tc2lfdHJhbnNsYXRlLAorCX0sCisKKwkuaW5mbyA9IHsK KwkJLmJ1c190b2tlbgkJPSBET01BSU5fQlVTX1dJUkVEX1RPX01TSSwKKwkJLmZsYWdzCQkJPSBN U0lfRkxBR19VU0VfREVWX0ZXTk9ERSwKKwkJLmhhbmRsZXIJCT0gaGFuZGxlX2Zhc3Rlb2lfaXJx LAorCQkuaGFuZGxlcl9uYW1lCQk9ICJmYXN0ZW9pIiwKKwl9LAorfTsKKworaW50IGFwbGljX21z aV9zZXR1cChzdHJ1Y3QgZGV2aWNlICpkZXYsIHZvaWQgX19pb21lbSAqcmVncykKK3sKKwljb25z dCBzdHJ1Y3QgaW1zaWNfZ2xvYmFsX2NvbmZpZyAqaW1zaWNfZ2xvYmFsOworCXN0cnVjdCBhcGxp Y19wcml2ICpwcml2OworCXN0cnVjdCBhcGxpY19tc2ljZmcgKm1jOworCXBoeXNfYWRkcl90IHBh OworCWludCByYzsKKworCXByaXYgPSBkZXZtX2t6YWxsb2MoZGV2LCBzaXplb2YoKnByaXYpLCBH RlBfS0VSTkVMKTsKKwlpZiAoIXByaXYpCisJCXJldHVybiAtRU5PTUVNOworCisJcmMgPSBhcGxp Y19zZXR1cF9wcml2KHByaXYsIGRldiwgcmVncyk7CisJaWYgKHJjKSB7CisJCWRldl9lcnIoZGV2 LCAiZmFpbGVkIHRvIGNyZWF0ZSBBUExJQyBjb250ZXh0XG4iKTsKKwkJcmV0dXJuIHJjOworCX0K KwltYyA9ICZwcml2LT5tc2ljZmc7CisKKwkvKgorCSAqIFRoZSBBUExJQyBvdXRnb2luZyBNU0kg Y29uZmlnIHJlZ2lzdGVycyBhc3N1bWUgdGFyZ2V0IE1TSQorCSAqIGNvbnRyb2xsZXIgdG8gYmUg UklTQy1WIEFJQSBJTVNJQyBjb250cm9sbGVyLgorCSAqLworCWltc2ljX2dsb2JhbCA9IGltc2lj X2dldF9nbG9iYWxfY29uZmlnKCk7CisJaWYgKCFpbXNpY19nbG9iYWwpIHsKKwkJZGV2X2Vycihk ZXYsICJJTVNJQyBnbG9iYWwgY29uZmlnIG5vdCBmb3VuZFxuIik7CisJCXJldHVybiAtRU5PREVW OworCX0KKworCS8qIEZpbmQgbnVtYmVyIG9mIGd1ZXN0IGluZGV4IGJpdHMgKExIWFMpICovCisJ bWMtPmxoeHMgPSBpbXNpY19nbG9iYWwtPmd1ZXN0X2luZGV4X2JpdHM7CisJaWYgKEFQTElDX3hN U0lDRkdBRERSSF9MSFhTX01BU0sgPCBtYy0+bGh4cykgeworCQlkZXZfZXJyKGRldiwgIklNU0lD IGd1ZXN0IGluZGV4IGJpdHMgYmlnIGZvciBBUExJQyBMSFhTXG4iKTsKKwkJcmV0dXJuIC1FSU5W QUw7CisJfQorCisJLyogRmluZCBudW1iZXIgb2YgSEFSVCBpbmRleCBiaXRzIChMSFhXKSAqLwor CW1jLT5saHh3ID0gaW1zaWNfZ2xvYmFsLT5oYXJ0X2luZGV4X2JpdHM7CisJaWYgKEFQTElDX3hN U0lDRkdBRERSSF9MSFhXX01BU0sgPCBtYy0+bGh4dykgeworCQlkZXZfZXJyKGRldiwgIklNU0lD IGhhcnQgaW5kZXggYml0cyBiaWcgZm9yIEFQTElDIExIWFdcbiIpOworCQlyZXR1cm4gLUVJTlZB TDsKKwl9CisKKwkvKiBGaW5kIG51bWJlciBvZiBncm91cCBpbmRleCBiaXRzIChISFhXKSAqLwor CW1jLT5oaHh3ID0gaW1zaWNfZ2xvYmFsLT5ncm91cF9pbmRleF9iaXRzOworCWlmIChBUExJQ194 TVNJQ0ZHQUREUkhfSEhYV19NQVNLIDwgbWMtPmhoeHcpIHsKKwkJZGV2X2VycihkZXYsICJJTVNJ QyBncm91cCBpbmRleCBiaXRzIGJpZyBmb3IgQVBMSUMgSEhYV1xuIik7CisJCXJldHVybiAtRUlO VkFMOworCX0KKworCS8qIEZpbmQgZmlyc3QgYml0IHBvc2l0aW9uIG9mIGdyb3VwIGluZGV4IChI SFhTKSAqLworCW1jLT5oaHhzID0gaW1zaWNfZ2xvYmFsLT5ncm91cF9pbmRleF9zaGlmdDsKKwlp ZiAobWMtPmhoeHMgPCAoMiAqIEFQTElDX3hNU0lDRkdBRERSX1BQTl9TSElGVCkpIHsKKwkJZGV2 X2VycihkZXYsICJJTVNJQyBncm91cCBpbmRleCBzaGlmdCBzaG91bGQgYmUgPj0gJWRcbiIsCisJ CQkoMiAqIEFQTElDX3hNU0lDRkdBRERSX1BQTl9TSElGVCkpOworCQlyZXR1cm4gLUVJTlZBTDsK Kwl9CisJbWMtPmhoeHMgLT0gKDIgKiBBUExJQ194TVNJQ0ZHQUREUl9QUE5fU0hJRlQpOworCWlm IChBUExJQ194TVNJQ0ZHQUREUkhfSEhYU19NQVNLIDwgbWMtPmhoeHMpIHsKKwkJZGV2X2Vycihk ZXYsICJJTVNJQyBncm91cCBpbmRleCBzaGlmdCBiaWcgZm9yIEFQTElDIEhIWFNcbiIpOworCQly ZXR1cm4gLUVJTlZBTDsKKwl9CisKKwkvKiBDb21wdXRlIFBQTiBiYXNlICovCisJbWMtPmJhc2Vf cHBuID0gaW1zaWNfZ2xvYmFsLT5iYXNlX2FkZHIgPj4gQVBMSUNfeE1TSUNGR0FERFJfUFBOX1NI SUZUOworCW1jLT5iYXNlX3BwbiAmPSB+QVBMSUNfeE1TSUNGR0FERFJfUFBOX0hBUlQobWMtPmxo eHMpOworCW1jLT5iYXNlX3BwbiAmPSB+QVBMSUNfeE1TSUNGR0FERFJfUFBOX0xIWChtYy0+bGh4 dywgbWMtPmxoeHMpOworCW1jLT5iYXNlX3BwbiAmPSB+QVBMSUNfeE1TSUNGR0FERFJfUFBOX0hI WChtYy0+aGh4dywgbWMtPmhoeHMpOworCisJLyogU2V0dXAgZ2xvYmFsIGNvbmZpZyBhbmQgaW50 ZXJydXB0IGRlbGl2ZXJ5ICovCisJYXBsaWNfaW5pdF9od19nbG9iYWwocHJpdiwgdHJ1ZSk7CisK KwkvKiBTZXQgdGhlIEFQTElDIGRldmljZSBNU0kgZG9tYWluIGlmIG5vdCBhdmFpbGFibGUgKi8K KwlpZiAoIWRldl9nZXRfbXNpX2RvbWFpbihkZXYpKSB7CisJCS8qCisJCSAqIFRoZSBkZXZpY2Ug TVNJIGRvbWFpbiBmb3IgT0YgZGV2aWNlcyBpcyBvbmx5IHNldCBhdCB0aGUKKwkJICogdGltZSBv ZiBwb3B1bGF0aW5nL2NyZWF0aW5nIE9GIGRldmljZS4gSWYgdGhlIGRldmljZSBNU0kKKwkJICog ZG9tYWluIGlzIGRpc2NvdmVyZWQgbGF0ZXIgYWZ0ZXIgdGhlIE9GIGRldmljZSBpcyBjcmVhdGVk CisJCSAqIHRoZW4gd2UgbmVlZCB0byBzZXQgaXQgZXhwbGljaXRseSBiZWZvcmUgdXNpbmcgYW55 IHBsYXRmb3JtCisJCSAqIE1TSSBmdW5jdGlvbnMuCisJCSAqCisJCSAqIEluIGNhc2Ugb2YgQVBM SUMgZGV2aWNlLCB0aGUgcGFyZW50IE1TSSBkb21haW4gaXMgYWx3YXlzCisJCSAqIElNU0lDIGFu ZCB0aGUgSU1TSUMgTVNJIGRvbWFpbnMgYXJlIGNyZWF0ZWQgbGF0ZXIgdGhyb3VnaAorCQkgKiB0 aGUgcGxhdGZvcm0gZHJpdmVyIHByb2Jpbmcgc28gd2Ugc2V0IGl0IGV4cGxpY2l0bHkgaGVyZS4K KwkJICovCisJCWlmIChpc19vZl9ub2RlKGRldi0+Zndub2RlKSkKKwkJCW9mX21zaV9jb25maWd1 cmUoZGV2LCB0b19vZl9ub2RlKGRldi0+Zndub2RlKSk7CisJfQorCisJaWYgKCFtc2lfY3JlYXRl X2RldmljZV9pcnFfZG9tYWluKGRldiwgTVNJX0RFRkFVTFRfRE9NQUlOLCAmYXBsaWNfbXNpX3Rl bXBsYXRlLAorCQkJCQkgIHByaXYtPm5yX2lycXMgKyAxLCBwcml2LCBwcml2KSkgeworCQlkZXZf ZXJyKGRldiwgImZhaWxlZCB0byBjcmVhdGUgTVNJIGlycSBkb21haW5cbiIpOworCQlyZXR1cm4g LUVOT01FTTsKKwl9CisKKwkvKiBBZHZlcnRpc2UgdGhlIGludGVycnVwdCBjb250cm9sbGVyICov CisJcGEgPSBwcml2LT5tc2ljZmcuYmFzZV9wcG4gPDwgQVBMSUNfeE1TSUNGR0FERFJfUFBOX1NI SUZUOworCWRldl9pbmZvKGRldiwgIiVkIGludGVycnVwdHMgZm9yd2FyZWQgdG8gTVNJIGJhc2Ug JXBhXG4iLCBwcml2LT5ucl9pcnFzLCAmcGEpOworCisJcmV0dXJuIDA7Cit9Ci0tIAoyLjM0LjEK CgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpsaW51eC1y aXNjdiBtYWlsaW5nIGxpc3QKbGludXgtcmlzY3ZAbGlzdHMuaW5mcmFkZWFkLm9yZwpodHRwOi8v bGlzdHMuaW5mcmFkZWFkLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2xpbnV4LXJpc2N2Cg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1253EC54798 for ; Thu, 7 Mar 2024 14:04:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=4VL1SBdm4WwG7G3bH3i04t2gjHBUonjJB9mDheM23f4=; b=PWCSohPYFzGj+8 5JtECpBT1xF7CJNQ7sN4eA1wI1WurcIxuDG+IyWh7YGXUgtqn7SyJEaFOXDcdo5pccDWytLnGBAjv P+ayn/MxMwuMcZdp5zKGjh0M4c9fy0fBiambpW8IbD9GM9TCZVeL3K3h7pQyqPwiDIXv8mkAwS1na PsMQC1vaWBgcASx0nM9cZMAGiBjh302d9wVPQbjrtLtVZXdiJDEn89i7UwaDO0+PKQGbryHi6cUvQ ARF9TCw2S0toGlVwnnK/wkZpPDpQF8IQkLuiUVgrVnVr5K/RMIwCUawHS44km2TBKPWxn2QhX+4Ic +hv4dbhH6sjN7DDx1Rpg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1riEMO-00000004wHH-3ZPy; Thu, 07 Mar 2024 14:04:36 +0000 Received: from mail-pl1-x62d.google.com ([2607:f8b0:4864:20::62d]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1riELp-00000004vsl-4AS2 for linux-arm-kernel@lists.infradead.org; Thu, 07 Mar 2024 14:04:17 +0000 Received: by mail-pl1-x62d.google.com with SMTP id d9443c01a7336-1dd6198c4e2so1650985ad.2 for ; Thu, 07 Mar 2024 06:04:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1709820241; x=1710425041; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=IU5X/vDZdCsMdXFx74d7p2R3oQsiUAYZn8cBdmneE/s=; b=OeIy8zBqI8nwrFZeLbXub/jhYgmQevV0CsGcv1utIGmMXJ8rvAbD/2fr6+irL0CZIT O+TNCAk/bQVVmmTVn9Cw4VNQg2i7Qn78qz/gypZNMF+NnDRU7LktnLUFOKNVQB/W4FSL feh+XS90xRTwZ1ek8eEZT/60egFN4b4GT1PLsrCFq97+Juz4JafKjhzRqJsiFqmEzHrr 0Dsq4Nvd7+qL7puxIPsf54fbOqo8Tet2lWNGRDMSmU8mJGFkUVI5Qss1u8NUEJh6rS60 Lep1D+su7Sg5ZVV56v/4Ha+EiphLoJyrojzjOJUp4jp94ASNAa45BugYR1Ll3IARACnl rOiA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709820241; x=1710425041; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=IU5X/vDZdCsMdXFx74d7p2R3oQsiUAYZn8cBdmneE/s=; b=k+eXI/+Ps+IVRyLjj/08vBQlT2LLsP2D1gYFyuYmQsyv3eoaebp8VuaSNsPLbOjMlb prfqKSh8jLXht7JI4AWxzT6q8uGdtModG3cLpEidFBg4f89ZbDQSGr8wzeUHef88NfK+ f6NkyGvEdyAKUA7cDIgX6c6lQ0k5ueTxa3BpDQibGZn5YVd1FpSYs1MKF2ZUaez5Nr4t JLB3rMayeJLJLV0gKO/dSJ8YW+8k8rh/PN/m5vem0nOqy0B4Z7IAoMowyloH5ue5MhUO cufU6/VdYnqHPdOZbS49XuJwRArc54hHm/BsFwGknVs0ujLA6Y8eWBx0wXy1QhgD02bx iB3Q== X-Forwarded-Encrypted: i=1; AJvYcCVNCdlE5f+xd35IcCVQGoAFJElJgJHxttTCPvNDQ9PXBaxyBC+4Kn4Zf6kje2b1+uv9yL9F1V96/bxVqn7i944CJJE2Oo9zOMcLZuqEEj13choLezU= X-Gm-Message-State: AOJu0Yym/AYH9qRuf2YcgY+0t43/NCQI68lElQqq2Oz5RpVVRASNraY0 pGmliC16G3ZCkEjBpcrr4vApQMF7y1hNSdxQQUrR3M77jJvAMZuWNywqhC2oDbA= X-Google-Smtp-Source: AGHT+IEDHhy5F9q3HIeeCvmWM4N9C05SjNYCoLQ3BTZ+w2tiUr0UbDe9h+xoizgbjRpYRV0/Edxagg== X-Received: by 2002:a17:902:c402:b0:1db:28bd:2949 with SMTP id k2-20020a170902c40200b001db28bd2949mr9529127plk.0.1709820240435; Thu, 07 Mar 2024 06:04:00 -0800 (PST) Received: from anup-ubuntu-vm.localdomain ([171.76.84.79]) by smtp.gmail.com with ESMTPSA id w1-20020a1709026f0100b001dd6174c651sm386228plk.149.2024.03.07.06.03.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Mar 2024 06:03:59 -0800 (PST) From: Anup Patel To: Palmer Dabbelt , Paul Walmsley , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Frank Rowand , Conor Dooley Cc: Marc Zyngier , =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= , Atish Patra , Andrew Jones , Sunil V L , Saravana Kannan , Anup Patel , linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Anup Patel Subject: [PATCH v16 7/9] irqchip/riscv-aplic: Add support for MSI-mode Date: Thu, 7 Mar 2024 19:33:05 +0530 Message-Id: <20240307140307.646078-8-apatel@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240307140307.646078-1-apatel@ventanamicro.com> References: <20240307140307.646078-1-apatel@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240307_060402_560598_0167826E X-CRM114-Status: GOOD ( 33.71 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org VGhlIFJJU0MtViBhZHZhbmNlZCBwbGF0Zm9ybS1sZXZlbCBpbnRlcnJ1cHQgY29udHJvbGxlciAo QVBMSUMpIGhhcwp0d28gbW9kZXMgb2Ygb3BlcmF0aW9uOiAxKSBEaXJlY3QgbW9kZSBhbmQgMikg TVNJIG1vZGUuCihGb3IgbW9yZSBkZXRhaWxzLCByZWZlciBodHRwczovL2dpdGh1Yi5jb20vcmlz Y3YvcmlzY3YtYWlhKQoKSW4gQVBMSUMgTVNJLW1vZGUsIHdpcmVkIGludGVycnVwdHMgYXJlIGZv cndhcmVkIGFzIG1lc3NhZ2Ugc2lnbmFsZWQKaW50ZXJydXB0cyAoTVNJcykgdG8gQ1BVcyB2aWEg SU1TSUMuCgpFeHRlbmQgdGhlIGV4aXN0aW5nIEFQTElDIGlycWNoaXAgZHJpdmVyIHRvIHN1cHBv cnQgTVNJLW1vZGUgZm9yClJJU0MtViBwbGF0Zm9ybXMgaGF2aW5nIGJvdGggd2lyZWQgaW50ZXJy dXB0cyBhbmQgTVNJcy4KClNpZ25lZC1vZmYtYnk6IEFudXAgUGF0ZWwgPGFwYXRlbEB2ZW50YW5h bWljcm8uY29tPgotLS0KIGRyaXZlcnMvaXJxY2hpcC9LY29uZmlnICAgICAgICAgICAgICAgIHwg ICA2ICsKIGRyaXZlcnMvaXJxY2hpcC9NYWtlZmlsZSAgICAgICAgICAgICAgIHwgICAxICsKIGRy aXZlcnMvaXJxY2hpcC9pcnEtcmlzY3YtYXBsaWMtbWFpbi5jIHwgICAyICstCiBkcml2ZXJzL2ly cWNoaXAvaXJxLXJpc2N2LWFwbGljLW1haW4uaCB8ICAgOCArCiBkcml2ZXJzL2lycWNoaXAvaXJx LXJpc2N2LWFwbGljLW1zaS5jICB8IDI1NyArKysrKysrKysrKysrKysrKysrKysrKysrCiA1IGZp bGVzIGNoYW5nZWQsIDI3MyBpbnNlcnRpb25zKCspLCAxIGRlbGV0aW9uKC0pCiBjcmVhdGUgbW9k ZSAxMDA2NDQgZHJpdmVycy9pcnFjaGlwL2lycS1yaXNjdi1hcGxpYy1tc2kuYwoKZGlmZiAtLWdp dCBhL2RyaXZlcnMvaXJxY2hpcC9LY29uZmlnIGIvZHJpdmVycy9pcnFjaGlwL0tjb25maWcKaW5k ZXggZGJjODgxMWQzNzY0Li44MDZiNWZjY2IzZTggMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvaXJxY2hp cC9LY29uZmlnCisrKyBiL2RyaXZlcnMvaXJxY2hpcC9LY29uZmlnCkBAIC01NTEsNiArNTUxLDEy IEBAIGNvbmZpZyBSSVNDVl9BUExJQwogCWRlcGVuZHMgb24gUklTQ1YKIAlzZWxlY3QgSVJRX0RP TUFJTl9ISUVSQVJDSFkKIAorY29uZmlnIFJJU0NWX0FQTElDX01TSQorCWJvb2wKKwlkZXBlbmRz IG9uIFJJU0NWX0FQTElDCisJc2VsZWN0IEdFTkVSSUNfTVNJX0lSUQorCWRlZmF1bHQgUklTQ1Zf QVBMSUMKKwogY29uZmlnIFJJU0NWX0lNU0lDCiAJYm9vbAogCWRlcGVuZHMgb24gUklTQ1YKZGlm ZiAtLWdpdCBhL2RyaXZlcnMvaXJxY2hpcC9NYWtlZmlsZSBiL2RyaXZlcnMvaXJxY2hpcC9NYWtl ZmlsZQppbmRleCA3ZjgyODk3OTBlZDguLjQ3OTk1ZmRiMmM2MCAxMDA2NDQKLS0tIGEvZHJpdmVy cy9pcnFjaGlwL01ha2VmaWxlCisrKyBiL2RyaXZlcnMvaXJxY2hpcC9NYWtlZmlsZQpAQCAtOTYs NiArOTYsNyBAQCBvYmotJChDT05GSUdfQ1NLWV9NUElOVEMpCQkrPSBpcnEtY3NreS1tcGludGMu bwogb2JqLSQoQ09ORklHX0NTS1lfQVBCX0lOVEMpCQkrPSBpcnEtY3NreS1hcGItaW50Yy5vCiBv YmotJChDT05GSUdfUklTQ1ZfSU5UQykJCSs9IGlycS1yaXNjdi1pbnRjLm8KIG9iai0kKENPTkZJ R19SSVNDVl9BUExJQykJCSs9IGlycS1yaXNjdi1hcGxpYy1tYWluLm8gaXJxLXJpc2N2LWFwbGlj LWRpcmVjdC5vCitvYmotJChDT05GSUdfUklTQ1ZfQVBMSUNfTVNJKQkJKz0gaXJxLXJpc2N2LWFw bGljLW1zaS5vCiBvYmotJChDT05GSUdfUklTQ1ZfSU1TSUMpCQkrPSBpcnEtcmlzY3YtaW1zaWMt c3RhdGUubyBpcnEtcmlzY3YtaW1zaWMtZWFybHkubyBpcnEtcmlzY3YtaW1zaWMtcGxhdGZvcm0u bwogb2JqLSQoQ09ORklHX1NJRklWRV9QTElDKQkJKz0gaXJxLXNpZml2ZS1wbGljLm8KIG9iai0k KENPTkZJR19JTVhfSVJRU1RFRVIpCQkrPSBpcnEtaW14LWlycXN0ZWVyLm8KZGlmZiAtLWdpdCBh L2RyaXZlcnMvaXJxY2hpcC9pcnEtcmlzY3YtYXBsaWMtbWFpbi5jIGIvZHJpdmVycy9pcnFjaGlw L2lycS1yaXNjdi1hcGxpYy1tYWluLmMKaW5kZXggMTYwZmY5OWQ2OTc5Li43NzRhMGM5N2ZkYWIg MTAwNjQ0Ci0tLSBhL2RyaXZlcnMvaXJxY2hpcC9pcnEtcmlzY3YtYXBsaWMtbWFpbi5jCisrKyBi L2RyaXZlcnMvaXJxY2hpcC9pcnEtcmlzY3YtYXBsaWMtbWFpbi5jCkBAIC0xODcsNyArMTg3LDcg QEAgc3RhdGljIGludCBhcGxpY19wcm9iZShzdHJ1Y3QgcGxhdGZvcm1fZGV2aWNlICpwZGV2KQog CWlmIChpc19vZl9ub2RlKGRldi0+Zndub2RlKSkKIAkJbXNpX21vZGUgPSBvZl9wcm9wZXJ0eV9w cmVzZW50KHRvX29mX25vZGUoZGV2LT5md25vZGUpLCAibXNpLXBhcmVudCIpOwogCWlmIChtc2lf bW9kZSkKLQkJcmMgPSAtRU5PREVWOworCQlyYyA9IGFwbGljX21zaV9zZXR1cChkZXYsIHJlZ3Mp OwogCWVsc2UKIAkJcmMgPSBhcGxpY19kaXJlY3Rfc2V0dXAoZGV2LCByZWdzKTsKIAlpZiAocmMp CmRpZmYgLS1naXQgYS9kcml2ZXJzL2lycWNoaXAvaXJxLXJpc2N2LWFwbGljLW1haW4uaCBiL2Ry aXZlcnMvaXJxY2hpcC9pcnEtcmlzY3YtYXBsaWMtbWFpbi5oCmluZGV4IDRjZmJhZGYzN2RkYy4u NDM5MzkyN2Q4YzgwIDEwMDY0NAotLS0gYS9kcml2ZXJzL2lycWNoaXAvaXJxLXJpc2N2LWFwbGlj LW1haW4uaAorKysgYi9kcml2ZXJzL2lycWNoaXAvaXJxLXJpc2N2LWFwbGljLW1haW4uaApAQCAt NDAsNSArNDAsMTMgQEAgaW50IGFwbGljX2lycWRvbWFpbl90cmFuc2xhdGUoc3RydWN0IGlycV9m d3NwZWMgKmZ3c3BlYywgdTMyIGdzaV9iYXNlLAogdm9pZCBhcGxpY19pbml0X2h3X2dsb2JhbChz dHJ1Y3QgYXBsaWNfcHJpdiAqcHJpdiwgYm9vbCBtc2lfbW9kZSk7CiBpbnQgYXBsaWNfc2V0dXBf cHJpdihzdHJ1Y3QgYXBsaWNfcHJpdiAqcHJpdiwgc3RydWN0IGRldmljZSAqZGV2LCB2b2lkIF9f aW9tZW0gKnJlZ3MpOwogaW50IGFwbGljX2RpcmVjdF9zZXR1cChzdHJ1Y3QgZGV2aWNlICpkZXYs IHZvaWQgX19pb21lbSAqcmVncyk7CisjaWZkZWYgQ09ORklHX1JJU0NWX0FQTElDX01TSQoraW50 IGFwbGljX21zaV9zZXR1cChzdHJ1Y3QgZGV2aWNlICpkZXYsIHZvaWQgX19pb21lbSAqcmVncyk7 CisjZWxzZQorc3RhdGljIGlubGluZSBpbnQgYXBsaWNfbXNpX3NldHVwKHN0cnVjdCBkZXZpY2Ug KmRldiwgdm9pZCBfX2lvbWVtICpyZWdzKQoreworCXJldHVybiAtRU5PREVWOworfQorI2VuZGlm CiAKICNlbmRpZgpkaWZmIC0tZ2l0IGEvZHJpdmVycy9pcnFjaGlwL2lycS1yaXNjdi1hcGxpYy1t c2kuYyBiL2RyaXZlcnMvaXJxY2hpcC9pcnEtcmlzY3YtYXBsaWMtbXNpLmMKbmV3IGZpbGUgbW9k ZSAxMDA2NDQKaW5kZXggMDAwMDAwMDAwMDAwLi4zNmNkMDRhNTA1N2IKLS0tIC9kZXYvbnVsbAor KysgYi9kcml2ZXJzL2lycWNoaXAvaXJxLXJpc2N2LWFwbGljLW1zaS5jCkBAIC0wLDAgKzEsMjU3 IEBACisvLyBTUERYLUxpY2Vuc2UtSWRlbnRpZmllcjogR1BMLTIuMAorLyoKKyAqIENvcHlyaWdo dCAoQykgMjAyMSBXZXN0ZXJuIERpZ2l0YWwgQ29ycG9yYXRpb24gb3IgaXRzIGFmZmlsaWF0ZXMu CisgKiBDb3B5cmlnaHQgKEMpIDIwMjIgVmVudGFuYSBNaWNybyBTeXN0ZW1zIEluYy4KKyAqLwor CisjaW5jbHVkZSA8bGludXgvYml0ZmllbGQuaD4KKyNpbmNsdWRlIDxsaW51eC9iaXRvcHMuaD4K KyNpbmNsdWRlIDxsaW51eC9jcHUuaD4KKyNpbmNsdWRlIDxsaW51eC9pbnRlcnJ1cHQuaD4KKyNp bmNsdWRlIDxsaW51eC9pcnFjaGlwLmg+CisjaW5jbHVkZSA8bGludXgvaXJxY2hpcC9yaXNjdi1h cGxpYy5oPgorI2luY2x1ZGUgPGxpbnV4L2lycWNoaXAvcmlzY3YtaW1zaWMuaD4KKyNpbmNsdWRl IDxsaW51eC9tb2R1bGUuaD4KKyNpbmNsdWRlIDxsaW51eC9tc2kuaD4KKyNpbmNsdWRlIDxsaW51 eC9vZl9pcnEuaD4KKyNpbmNsdWRlIDxsaW51eC9wbGF0Zm9ybV9kZXZpY2UuaD4KKyNpbmNsdWRl IDxsaW51eC9wcmludGsuaD4KKyNpbmNsdWRlIDxsaW51eC9zbXAuaD4KKworI2luY2x1ZGUgImly cS1yaXNjdi1hcGxpYy1tYWluLmgiCisKK3N0YXRpYyB2b2lkIGFwbGljX21zaV9pcnFfbWFzayhz dHJ1Y3QgaXJxX2RhdGEgKmQpCit7CisJYXBsaWNfaXJxX21hc2soZCk7CisJaXJxX2NoaXBfbWFz a19wYXJlbnQoZCk7Cit9CisKK3N0YXRpYyB2b2lkIGFwbGljX21zaV9pcnFfdW5tYXNrKHN0cnVj dCBpcnFfZGF0YSAqZCkKK3sKKwlpcnFfY2hpcF91bm1hc2tfcGFyZW50KGQpOworCWFwbGljX2ly cV91bm1hc2soZCk7Cit9CisKK3N0YXRpYyB2b2lkIGFwbGljX21zaV9pcnFfZW9pKHN0cnVjdCBp cnFfZGF0YSAqZCkKK3sKKwlzdHJ1Y3QgYXBsaWNfcHJpdiAqcHJpdiA9IGlycV9kYXRhX2dldF9p cnFfY2hpcF9kYXRhKGQpOworCisJLyoKKwkgKiBFT0kgaGFuZGxpbmcgaXMgcmVxdWlyZWQgb25s eSBmb3IgbGV2ZWwtdHJpZ2dlcmVkIGludGVycnVwdHMKKwkgKiB3aGVuIEFQTElDIGlzIGluIE1T SSBtb2RlLgorCSAqLworCisJc3dpdGNoIChpcnFkX2dldF90cmlnZ2VyX3R5cGUoZCkpIHsKKwlj YXNlIElSUV9UWVBFX0xFVkVMX0xPVzoKKwljYXNlIElSUV9UWVBFX0xFVkVMX0hJR0g6CisJCS8q CisJCSAqIFRoZSBzZWN0aW9uICI0LjkuMiBTcGVjaWFsIGNvbnNpZGVyYXRpb24gZm9yIGxldmVs LXNlbnNpdGl2ZSBpbnRlcnJ1cHQKKwkJICogc291cmNlcyIgb2YgdGhlIFJJU0MtViBBSUEgc3Bl Y2lmaWNhdGlvbiBzYXlzOgorCQkgKgorCQkgKiBBIHNlY29uZCBvcHRpb24gaXMgZm9yIHRoZSBp bnRlcnJ1cHQgc2VydmljZSByb3V0aW5lIHRvIHdyaXRlIHRoZQorCQkgKiBBUExJQ+KAmXMgc291 cmNlIGlkZW50aXR5IG51bWJlciBmb3IgdGhlIGludGVycnVwdCB0byB0aGUgZG9tYWlu4oCZcwor CQkgKiBzZXRpcG51bSByZWdpc3RlciBqdXN0IGJlZm9yZSBleGl0aW5nLiBUaGlzIHdpbGwgY2F1 c2UgdGhlIGludGVycnVwdOKAmXMKKwkJICogcGVuZGluZyBiaXQgdG8gYmUgc2V0IHRvIG9uZSBh Z2FpbiBpZiB0aGUgc291cmNlIGlzIHN0aWxsIGFzc2VydGluZworCQkgKiBhbiBpbnRlcnJ1cHQs IGJ1dCBub3QgaWYgdGhlIHNvdXJjZSBpcyBub3QgYXNzZXJ0aW5nIGFuIGludGVycnVwdC4KKwkJ ICovCisJCXdyaXRlbChkLT5od2lycSwgcHJpdi0+cmVncyArIEFQTElDX1NFVElQTlVNX0xFKTsK KwkJYnJlYWs7CisJfQorfQorCitzdGF0aWMgdm9pZCBhcGxpY19tc2lfd3JpdGVfbXNnKHN0cnVj dCBpcnFfZGF0YSAqZCwgc3RydWN0IG1zaV9tc2cgKm1zZykKK3sKKwl1bnNpZ25lZCBpbnQgZ3Jv dXBfaW5kZXgsIGhhcnRfaW5kZXgsIGd1ZXN0X2luZGV4LCB2YWw7CisJc3RydWN0IGFwbGljX3By aXYgKnByaXYgPSBpcnFfZGF0YV9nZXRfaXJxX2NoaXBfZGF0YShkKTsKKwlzdHJ1Y3QgYXBsaWNf bXNpY2ZnICptYyA9ICZwcml2LT5tc2ljZmc7CisJcGh5c19hZGRyX3QgdHBwbiwgdGJwcG4sIG1z Z19hZGRyOworCXZvaWQgX19pb21lbSAqdGFyZ2V0OworCisJLyogRm9yIHplcm9lZCBNU0ksIHNp bXBseSB3cml0ZSB6ZXJvIGludG8gdGhlIHRhcmdldCByZWdpc3RlciAqLworCWlmICghbXNnLT5h ZGRyZXNzX2hpICYmICFtc2ctPmFkZHJlc3NfbG8gJiYgIW1zZy0+ZGF0YSkgeworCQl0YXJnZXQg PSBwcml2LT5yZWdzICsgQVBMSUNfVEFSR0VUX0JBU0U7CisJCXRhcmdldCArPSAoZC0+aHdpcnEg LSAxKSAqIHNpemVvZih1MzIpOworCQl3cml0ZWwoMCwgdGFyZ2V0KTsKKwkJcmV0dXJuOworCX0K KworCS8qIFNhbml0eSBjaGVjayBvbiBtZXNzYWdlIGRhdGEgKi8KKwlXQVJOX09OKG1zZy0+ZGF0 YSA+IEFQTElDX1RBUkdFVF9FSUlEX01BU0spOworCisJLyogQ29tcHV0ZSB0YXJnZXQgTVNJIGFk ZHJlc3MgKi8KKwltc2dfYWRkciA9ICgoKHU2NCltc2ctPmFkZHJlc3NfaGkpIDw8IDMyKSB8IG1z Zy0+YWRkcmVzc19sbzsKKwl0cHBuID0gbXNnX2FkZHIgPj4gQVBMSUNfeE1TSUNGR0FERFJfUFBO X1NISUZUOworCisJLyogQ29tcHV0ZSB0YXJnZXQgSEFSVCBCYXNlIFBQTiAqLworCXRicHBuID0g dHBwbjsKKwl0YnBwbiAmPSB+QVBMSUNfeE1TSUNGR0FERFJfUFBOX0hBUlQobWMtPmxoeHMpOwor CXRicHBuICY9IH5BUExJQ194TVNJQ0ZHQUREUl9QUE5fTEhYKG1jLT5saHh3LCBtYy0+bGh4cyk7 CisJdGJwcG4gJj0gfkFQTElDX3hNU0lDRkdBRERSX1BQTl9ISFgobWMtPmhoeHcsIG1jLT5oaHhz KTsKKwlXQVJOX09OKHRicHBuICE9IG1jLT5iYXNlX3Bwbik7CisKKwkvKiBDb21wdXRlIHRhcmdl dCBncm91cCBhbmQgaGFydCBpbmRleGVzICovCisJZ3JvdXBfaW5kZXggPSAodHBwbiA+PiBBUExJ Q194TVNJQ0ZHQUREUl9QUE5fSEhYX1NISUZUKG1jLT5oaHhzKSkgJgorCQkgICAgIEFQTElDX3hN U0lDRkdBRERSX1BQTl9ISFhfTUFTSyhtYy0+aGh4dyk7CisJaGFydF9pbmRleCA9ICh0cHBuID4+ IEFQTElDX3hNU0lDRkdBRERSX1BQTl9MSFhfU0hJRlQobWMtPmxoeHMpKSAmCisJCSAgICAgQVBM SUNfeE1TSUNGR0FERFJfUFBOX0xIWF9NQVNLKG1jLT5saHh3KTsKKwloYXJ0X2luZGV4IHw9IChn cm91cF9pbmRleCA8PCBtYy0+bGh4dyk7CisJV0FSTl9PTihoYXJ0X2luZGV4ID4gQVBMSUNfVEFS R0VUX0hBUlRfSURYX01BU0spOworCisJLyogQ29tcHV0ZSB0YXJnZXQgZ3Vlc3QgaW5kZXggKi8K KwlndWVzdF9pbmRleCA9IHRwcG4gJiBBUExJQ194TVNJQ0ZHQUREUl9QUE5fSEFSVChtYy0+bGh4 cyk7CisJV0FSTl9PTihndWVzdF9pbmRleCA+IEFQTElDX1RBUkdFVF9HVUVTVF9JRFhfTUFTSyk7 CisKKwkvKiBVcGRhdGUgSVJRIFRBUkdFVCByZWdpc3RlciAqLworCXRhcmdldCA9IHByaXYtPnJl Z3MgKyBBUExJQ19UQVJHRVRfQkFTRTsKKwl0YXJnZXQgKz0gKGQtPmh3aXJxIC0gMSkgKiBzaXpl b2YodTMyKTsKKwl2YWwgPSBGSUVMRF9QUkVQKEFQTElDX1RBUkdFVF9IQVJUX0lEWCwgaGFydF9p bmRleCk7CisJdmFsIHw9IEZJRUxEX1BSRVAoQVBMSUNfVEFSR0VUX0dVRVNUX0lEWCwgZ3Vlc3Rf aW5kZXgpOworCXZhbCB8PSBGSUVMRF9QUkVQKEFQTElDX1RBUkdFVF9FSUlELCBtc2ctPmRhdGEp OworCXdyaXRlbCh2YWwsIHRhcmdldCk7Cit9CisKK3N0YXRpYyB2b2lkIGFwbGljX21zaV9zZXRf ZGVzYyhtc2lfYWxsb2NfaW5mb190ICphcmcsIHN0cnVjdCBtc2lfZGVzYyAqZGVzYykKK3sKKwlh cmctPmRlc2MgPSBkZXNjOworCWFyZy0+aHdpcnEgPSAodTMyKWRlc2MtPmRhdGEuaWNvb2tpZS52 YWx1ZTsKK30KKworc3RhdGljIGludCBhcGxpY19tc2lfdHJhbnNsYXRlKHN0cnVjdCBpcnFfZG9t YWluICpkLCBzdHJ1Y3QgaXJxX2Z3c3BlYyAqZndzcGVjLAorCQkJICAgICAgIHVuc2lnbmVkIGxv bmcgKmh3aXJxLCB1bnNpZ25lZCBpbnQgKnR5cGUpCit7CisJc3RydWN0IG1zaV9kb21haW5faW5m byAqaW5mbyA9IGQtPmhvc3RfZGF0YTsKKwlzdHJ1Y3QgYXBsaWNfcHJpdiAqcHJpdiA9IGluZm8t PmRhdGE7CisKKwlyZXR1cm4gYXBsaWNfaXJxZG9tYWluX3RyYW5zbGF0ZShmd3NwZWMsIHByaXYt PmdzaV9iYXNlLCBod2lycSwgdHlwZSk7Cit9CisKK3N0YXRpYyBjb25zdCBzdHJ1Y3QgbXNpX2Rv bWFpbl90ZW1wbGF0ZSBhcGxpY19tc2lfdGVtcGxhdGUgPSB7CisJLmNoaXAgPSB7CisJCS5uYW1l CQkJPSAiQVBMSUMtTVNJIiwKKwkJLmlycV9tYXNrCQk9IGFwbGljX21zaV9pcnFfbWFzaywKKwkJ LmlycV91bm1hc2sJCT0gYXBsaWNfbXNpX2lycV91bm1hc2ssCisJCS5pcnFfc2V0X3R5cGUJCT0g YXBsaWNfaXJxX3NldF90eXBlLAorCQkuaXJxX2VvaQkJPSBhcGxpY19tc2lfaXJxX2VvaSwKKyNp ZmRlZiBDT05GSUdfU01QCisJCS5pcnFfc2V0X2FmZmluaXR5CT0gaXJxX2NoaXBfc2V0X2FmZmlu aXR5X3BhcmVudCwKKyNlbmRpZgorCQkuaXJxX3dyaXRlX21zaV9tc2cJPSBhcGxpY19tc2lfd3Jp dGVfbXNnLAorCQkuZmxhZ3MJCQk9IElSUUNISVBfU0VUX1RZUEVfTUFTS0VEIHwKKwkJCQkJICBJ UlFDSElQX1NLSVBfU0VUX1dBS0UgfAorCQkJCQkgIElSUUNISVBfTUFTS19PTl9TVVNQRU5ELAor CX0sCisKKwkub3BzID0geworCQkuc2V0X2Rlc2MJCT0gYXBsaWNfbXNpX3NldF9kZXNjLAorCQku bXNpX3RyYW5zbGF0ZQkJPSBhcGxpY19tc2lfdHJhbnNsYXRlLAorCX0sCisKKwkuaW5mbyA9IHsK KwkJLmJ1c190b2tlbgkJPSBET01BSU5fQlVTX1dJUkVEX1RPX01TSSwKKwkJLmZsYWdzCQkJPSBN U0lfRkxBR19VU0VfREVWX0ZXTk9ERSwKKwkJLmhhbmRsZXIJCT0gaGFuZGxlX2Zhc3Rlb2lfaXJx LAorCQkuaGFuZGxlcl9uYW1lCQk9ICJmYXN0ZW9pIiwKKwl9LAorfTsKKworaW50IGFwbGljX21z aV9zZXR1cChzdHJ1Y3QgZGV2aWNlICpkZXYsIHZvaWQgX19pb21lbSAqcmVncykKK3sKKwljb25z dCBzdHJ1Y3QgaW1zaWNfZ2xvYmFsX2NvbmZpZyAqaW1zaWNfZ2xvYmFsOworCXN0cnVjdCBhcGxp Y19wcml2ICpwcml2OworCXN0cnVjdCBhcGxpY19tc2ljZmcgKm1jOworCXBoeXNfYWRkcl90IHBh OworCWludCByYzsKKworCXByaXYgPSBkZXZtX2t6YWxsb2MoZGV2LCBzaXplb2YoKnByaXYpLCBH RlBfS0VSTkVMKTsKKwlpZiAoIXByaXYpCisJCXJldHVybiAtRU5PTUVNOworCisJcmMgPSBhcGxp Y19zZXR1cF9wcml2KHByaXYsIGRldiwgcmVncyk7CisJaWYgKHJjKSB7CisJCWRldl9lcnIoZGV2 LCAiZmFpbGVkIHRvIGNyZWF0ZSBBUExJQyBjb250ZXh0XG4iKTsKKwkJcmV0dXJuIHJjOworCX0K KwltYyA9ICZwcml2LT5tc2ljZmc7CisKKwkvKgorCSAqIFRoZSBBUExJQyBvdXRnb2luZyBNU0kg Y29uZmlnIHJlZ2lzdGVycyBhc3N1bWUgdGFyZ2V0IE1TSQorCSAqIGNvbnRyb2xsZXIgdG8gYmUg UklTQy1WIEFJQSBJTVNJQyBjb250cm9sbGVyLgorCSAqLworCWltc2ljX2dsb2JhbCA9IGltc2lj X2dldF9nbG9iYWxfY29uZmlnKCk7CisJaWYgKCFpbXNpY19nbG9iYWwpIHsKKwkJZGV2X2Vycihk ZXYsICJJTVNJQyBnbG9iYWwgY29uZmlnIG5vdCBmb3VuZFxuIik7CisJCXJldHVybiAtRU5PREVW OworCX0KKworCS8qIEZpbmQgbnVtYmVyIG9mIGd1ZXN0IGluZGV4IGJpdHMgKExIWFMpICovCisJ bWMtPmxoeHMgPSBpbXNpY19nbG9iYWwtPmd1ZXN0X2luZGV4X2JpdHM7CisJaWYgKEFQTElDX3hN U0lDRkdBRERSSF9MSFhTX01BU0sgPCBtYy0+bGh4cykgeworCQlkZXZfZXJyKGRldiwgIklNU0lD IGd1ZXN0IGluZGV4IGJpdHMgYmlnIGZvciBBUExJQyBMSFhTXG4iKTsKKwkJcmV0dXJuIC1FSU5W QUw7CisJfQorCisJLyogRmluZCBudW1iZXIgb2YgSEFSVCBpbmRleCBiaXRzIChMSFhXKSAqLwor CW1jLT5saHh3ID0gaW1zaWNfZ2xvYmFsLT5oYXJ0X2luZGV4X2JpdHM7CisJaWYgKEFQTElDX3hN U0lDRkdBRERSSF9MSFhXX01BU0sgPCBtYy0+bGh4dykgeworCQlkZXZfZXJyKGRldiwgIklNU0lD IGhhcnQgaW5kZXggYml0cyBiaWcgZm9yIEFQTElDIExIWFdcbiIpOworCQlyZXR1cm4gLUVJTlZB TDsKKwl9CisKKwkvKiBGaW5kIG51bWJlciBvZiBncm91cCBpbmRleCBiaXRzIChISFhXKSAqLwor CW1jLT5oaHh3ID0gaW1zaWNfZ2xvYmFsLT5ncm91cF9pbmRleF9iaXRzOworCWlmIChBUExJQ194 TVNJQ0ZHQUREUkhfSEhYV19NQVNLIDwgbWMtPmhoeHcpIHsKKwkJZGV2X2VycihkZXYsICJJTVNJ QyBncm91cCBpbmRleCBiaXRzIGJpZyBmb3IgQVBMSUMgSEhYV1xuIik7CisJCXJldHVybiAtRUlO VkFMOworCX0KKworCS8qIEZpbmQgZmlyc3QgYml0IHBvc2l0aW9uIG9mIGdyb3VwIGluZGV4IChI SFhTKSAqLworCW1jLT5oaHhzID0gaW1zaWNfZ2xvYmFsLT5ncm91cF9pbmRleF9zaGlmdDsKKwlp ZiAobWMtPmhoeHMgPCAoMiAqIEFQTElDX3hNU0lDRkdBRERSX1BQTl9TSElGVCkpIHsKKwkJZGV2 X2VycihkZXYsICJJTVNJQyBncm91cCBpbmRleCBzaGlmdCBzaG91bGQgYmUgPj0gJWRcbiIsCisJ CQkoMiAqIEFQTElDX3hNU0lDRkdBRERSX1BQTl9TSElGVCkpOworCQlyZXR1cm4gLUVJTlZBTDsK Kwl9CisJbWMtPmhoeHMgLT0gKDIgKiBBUExJQ194TVNJQ0ZHQUREUl9QUE5fU0hJRlQpOworCWlm IChBUExJQ194TVNJQ0ZHQUREUkhfSEhYU19NQVNLIDwgbWMtPmhoeHMpIHsKKwkJZGV2X2Vycihk ZXYsICJJTVNJQyBncm91cCBpbmRleCBzaGlmdCBiaWcgZm9yIEFQTElDIEhIWFNcbiIpOworCQly ZXR1cm4gLUVJTlZBTDsKKwl9CisKKwkvKiBDb21wdXRlIFBQTiBiYXNlICovCisJbWMtPmJhc2Vf cHBuID0gaW1zaWNfZ2xvYmFsLT5iYXNlX2FkZHIgPj4gQVBMSUNfeE1TSUNGR0FERFJfUFBOX1NI SUZUOworCW1jLT5iYXNlX3BwbiAmPSB+QVBMSUNfeE1TSUNGR0FERFJfUFBOX0hBUlQobWMtPmxo eHMpOworCW1jLT5iYXNlX3BwbiAmPSB+QVBMSUNfeE1TSUNGR0FERFJfUFBOX0xIWChtYy0+bGh4 dywgbWMtPmxoeHMpOworCW1jLT5iYXNlX3BwbiAmPSB+QVBMSUNfeE1TSUNGR0FERFJfUFBOX0hI WChtYy0+aGh4dywgbWMtPmhoeHMpOworCisJLyogU2V0dXAgZ2xvYmFsIGNvbmZpZyBhbmQgaW50 ZXJydXB0IGRlbGl2ZXJ5ICovCisJYXBsaWNfaW5pdF9od19nbG9iYWwocHJpdiwgdHJ1ZSk7CisK KwkvKiBTZXQgdGhlIEFQTElDIGRldmljZSBNU0kgZG9tYWluIGlmIG5vdCBhdmFpbGFibGUgKi8K KwlpZiAoIWRldl9nZXRfbXNpX2RvbWFpbihkZXYpKSB7CisJCS8qCisJCSAqIFRoZSBkZXZpY2Ug TVNJIGRvbWFpbiBmb3IgT0YgZGV2aWNlcyBpcyBvbmx5IHNldCBhdCB0aGUKKwkJICogdGltZSBv ZiBwb3B1bGF0aW5nL2NyZWF0aW5nIE9GIGRldmljZS4gSWYgdGhlIGRldmljZSBNU0kKKwkJICog ZG9tYWluIGlzIGRpc2NvdmVyZWQgbGF0ZXIgYWZ0ZXIgdGhlIE9GIGRldmljZSBpcyBjcmVhdGVk CisJCSAqIHRoZW4gd2UgbmVlZCB0byBzZXQgaXQgZXhwbGljaXRseSBiZWZvcmUgdXNpbmcgYW55 IHBsYXRmb3JtCisJCSAqIE1TSSBmdW5jdGlvbnMuCisJCSAqCisJCSAqIEluIGNhc2Ugb2YgQVBM SUMgZGV2aWNlLCB0aGUgcGFyZW50IE1TSSBkb21haW4gaXMgYWx3YXlzCisJCSAqIElNU0lDIGFu ZCB0aGUgSU1TSUMgTVNJIGRvbWFpbnMgYXJlIGNyZWF0ZWQgbGF0ZXIgdGhyb3VnaAorCQkgKiB0 aGUgcGxhdGZvcm0gZHJpdmVyIHByb2Jpbmcgc28gd2Ugc2V0IGl0IGV4cGxpY2l0bHkgaGVyZS4K KwkJICovCisJCWlmIChpc19vZl9ub2RlKGRldi0+Zndub2RlKSkKKwkJCW9mX21zaV9jb25maWd1 cmUoZGV2LCB0b19vZl9ub2RlKGRldi0+Zndub2RlKSk7CisJfQorCisJaWYgKCFtc2lfY3JlYXRl X2RldmljZV9pcnFfZG9tYWluKGRldiwgTVNJX0RFRkFVTFRfRE9NQUlOLCAmYXBsaWNfbXNpX3Rl bXBsYXRlLAorCQkJCQkgIHByaXYtPm5yX2lycXMgKyAxLCBwcml2LCBwcml2KSkgeworCQlkZXZf ZXJyKGRldiwgImZhaWxlZCB0byBjcmVhdGUgTVNJIGlycSBkb21haW5cbiIpOworCQlyZXR1cm4g LUVOT01FTTsKKwl9CisKKwkvKiBBZHZlcnRpc2UgdGhlIGludGVycnVwdCBjb250cm9sbGVyICov CisJcGEgPSBwcml2LT5tc2ljZmcuYmFzZV9wcG4gPDwgQVBMSUNfeE1TSUNGR0FERFJfUFBOX1NI SUZUOworCWRldl9pbmZvKGRldiwgIiVkIGludGVycnVwdHMgZm9yd2FyZWQgdG8gTVNJIGJhc2Ug JXBhXG4iLCBwcml2LT5ucl9pcnFzLCAmcGEpOworCisJcmV0dXJuIDA7Cit9Ci0tIAoyLjM0LjEK CgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpsaW51eC1h cm0ta2VybmVsIG1haWxpbmcgbGlzdApsaW51eC1hcm0ta2VybmVsQGxpc3RzLmluZnJhZGVhZC5v cmcKaHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5mby9saW51eC1hcm0t a2VybmVsCg== From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pl1-f180.google.com (mail-pl1-f180.google.com [209.85.214.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 638D012EBEA for ; Thu, 7 Mar 2024 14:04:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.180 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709820243; cv=none; b=mQYyl/eazz4LUZQr5+oQ8SOw7ay6AoNpcKQbquiGicL2LO3LJd6CW12XxUoXiWu1nOaSHFab5IvgjBZ9q+9trCujoUPN0jKnJwPa3Szb8tjC4Af4hcXsg8VJJde5Nz9EASqzDn+YeOzPaBRO4b6lklgB8P72W026sRF38Ca5DlU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709820243; c=relaxed/simple; bh=PXt3kYXt5KdBIdNb+UGpe3b7pUwRuPDHDhgjgmr856s=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=kbdyTu+WJslovgeWBgiU55h/ps7S+CTRDZHrbo/bemMHuV9mE1BvsqYr8e2Y79VCj8al+ZuZ2QJ+XJS0ewrqHgdnAWUwVXNmdWm0Jj5ylx4uD/aNQFhw0/q7NtfMRCsG+tAyYPRLD1NJUlCPZLvI2drGBtvAlFu5BBAiB3KE0og= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=oa7rb7I6; arc=none smtp.client-ip=209.85.214.180 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="oa7rb7I6" Received: by mail-pl1-f180.google.com with SMTP id d9443c01a7336-1dca3951ad9so7081485ad.3 for ; Thu, 07 Mar 2024 06:04:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1709820241; x=1710425041; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=IU5X/vDZdCsMdXFx74d7p2R3oQsiUAYZn8cBdmneE/s=; b=oa7rb7I6Lhv+UyyjFjHf2MbheMWU1s3KoThLDOv1PCpYIr+ofVugqgMourLgqerfiI FYDXtI3XDz5kPt/3pFVakz5ONDRv1G0BVp2fgkh3HmeNhyA5e3l8j9rJGJh7a9EgjME7 f2h9AgVBJ9DkDS1N4tueQmdalUHqOPGsR3rtfdYZhSBAgL2PH4vTOuYU9VbQ/HQ3cCfY 621UDAWOPQBdQ+JbpUprceSpdSkSre5DZblOKOXPUffY/u8wZd0Mw+28AO7p05sh3edt TSCFeipAOQ3/sStt34Pp9tguoz24mIIsdUeRJJqRNUymY+hAzbgpN8WjJ4MMRewAAeQi Tj8g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709820241; x=1710425041; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=IU5X/vDZdCsMdXFx74d7p2R3oQsiUAYZn8cBdmneE/s=; b=t524l9zYC2XS5yuP3273nI5CqC1ZnDSdn3RhtWDBXvg8Imej+A/lKJ/x8qXrpDx77s EgcJeJe8oSX1ty7kOBO8Hxyx+Tx5ssruqr1doDDpfc3ckrGP4Achi7pSKfdPIHbSv376 kLkQz4hCOoBLffPfm8xhZ0TVqZcSgiC+vkHejm7qtQpRKoSVjxU5eC9qr33MPR9a2QJ8 TPcE6HytX63Z9g0w22m03qBfh7ttCaSeF6GTsWnO8bm0raNRsdelxf1hVHMm/AUIb+rE tg3Hfvdh1zO4wlbj3s6rbPcf2kAojOCoMUmahuNaSLTrKgnY1nVRdn80kByYUtPrsw7Z ktaA== X-Forwarded-Encrypted: i=1; AJvYcCVhzZLQNJJUTA1SgWTcnIVtHFFOpaisir0n4ROMs4p7/g2CcGH1zuKOjTmkBetm1hPnPin+a8eN7TzFbz/ZncO40IYCik3+MYlk0w== X-Gm-Message-State: AOJu0YylvewzP5o1LEhuzsC4aqR24+w88gOFlDLF43KvV1YiOGv0Aiqo B8GAjys5Cu4Tb0KyGDHakuuLtwV8N65cDRN+xAjGLNaqYVWp8ar1ZMGxTkMLehg= X-Google-Smtp-Source: AGHT+IEDHhy5F9q3HIeeCvmWM4N9C05SjNYCoLQ3BTZ+w2tiUr0UbDe9h+xoizgbjRpYRV0/Edxagg== X-Received: by 2002:a17:902:c402:b0:1db:28bd:2949 with SMTP id k2-20020a170902c40200b001db28bd2949mr9529127plk.0.1709820240435; Thu, 07 Mar 2024 06:04:00 -0800 (PST) Received: from anup-ubuntu-vm.localdomain ([171.76.84.79]) by smtp.gmail.com with ESMTPSA id w1-20020a1709026f0100b001dd6174c651sm386228plk.149.2024.03.07.06.03.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Mar 2024 06:03:59 -0800 (PST) From: Anup Patel To: Palmer Dabbelt , Paul Walmsley , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Frank Rowand , Conor Dooley Cc: Marc Zyngier , =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= , Atish Patra , Andrew Jones , Sunil V L , Saravana Kannan , Anup Patel , linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Anup Patel Subject: [PATCH v16 7/9] irqchip/riscv-aplic: Add support for MSI-mode Date: Thu, 7 Mar 2024 19:33:05 +0530 Message-Id: <20240307140307.646078-8-apatel@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240307140307.646078-1-apatel@ventanamicro.com> References: <20240307140307.646078-1-apatel@ventanamicro.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The RISC-V advanced platform-level interrupt controller (APLIC) has two modes of operation: 1) Direct mode and 2) MSI mode. (For more details, refer https://github.com/riscv/riscv-aia) In APLIC MSI-mode, wired interrupts are forwared as message signaled interrupts (MSIs) to CPUs via IMSIC. Extend the existing APLIC irqchip driver to support MSI-mode for RISC-V platforms having both wired interrupts and MSIs. Signed-off-by: Anup Patel --- drivers/irqchip/Kconfig | 6 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-riscv-aplic-main.c | 2 +- drivers/irqchip/irq-riscv-aplic-main.h | 8 + drivers/irqchip/irq-riscv-aplic-msi.c | 257 +++++++++++++++++++++++++ 5 files changed, 273 insertions(+), 1 deletion(-) create mode 100644 drivers/irqchip/irq-riscv-aplic-msi.c diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index dbc8811d3764..806b5fccb3e8 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -551,6 +551,12 @@ config RISCV_APLIC depends on RISCV select IRQ_DOMAIN_HIERARCHY +config RISCV_APLIC_MSI + bool + depends on RISCV_APLIC + select GENERIC_MSI_IRQ + default RISCV_APLIC + config RISCV_IMSIC bool depends on RISCV diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index 7f8289790ed8..47995fdb2c60 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile @@ -96,6 +96,7 @@ obj-$(CONFIG_CSKY_MPINTC) += irq-csky-mpintc.o obj-$(CONFIG_CSKY_APB_INTC) += irq-csky-apb-intc.o obj-$(CONFIG_RISCV_INTC) += irq-riscv-intc.o obj-$(CONFIG_RISCV_APLIC) += irq-riscv-aplic-main.o irq-riscv-aplic-direct.o +obj-$(CONFIG_RISCV_APLIC_MSI) += irq-riscv-aplic-msi.o obj-$(CONFIG_RISCV_IMSIC) += irq-riscv-imsic-state.o irq-riscv-imsic-early.o irq-riscv-imsic-platform.o obj-$(CONFIG_SIFIVE_PLIC) += irq-sifive-plic.o obj-$(CONFIG_IMX_IRQSTEER) += irq-imx-irqsteer.o diff --git a/drivers/irqchip/irq-riscv-aplic-main.c b/drivers/irqchip/irq-riscv-aplic-main.c index 160ff99d6979..774a0c97fdab 100644 --- a/drivers/irqchip/irq-riscv-aplic-main.c +++ b/drivers/irqchip/irq-riscv-aplic-main.c @@ -187,7 +187,7 @@ static int aplic_probe(struct platform_device *pdev) if (is_of_node(dev->fwnode)) msi_mode = of_property_present(to_of_node(dev->fwnode), "msi-parent"); if (msi_mode) - rc = -ENODEV; + rc = aplic_msi_setup(dev, regs); else rc = aplic_direct_setup(dev, regs); if (rc) diff --git a/drivers/irqchip/irq-riscv-aplic-main.h b/drivers/irqchip/irq-riscv-aplic-main.h index 4cfbadf37ddc..4393927d8c80 100644 --- a/drivers/irqchip/irq-riscv-aplic-main.h +++ b/drivers/irqchip/irq-riscv-aplic-main.h @@ -40,5 +40,13 @@ int aplic_irqdomain_translate(struct irq_fwspec *fwspec, u32 gsi_base, void aplic_init_hw_global(struct aplic_priv *priv, bool msi_mode); int aplic_setup_priv(struct aplic_priv *priv, struct device *dev, void __iomem *regs); int aplic_direct_setup(struct device *dev, void __iomem *regs); +#ifdef CONFIG_RISCV_APLIC_MSI +int aplic_msi_setup(struct device *dev, void __iomem *regs); +#else +static inline int aplic_msi_setup(struct device *dev, void __iomem *regs) +{ + return -ENODEV; +} +#endif #endif diff --git a/drivers/irqchip/irq-riscv-aplic-msi.c b/drivers/irqchip/irq-riscv-aplic-msi.c new file mode 100644 index 000000000000..36cd04a5057b --- /dev/null +++ b/drivers/irqchip/irq-riscv-aplic-msi.c @@ -0,0 +1,257 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2021 Western Digital Corporation or its affiliates. + * Copyright (C) 2022 Ventana Micro Systems Inc. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "irq-riscv-aplic-main.h" + +static void aplic_msi_irq_mask(struct irq_data *d) +{ + aplic_irq_mask(d); + irq_chip_mask_parent(d); +} + +static void aplic_msi_irq_unmask(struct irq_data *d) +{ + irq_chip_unmask_parent(d); + aplic_irq_unmask(d); +} + +static void aplic_msi_irq_eoi(struct irq_data *d) +{ + struct aplic_priv *priv = irq_data_get_irq_chip_data(d); + + /* + * EOI handling is required only for level-triggered interrupts + * when APLIC is in MSI mode. + */ + + switch (irqd_get_trigger_type(d)) { + case IRQ_TYPE_LEVEL_LOW: + case IRQ_TYPE_LEVEL_HIGH: + /* + * The section "4.9.2 Special consideration for level-sensitive interrupt + * sources" of the RISC-V AIA specification says: + * + * A second option is for the interrupt service routine to write the + * APLIC’s source identity number for the interrupt to the domain’s + * setipnum register just before exiting. This will cause the interrupt’s + * pending bit to be set to one again if the source is still asserting + * an interrupt, but not if the source is not asserting an interrupt. + */ + writel(d->hwirq, priv->regs + APLIC_SETIPNUM_LE); + break; + } +} + +static void aplic_msi_write_msg(struct irq_data *d, struct msi_msg *msg) +{ + unsigned int group_index, hart_index, guest_index, val; + struct aplic_priv *priv = irq_data_get_irq_chip_data(d); + struct aplic_msicfg *mc = &priv->msicfg; + phys_addr_t tppn, tbppn, msg_addr; + void __iomem *target; + + /* For zeroed MSI, simply write zero into the target register */ + if (!msg->address_hi && !msg->address_lo && !msg->data) { + target = priv->regs + APLIC_TARGET_BASE; + target += (d->hwirq - 1) * sizeof(u32); + writel(0, target); + return; + } + + /* Sanity check on message data */ + WARN_ON(msg->data > APLIC_TARGET_EIID_MASK); + + /* Compute target MSI address */ + msg_addr = (((u64)msg->address_hi) << 32) | msg->address_lo; + tppn = msg_addr >> APLIC_xMSICFGADDR_PPN_SHIFT; + + /* Compute target HART Base PPN */ + tbppn = tppn; + tbppn &= ~APLIC_xMSICFGADDR_PPN_HART(mc->lhxs); + tbppn &= ~APLIC_xMSICFGADDR_PPN_LHX(mc->lhxw, mc->lhxs); + tbppn &= ~APLIC_xMSICFGADDR_PPN_HHX(mc->hhxw, mc->hhxs); + WARN_ON(tbppn != mc->base_ppn); + + /* Compute target group and hart indexes */ + group_index = (tppn >> APLIC_xMSICFGADDR_PPN_HHX_SHIFT(mc->hhxs)) & + APLIC_xMSICFGADDR_PPN_HHX_MASK(mc->hhxw); + hart_index = (tppn >> APLIC_xMSICFGADDR_PPN_LHX_SHIFT(mc->lhxs)) & + APLIC_xMSICFGADDR_PPN_LHX_MASK(mc->lhxw); + hart_index |= (group_index << mc->lhxw); + WARN_ON(hart_index > APLIC_TARGET_HART_IDX_MASK); + + /* Compute target guest index */ + guest_index = tppn & APLIC_xMSICFGADDR_PPN_HART(mc->lhxs); + WARN_ON(guest_index > APLIC_TARGET_GUEST_IDX_MASK); + + /* Update IRQ TARGET register */ + target = priv->regs + APLIC_TARGET_BASE; + target += (d->hwirq - 1) * sizeof(u32); + val = FIELD_PREP(APLIC_TARGET_HART_IDX, hart_index); + val |= FIELD_PREP(APLIC_TARGET_GUEST_IDX, guest_index); + val |= FIELD_PREP(APLIC_TARGET_EIID, msg->data); + writel(val, target); +} + +static void aplic_msi_set_desc(msi_alloc_info_t *arg, struct msi_desc *desc) +{ + arg->desc = desc; + arg->hwirq = (u32)desc->data.icookie.value; +} + +static int aplic_msi_translate(struct irq_domain *d, struct irq_fwspec *fwspec, + unsigned long *hwirq, unsigned int *type) +{ + struct msi_domain_info *info = d->host_data; + struct aplic_priv *priv = info->data; + + return aplic_irqdomain_translate(fwspec, priv->gsi_base, hwirq, type); +} + +static const struct msi_domain_template aplic_msi_template = { + .chip = { + .name = "APLIC-MSI", + .irq_mask = aplic_msi_irq_mask, + .irq_unmask = aplic_msi_irq_unmask, + .irq_set_type = aplic_irq_set_type, + .irq_eoi = aplic_msi_irq_eoi, +#ifdef CONFIG_SMP + .irq_set_affinity = irq_chip_set_affinity_parent, +#endif + .irq_write_msi_msg = aplic_msi_write_msg, + .flags = IRQCHIP_SET_TYPE_MASKED | + IRQCHIP_SKIP_SET_WAKE | + IRQCHIP_MASK_ON_SUSPEND, + }, + + .ops = { + .set_desc = aplic_msi_set_desc, + .msi_translate = aplic_msi_translate, + }, + + .info = { + .bus_token = DOMAIN_BUS_WIRED_TO_MSI, + .flags = MSI_FLAG_USE_DEV_FWNODE, + .handler = handle_fasteoi_irq, + .handler_name = "fasteoi", + }, +}; + +int aplic_msi_setup(struct device *dev, void __iomem *regs) +{ + const struct imsic_global_config *imsic_global; + struct aplic_priv *priv; + struct aplic_msicfg *mc; + phys_addr_t pa; + int rc; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + rc = aplic_setup_priv(priv, dev, regs); + if (rc) { + dev_err(dev, "failed to create APLIC context\n"); + return rc; + } + mc = &priv->msicfg; + + /* + * The APLIC outgoing MSI config registers assume target MSI + * controller to be RISC-V AIA IMSIC controller. + */ + imsic_global = imsic_get_global_config(); + if (!imsic_global) { + dev_err(dev, "IMSIC global config not found\n"); + return -ENODEV; + } + + /* Find number of guest index bits (LHXS) */ + mc->lhxs = imsic_global->guest_index_bits; + if (APLIC_xMSICFGADDRH_LHXS_MASK < mc->lhxs) { + dev_err(dev, "IMSIC guest index bits big for APLIC LHXS\n"); + return -EINVAL; + } + + /* Find number of HART index bits (LHXW) */ + mc->lhxw = imsic_global->hart_index_bits; + if (APLIC_xMSICFGADDRH_LHXW_MASK < mc->lhxw) { + dev_err(dev, "IMSIC hart index bits big for APLIC LHXW\n"); + return -EINVAL; + } + + /* Find number of group index bits (HHXW) */ + mc->hhxw = imsic_global->group_index_bits; + if (APLIC_xMSICFGADDRH_HHXW_MASK < mc->hhxw) { + dev_err(dev, "IMSIC group index bits big for APLIC HHXW\n"); + return -EINVAL; + } + + /* Find first bit position of group index (HHXS) */ + mc->hhxs = imsic_global->group_index_shift; + if (mc->hhxs < (2 * APLIC_xMSICFGADDR_PPN_SHIFT)) { + dev_err(dev, "IMSIC group index shift should be >= %d\n", + (2 * APLIC_xMSICFGADDR_PPN_SHIFT)); + return -EINVAL; + } + mc->hhxs -= (2 * APLIC_xMSICFGADDR_PPN_SHIFT); + if (APLIC_xMSICFGADDRH_HHXS_MASK < mc->hhxs) { + dev_err(dev, "IMSIC group index shift big for APLIC HHXS\n"); + return -EINVAL; + } + + /* Compute PPN base */ + mc->base_ppn = imsic_global->base_addr >> APLIC_xMSICFGADDR_PPN_SHIFT; + mc->base_ppn &= ~APLIC_xMSICFGADDR_PPN_HART(mc->lhxs); + mc->base_ppn &= ~APLIC_xMSICFGADDR_PPN_LHX(mc->lhxw, mc->lhxs); + mc->base_ppn &= ~APLIC_xMSICFGADDR_PPN_HHX(mc->hhxw, mc->hhxs); + + /* Setup global config and interrupt delivery */ + aplic_init_hw_global(priv, true); + + /* Set the APLIC device MSI domain if not available */ + if (!dev_get_msi_domain(dev)) { + /* + * The device MSI domain for OF devices is only set at the + * time of populating/creating OF device. If the device MSI + * domain is discovered later after the OF device is created + * then we need to set it explicitly before using any platform + * MSI functions. + * + * In case of APLIC device, the parent MSI domain is always + * IMSIC and the IMSIC MSI domains are created later through + * the platform driver probing so we set it explicitly here. + */ + if (is_of_node(dev->fwnode)) + of_msi_configure(dev, to_of_node(dev->fwnode)); + } + + if (!msi_create_device_irq_domain(dev, MSI_DEFAULT_DOMAIN, &aplic_msi_template, + priv->nr_irqs + 1, priv, priv)) { + dev_err(dev, "failed to create MSI irq domain\n"); + return -ENOMEM; + } + + /* Advertise the interrupt controller */ + pa = priv->msicfg.base_ppn << APLIC_xMSICFGADDR_PPN_SHIFT; + dev_info(dev, "%d interrupts forwared to MSI base %pa\n", priv->nr_irqs, &pa); + + return 0; +} -- 2.34.1