From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pf1-f170.google.com (mail-pf1-f170.google.com [209.85.210.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 01B8B26296 for ; Fri, 8 Mar 2024 09:46:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.170 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709891183; cv=none; b=t2q1vs0/WDqlw5jRprlMmM9y12vsfvUJWIi0ZobDW1fizlSBQ6f4GPjmLQazQHw6W39c+iwDeVKGKdVzyYz6nq+PjFj138GqgA0PVOfg+QlHrrBiy0Yr2/5MSKjUNvmVaCUo7Xox9K5iPBlo19mc8Fwt4qi6uggc4tz82Hsju8Q= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709891183; c=relaxed/simple; bh=Clqd8haJQgsPibeWAC6UKITH48izdvnBqHGXQt+95+w=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=UZmVfB3kS/xz/MtFWeZQNtQSc8ESjCNhysAjV0DGRy/L+S8Pig+OKiO3fTou1FNSUL8RSWxAgtmglAyjHrZ+LGhFxJ5Mb50fjK3iplPAFsndMaAMp3kqfgDC3CifgjFBev0Gn5laV8s0skbxVV4Odj8zAkE3wi1JnnKnf172OIo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=K1+FQYG1; arc=none smtp.client-ip=209.85.210.170 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="K1+FQYG1" Received: by mail-pf1-f170.google.com with SMTP id d2e1a72fcca58-6e649a2548cso594272b3a.3 for ; Fri, 08 Mar 2024 01:46:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709891180; x=1710495980; darn=vger.kernel.org; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date:from:to :cc:subject:date:message-id:reply-to; bh=kb10RNHzo2wWSlL+Eq4xCbaoA0z2rfpZzBo11/jnm6s=; b=K1+FQYG104NukSoFzZrIyWD9zmVz6yHjKl9boXxFMXquC1P8UJc1PpCuXVmeBAhJ1j jD4X8of89aJwqHpwM1+M4XrCMKfG3y95AvAr0ffctQQJpJPHtepfWLq7/55jZghMZdoX KeFmyCT4SThmdKGuZLhkNqqbzp7MCCwkcx4dg6R47D69yHBnmsZqnqnUtXWPl65/S0cK Y3wGOcH4k7mAIwCw7FozKJKwNIr9eznITx4McSR78HQtqsUey9kLfZoUnUt9MJzPIOs2 vrwEBf8s6L9K9uCCgD7YwfB+JiYJNJoP17EGIKgwOIzM/w1dboc2bq1hChjlOgqIijHq EB3Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709891180; x=1710495980; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=kb10RNHzo2wWSlL+Eq4xCbaoA0z2rfpZzBo11/jnm6s=; b=YHHriekwzkc6/PX2RveRng2PLXVqEexWuRbSWshRtfG7/1aXk/YNPZiF4oj1Rz5ROB zd4RH6CIUGtmy7HOm1XNZw5ZWWovVit/yg2P2f8sFUyTXHOC+xtJ4sdPPSKaAsNDzYea UytWTVzG8Jfyt2fJycxlfTr0mKZm1SWxkU74tqr6m1icFXPAlLOjubl3esTNmChVK/bv LDXHZssQuRq/yFzZ0Khil/Yvae7i/tIt38ZDyLOfQ095M617pC7b3kHAH+dQWCQOMWDk JgWELaKLBTZgvS585oio8axdFsOC9p73s8xfwdbohMoP4IuKqjKobXLNRbOfcDsyCmfc rnXA== X-Forwarded-Encrypted: i=1; AJvYcCWa5D5NK9ckML8vvp5QuGlTcPl7Tcc90MducAtUqOBsn/r120KYUIMXmZjiXnf4GYoKxNEYK5tdkTCv8Atl3pLXiTvKiw/uXkBiAK45qQ== X-Gm-Message-State: AOJu0YxITG4C8tgKOPHAuSpM26Uf+sNwsQxbdaRFeF0bS12mVpYXlAJj 9ZOvnJhWMpsZ5C3fIgKa03iBr11OZrX+slJaEakBysXnLR1di4/Bqa0U2QlJlg== X-Google-Smtp-Source: AGHT+IGXPjNBSO3LeLRdTU/J0WCodruRNnBcnx9KyvKHRlBNLyysXxdMvyc+ZcZRv6FpAgOfc5/pVw== X-Received: by 2002:a05:6a00:1301:b0:6e6:2dfd:602d with SMTP id j1-20020a056a00130100b006e62dfd602dmr15455121pfu.25.1709891180143; Fri, 08 Mar 2024 01:46:20 -0800 (PST) Received: from thinkpad ([117.217.183.232]) by smtp.gmail.com with ESMTPSA id x7-20020a056a00188700b006e64fdc6e69sm717499pfh.147.2024.03.08.01.46.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Mar 2024 01:46:19 -0800 (PST) Date: Fri, 8 Mar 2024 15:16:06 +0530 From: Manivannan Sadhasivam To: Niklas Cassel Cc: Jingoo Han , Gustavo Pimentel , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Marek Vasut , Yoshihiro Shimoda , Thierry Reding , Jonathan Hunter , Kishon Vijay Abraham I , Vidya Sagar , Vignesh Raghavendra , Richard Zhu , Lucas Stach , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Minghuan Lian , Mingkai Hu , Roy Zang , Kunihiko Hayashi , Masami Hiramatsu , Kishon Vijay Abraham I , Jesper Nilsson , Srikanth Thokala , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@axis.com Subject: Re: [PATCH v9 08/10] PCI: dwc: ep: Add a generic dw_pcie_ep_linkdown() API to handle LINK_DOWN event Message-ID: <20240308094606.GG3789@thinkpad> References: <20240304-pci-dbi-rework-v9-0-29d433d99cda@linaro.org> <20240304-pci-dbi-rework-v9-8-29d433d99cda@linaro.org> <20240308054152.GD3789@thinkpad> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Fri, Mar 08, 2024 at 09:56:33AM +0100, Niklas Cassel wrote: > On Fri, Mar 08, 2024 at 11:11:52AM +0530, Manivannan Sadhasivam wrote: > > On Thu, Mar 07, 2024 at 10:43:19PM +0100, Niklas Cassel wrote: > > > On Mon, Mar 04, 2024 at 02:52:20PM +0530, Manivannan Sadhasivam wrote: > > > > The PCIe link can go to LINK_DOWN state in one of the following scenarios: > > > > > > > > 1. Fundamental (PERST#)/hot/warm reset > > > > 2. Link transition from L2/L3 to L0 > > > > > > > > In those cases, LINK_DOWN causes some non-sticky DWC registers to loose the > > > > state (like REBAR, PTM_CAP etc...). So the drivers need to reinitialize > > > > them to function properly once the link comes back again. > > > > > > > > This is not a problem for drivers supporting PERST# IRQ, since they can > > > > reinitialize the registers in the PERST# IRQ callback. But for the drivers > > > > not supporting PERST#, there is no way they can reinitialize the registers > > > > other than relying on LINK_DOWN IRQ received when the link goes down. So > > > > let's add a DWC generic API dw_pcie_ep_linkdown() that reinitializes the > > > > non-sticky registers and also notifies the EPF drivers about link going > > > > down. > > > > > > > > This API can also be used by the drivers supporting PERST# to handle the > > > > scenario (2) mentioned above. > > > > > > > > Signed-off-by: Manivannan Sadhasivam > > > > --- > > > > drivers/pci/controller/dwc/pcie-designware-ep.c | 111 ++++++++++++++---------- > > > > drivers/pci/controller/dwc/pcie-designware.h | 5 ++ > > > > 2 files changed, 72 insertions(+), 44 deletions(-) > > > > > > > > diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c > > > > index 278bdc9b2269..fed4c2936c78 100644 > > > > --- a/drivers/pci/controller/dwc/pcie-designware-ep.c > > > > +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c > > > > @@ -14,14 +14,6 @@ > > > > #include > > > > #include > > > > > > > > -void dw_pcie_ep_linkup(struct dw_pcie_ep *ep) > > > > -{ > > > > - struct pci_epc *epc = ep->epc; > > > > - > > > > - pci_epc_linkup(epc); > > > > -} > > > > -EXPORT_SYMBOL_GPL(dw_pcie_ep_linkup); > > > > - > > > > void dw_pcie_ep_init_notify(struct dw_pcie_ep *ep) > > > > { > > > > struct pci_epc *epc = ep->epc; > > > > @@ -603,19 +595,56 @@ static unsigned int dw_pcie_ep_find_ext_capability(struct dw_pcie *pci, int cap) > > > > return 0; > > > > } > > > > > > > > +static void dw_pcie_ep_init_non_sticky_registers(struct dw_pcie *pci) > > > > +{ > > > > + unsigned int offset, ptm_cap_base; > > > > + unsigned int nbars; > > > > + u32 reg, i; > > > > + > > > > + offset = dw_pcie_ep_find_ext_capability(pci, PCI_EXT_CAP_ID_REBAR); > > > > + ptm_cap_base = dw_pcie_ep_find_ext_capability(pci, PCI_EXT_CAP_ID_PTM); > > > > + > > > > + dw_pcie_dbi_ro_wr_en(pci); > > > > + > > > > + if (offset) { > > > > + reg = dw_pcie_readl_dbi(pci, offset + PCI_REBAR_CTRL); > > > > + nbars = (reg & PCI_REBAR_CTRL_NBAR_MASK) >> > > > > + PCI_REBAR_CTRL_NBAR_SHIFT; > > > > + > > > > + for (i = 0; i < nbars; i++, offset += PCI_REBAR_CTRL) > > > > + dw_pcie_writel_dbi(pci, offset + PCI_REBAR_CAP, 0x0); > > > > > > If you look at PCI_REBAR_CAP, you will see that it is sticky, > > > but you have to actually read the databook to see that: > > > > > > "The RESBAR_CTRL_REG_BAR_SIZE field is automatically updated > > > when you write to RESBAR_CAP_REG_0_REG through the DBI." > > > > > > So the reason why we need to write this register, even though > > > it is sticky, is to update the RESBAR_CTRL_REG_BAR_SIZE register, > > > which is not sticky :) > > > > > > (Perhaps we should add that as a comment?) > > > > > > > Yeah, makes sense. > > Note that I add a (unrelated) comment related to REBAR_CAP in this patch: > https://lore.kernel.org/linux-pci/20240307111520.3303774-1-cassel@kernel.org/T/#u > > But once we move/add code to dw_pcie_ep_init_non_sticky_registers(), I think > that it might be a good "rule" to have a small comment for each write in > dw_pcie_ep_init_non_sticky_registers() which explains why the code should be > in dw_pcie_ep_init_non_sticky_registers() instead of dw_pcie_ep_init_registers(), > even if it just a small: > > /* Field PCI_XXX_YYY.ZZZ is non-sticky */ > writel_dbi(pci, offset + PCI_XXX_YYY, 0); > Why? The function name itself suggests that we are reinitializing non-sticky registers. So a comment for each write is overkill. - Mani -- மணிவண்ணன் சதாசிவம் From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2147AC54E4A for ; Fri, 8 Mar 2024 09:47:07 +0000 (UTC) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=xWDhVK17; dkim-atps=neutral Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4TrhCY5bwHz3vbq for ; Fri, 8 Mar 2024 20:47:05 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=xWDhVK17; dkim-atps=neutral Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=linaro.org (client-ip=2607:f8b0:4864:20::42b; helo=mail-pf1-x42b.google.com; envelope-from=manivannan.sadhasivam@linaro.org; receiver=lists.ozlabs.org) Received: from mail-pf1-x42b.google.com (mail-pf1-x42b.google.com [IPv6:2607:f8b0:4864:20::42b]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4TrhBk6vYQz2ysD for ; Fri, 8 Mar 2024 20:46:22 +1100 (AEDT) Received: by mail-pf1-x42b.google.com with SMTP id d2e1a72fcca58-6e5a50d91b4so593991b3a.2 for ; Fri, 08 Mar 2024 01:46:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709891180; x=1710495980; darn=lists.ozlabs.org; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date:from:to :cc:subject:date:message-id:reply-to; bh=kb10RNHzo2wWSlL+Eq4xCbaoA0z2rfpZzBo11/jnm6s=; b=xWDhVK17VZ33cjLxQUkjCmKA9h+1QmL9FqZYlTBC59bfyegCVEgySL1+Qs6KHpMrgv hwKUnPW3Q30hkkVb5neTrVTxvGiaZLFaftR1NGoBuWkf+S60nm6bgDGSJRXPBPk8Jfn6 mBxrZxdiON5GGftImlQ/SQSVix4dJo7xLVK9VmbM+E5lLScdW7ICml/w3HWxH0aRj7L4 X7/2dL4HWapmWSu3uhsBgM+0/4Wza/SB+X7aFLQAJkZCul2Sv8WwZgGzXm8XzwcO9x+e k90RAYfqXiEDWpK+ywJU70OsdcmU9lcrBwzwu1Ig+QL8aPZesc5FRNXd9RJeCw0iO9sd cS/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709891180; x=1710495980; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=kb10RNHzo2wWSlL+Eq4xCbaoA0z2rfpZzBo11/jnm6s=; b=e0lf6bAOmNa0ULWazKmB0nJFavjHqc0URNn6fIzCvOwZ5N4KGkFwlOACvS4psdt6Ko hPoVdKMQCbf6rpj6MBAqJ9hukVWmNMItQLkxnox82s6SQM7STZWrfrO1mkwE9cnbeNFv FxnFGUz1w+d5lpn2dG1qWh/qPXBQC45IEs6pwGl5+/Z+N6Luug+Bw623t4W4uWZLPwDn 0mZ6Hti57/yGSqKgj1JXGt/mCS1xvUn/nZni1mM4lM4M6sXAZabmhXb4lvCDZPwcQskM dZyjMSUGtlG1EGx8ubv5reu3vCTO0asjWgxJM2pm2xKCY4L83yZOFiiBV2tsbHdSQTTU qeaw== X-Forwarded-Encrypted: i=1; AJvYcCUgGqVOZuLL5dCdsiF6NemuqyexfuuDjGpnJAZloaleePwZncAScXqRYv0CB0w754K/8mCeycaIzWuxXfn9Bazqx4HN3rx3A/KRgO/Q0g== X-Gm-Message-State: AOJu0YyXTeJb1yjccVSb1KGHL4QAmjTZ5hJgsmYl85r4S896ri+wVftP 3by5swUjNfSLfbadQQ/FSP/5qOsIX1bdQuwRAZwHLKuJaQTi5np1fHCSQ+0beA== X-Google-Smtp-Source: AGHT+IGXPjNBSO3LeLRdTU/J0WCodruRNnBcnx9KyvKHRlBNLyysXxdMvyc+ZcZRv6FpAgOfc5/pVw== X-Received: by 2002:a05:6a00:1301:b0:6e6:2dfd:602d with SMTP id j1-20020a056a00130100b006e62dfd602dmr15455121pfu.25.1709891180143; Fri, 08 Mar 2024 01:46:20 -0800 (PST) Received: from thinkpad ([117.217.183.232]) by smtp.gmail.com with ESMTPSA id x7-20020a056a00188700b006e64fdc6e69sm717499pfh.147.2024.03.08.01.46.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Mar 2024 01:46:19 -0800 (PST) Date: Fri, 8 Mar 2024 15:16:06 +0530 From: Manivannan Sadhasivam To: Niklas Cassel Subject: Re: [PATCH v9 08/10] PCI: dwc: ep: Add a generic dw_pcie_ep_linkdown() API to handle LINK_DOWN event Message-ID: <20240308094606.GG3789@thinkpad> References: <20240304-pci-dbi-rework-v9-0-29d433d99cda@linaro.org> <20240304-pci-dbi-rework-v9-8-29d433d99cda@linaro.org> <20240308054152.GD3789@thinkpad> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Vignesh Raghavendra , Kunihiko Hayashi , linux-pci@vger.kernel.org, Lorenzo Pieralisi , Minghuan Lian , Thierry Reding , Kishon Vijay Abraham I , Fabio Estevam , Marek Vasut , Kishon Vijay Abraham I , Rob Herring , Jesper Nilsson , linux-tegra@vger.kernel.org, linux-arm-kernel@axis.com, Jonathan Hunter , NXP Linux Team , Richard Zhu , Srikanth Thokala , linux-arm-msm@vger.kernel.org, Sascha Hauer , linuxppc-dev@lists.ozlabs.org, Bjorn Helgaas , linux-omap@vger.kernel.org, Mingkai Hu , linux-arm-kernel@lists.infradead.org, Roy Zang , Jingoo Han , Yoshihiro Shimoda , linux-kernel@vger.kernel.org, Vidya Sagar , linux-renesas-soc@vger.kernel.org, Masami Hiramatsu , Pengutronix Kernel Team , Gustavo Pimentel , Shawn Guo , Lucas Stach Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Fri, Mar 08, 2024 at 09:56:33AM +0100, Niklas Cassel wrote: > On Fri, Mar 08, 2024 at 11:11:52AM +0530, Manivannan Sadhasivam wrote: > > On Thu, Mar 07, 2024 at 10:43:19PM +0100, Niklas Cassel wrote: > > > On Mon, Mar 04, 2024 at 02:52:20PM +0530, Manivannan Sadhasivam wrote: > > > > The PCIe link can go to LINK_DOWN state in one of the following scenarios: > > > > > > > > 1. Fundamental (PERST#)/hot/warm reset > > > > 2. Link transition from L2/L3 to L0 > > > > > > > > In those cases, LINK_DOWN causes some non-sticky DWC registers to loose the > > > > state (like REBAR, PTM_CAP etc...). So the drivers need to reinitialize > > > > them to function properly once the link comes back again. > > > > > > > > This is not a problem for drivers supporting PERST# IRQ, since they can > > > > reinitialize the registers in the PERST# IRQ callback. But for the drivers > > > > not supporting PERST#, there is no way they can reinitialize the registers > > > > other than relying on LINK_DOWN IRQ received when the link goes down. So > > > > let's add a DWC generic API dw_pcie_ep_linkdown() that reinitializes the > > > > non-sticky registers and also notifies the EPF drivers about link going > > > > down. > > > > > > > > This API can also be used by the drivers supporting PERST# to handle the > > > > scenario (2) mentioned above. > > > > > > > > Signed-off-by: Manivannan Sadhasivam > > > > --- > > > > drivers/pci/controller/dwc/pcie-designware-ep.c | 111 ++++++++++++++---------- > > > > drivers/pci/controller/dwc/pcie-designware.h | 5 ++ > > > > 2 files changed, 72 insertions(+), 44 deletions(-) > > > > > > > > diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c > > > > index 278bdc9b2269..fed4c2936c78 100644 > > > > --- a/drivers/pci/controller/dwc/pcie-designware-ep.c > > > > +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c > > > > @@ -14,14 +14,6 @@ > > > > #include > > > > #include > > > > > > > > -void dw_pcie_ep_linkup(struct dw_pcie_ep *ep) > > > > -{ > > > > - struct pci_epc *epc = ep->epc; > > > > - > > > > - pci_epc_linkup(epc); > > > > -} > > > > -EXPORT_SYMBOL_GPL(dw_pcie_ep_linkup); > > > > - > > > > void dw_pcie_ep_init_notify(struct dw_pcie_ep *ep) > > > > { > > > > struct pci_epc *epc = ep->epc; > > > > @@ -603,19 +595,56 @@ static unsigned int dw_pcie_ep_find_ext_capability(struct dw_pcie *pci, int cap) > > > > return 0; > > > > } > > > > > > > > +static void dw_pcie_ep_init_non_sticky_registers(struct dw_pcie *pci) > > > > +{ > > > > + unsigned int offset, ptm_cap_base; > > > > + unsigned int nbars; > > > > + u32 reg, i; > > > > + > > > > + offset = dw_pcie_ep_find_ext_capability(pci, PCI_EXT_CAP_ID_REBAR); > > > > + ptm_cap_base = dw_pcie_ep_find_ext_capability(pci, PCI_EXT_CAP_ID_PTM); > > > > + > > > > + dw_pcie_dbi_ro_wr_en(pci); > > > > + > > > > + if (offset) { > > > > + reg = dw_pcie_readl_dbi(pci, offset + PCI_REBAR_CTRL); > > > > + nbars = (reg & PCI_REBAR_CTRL_NBAR_MASK) >> > > > > + PCI_REBAR_CTRL_NBAR_SHIFT; > > > > + > > > > + for (i = 0; i < nbars; i++, offset += PCI_REBAR_CTRL) > > > > + dw_pcie_writel_dbi(pci, offset + PCI_REBAR_CAP, 0x0); > > > > > > If you look at PCI_REBAR_CAP, you will see that it is sticky, > > > but you have to actually read the databook to see that: > > > > > > "The RESBAR_CTRL_REG_BAR_SIZE field is automatically updated > > > when you write to RESBAR_CAP_REG_0_REG through the DBI." > > > > > > So the reason why we need to write this register, even though > > > it is sticky, is to update the RESBAR_CTRL_REG_BAR_SIZE register, > > > which is not sticky :) > > > > > > (Perhaps we should add that as a comment?) > > > > > > > Yeah, makes sense. > > Note that I add a (unrelated) comment related to REBAR_CAP in this patch: > https://lore.kernel.org/linux-pci/20240307111520.3303774-1-cassel@kernel.org/T/#u > > But once we move/add code to dw_pcie_ep_init_non_sticky_registers(), I think > that it might be a good "rule" to have a small comment for each write in > dw_pcie_ep_init_non_sticky_registers() which explains why the code should be > in dw_pcie_ep_init_non_sticky_registers() instead of dw_pcie_ep_init_registers(), > even if it just a small: > > /* Field PCI_XXX_YYY.ZZZ is non-sticky */ > writel_dbi(pci, offset + PCI_XXX_YYY, 0); > Why? The function name itself suggests that we are reinitializing non-sticky registers. So a comment for each write is overkill. - Mani -- மணிவண்ணன் சதாசிவம் From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5755AC54E4A for ; Fri, 8 Mar 2024 09:46:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=rRzqni+x2EjWFQz/yhIrt7zAg5ui2kPbOQ3M1VjUIVw=; b=Cq/woHw7lNgt3I LiNUHiaYvibNX7RCOa5M+sYxDyUeympsTeuCb6DrjrhQvQuXNKe17v4sUM8zV82PhuJTyk1cLcXLB /ZVZas1XKFH1nLion6aL8uwY8gTqnPY8G8p5y76ijMeYefcBAwbEu2iF438l6VBY9N77xln4nfoMz qxFFE8NBNjlZ5PylVzvCBZjiFf593X9Qtj6edzI/eRv4tsZ3OGzO4b177fgw057y3w+DotHlWBLIa 8VlENcTWNlgM45jvifFCMH/fMB2sl/TK2eQD2sEY/vvNAGiHZhtqONAzL7o8yIpDusPeWSJXEHip0 FYGMuGDW4J8nNynxa1Hw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1riWo7-00000008ci5-0eqw; Fri, 08 Mar 2024 09:46:27 +0000 Received: from mail-pf1-x42d.google.com ([2607:f8b0:4864:20::42d]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1riWo4-00000008chZ-0I0G for linux-arm-kernel@lists.infradead.org; Fri, 08 Mar 2024 09:46:25 +0000 Received: by mail-pf1-x42d.google.com with SMTP id d2e1a72fcca58-6e649a2548cso594268b3a.3 for ; Fri, 08 Mar 2024 01:46:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709891180; x=1710495980; darn=lists.infradead.org; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date:from:to :cc:subject:date:message-id:reply-to; bh=kb10RNHzo2wWSlL+Eq4xCbaoA0z2rfpZzBo11/jnm6s=; b=OOonGzSdedEAPmX5fQdOoOX+qnDQxlhTrGODzmck+j2kYVwixQwaDtAL3p2Ds2E2Kr nQ6c2xRB0v2Q9hbmMXnyUyKsGbCjzyquMrgFKyGamE4qi3cPd6hK2blcSewQrEtYEKrW lW3ViO7ZX1z7wNSq1+8fGF+Q5zJm5qsw9MLeJyuwNrSMMaOszio+JGpCbgV+86HcCagi kLYLKUlKJ3cCg7q6LgoqrTNdQJEFF+Q5h1CGoMym1eOhmp6cStopdwTWEr6gp2t32Cy8 Mmm/aknRYcgdolZr/OC6z51xIFml0JgTzn92frOQb3fSkMWWZBJ6sfkoz5Iy4OOSyHUE Xt6g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709891180; x=1710495980; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=kb10RNHzo2wWSlL+Eq4xCbaoA0z2rfpZzBo11/jnm6s=; b=Pf6oIWdzXx4PmWz6jKhKG4S04SUUyc7zMYAS0dSKAjc9fTQd1zFAwP/yaB2h+Y9Use GdqsJ1ARjTBG2dJH7j5j65mWNaMwIld/y/jueo7TcGD3Pl0i0EDF3RFx4/RUEVsiYq+2 kaOwc/nESB9Rdvh74JKOLSe3SRIsuJZgSzPU7Ugg/bqMxtSugQ/Xt5nZ20H7zf3Ahavp oItY6ly47WhByAQWuddpVoQWrH4I3qV6Twnq3+Kgt45EX3TmD4ZW6UylSri9IUfM+JJL 4oc78o7fNxpKLqcj/tB3AK34KaLE7rbbyP6OFPWtgSVjLTjMd7JCVp8vte5Maefmvj+K dS8Q== X-Forwarded-Encrypted: i=1; AJvYcCVXcWy/gioZAp4H92tAi03kNTz2y3VEKAh6c6CEUFfqDzvzSftrTpvgJIU24zvRFlSiVwHEuee9EC32GUI/xm6LWUkRkO+DVCbHau4JPmIU27vMiKk= X-Gm-Message-State: AOJu0Yz7y5ltuo1as55rRT2xL66PKdvkQ+2Xw5YSwFwROzHcF027tfn+ xw3GrN4dT1YCdXJQ33JFydOkPCK3TBuyOqUv4UCIZ6JaVtwizMheqKDgZ3ZZfQ== X-Google-Smtp-Source: AGHT+IGXPjNBSO3LeLRdTU/J0WCodruRNnBcnx9KyvKHRlBNLyysXxdMvyc+ZcZRv6FpAgOfc5/pVw== X-Received: by 2002:a05:6a00:1301:b0:6e6:2dfd:602d with SMTP id j1-20020a056a00130100b006e62dfd602dmr15455121pfu.25.1709891180143; Fri, 08 Mar 2024 01:46:20 -0800 (PST) Received: from thinkpad ([117.217.183.232]) by smtp.gmail.com with ESMTPSA id x7-20020a056a00188700b006e64fdc6e69sm717499pfh.147.2024.03.08.01.46.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Mar 2024 01:46:19 -0800 (PST) Date: Fri, 8 Mar 2024 15:16:06 +0530 From: Manivannan Sadhasivam To: Niklas Cassel Cc: Jingoo Han , Gustavo Pimentel , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Marek Vasut , Yoshihiro Shimoda , Thierry Reding , Jonathan Hunter , Kishon Vijay Abraham I , Vidya Sagar , Vignesh Raghavendra , Richard Zhu , Lucas Stach , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Minghuan Lian , Mingkai Hu , Roy Zang , Kunihiko Hayashi , Masami Hiramatsu , Kishon Vijay Abraham I , Jesper Nilsson , Srikanth Thokala , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@axis.com Subject: Re: [PATCH v9 08/10] PCI: dwc: ep: Add a generic dw_pcie_ep_linkdown() API to handle LINK_DOWN event Message-ID: <20240308094606.GG3789@thinkpad> References: <20240304-pci-dbi-rework-v9-0-29d433d99cda@linaro.org> <20240304-pci-dbi-rework-v9-8-29d433d99cda@linaro.org> <20240308054152.GD3789@thinkpad> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240308_014624_143253_CEE62372 X-CRM114-Status: GOOD ( 41.81 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org T24gRnJpLCBNYXIgMDgsIDIwMjQgYXQgMDk6NTY6MzNBTSArMDEwMCwgTmlrbGFzIENhc3NlbCB3 cm90ZToKPiBPbiBGcmksIE1hciAwOCwgMjAyNCBhdCAxMToxMTo1MkFNICswNTMwLCBNYW5pdmFu bmFuIFNhZGhhc2l2YW0gd3JvdGU6Cj4gPiBPbiBUaHUsIE1hciAwNywgMjAyNCBhdCAxMDo0Mzox OVBNICswMTAwLCBOaWtsYXMgQ2Fzc2VsIHdyb3RlOgo+ID4gPiBPbiBNb24sIE1hciAwNCwgMjAy NCBhdCAwMjo1MjoyMFBNICswNTMwLCBNYW5pdmFubmFuIFNhZGhhc2l2YW0gd3JvdGU6Cj4gPiA+ ID4gVGhlIFBDSWUgbGluayBjYW4gZ28gdG8gTElOS19ET1dOIHN0YXRlIGluIG9uZSBvZiB0aGUg Zm9sbG93aW5nIHNjZW5hcmlvczoKPiA+ID4gPiAKPiA+ID4gPiAxLiBGdW5kYW1lbnRhbCAoUEVS U1QjKS9ob3Qvd2FybSByZXNldAo+ID4gPiA+IDIuIExpbmsgdHJhbnNpdGlvbiBmcm9tIEwyL0wz IHRvIEwwCj4gPiA+ID4gCj4gPiA+ID4gSW4gdGhvc2UgY2FzZXMsIExJTktfRE9XTiBjYXVzZXMg c29tZSBub24tc3RpY2t5IERXQyByZWdpc3RlcnMgdG8gbG9vc2UgdGhlCj4gPiA+ID4gc3RhdGUg KGxpa2UgUkVCQVIsIFBUTV9DQVAgZXRjLi4uKS4gU28gdGhlIGRyaXZlcnMgbmVlZCB0byByZWlu aXRpYWxpemUKPiA+ID4gPiB0aGVtIHRvIGZ1bmN0aW9uIHByb3Blcmx5IG9uY2UgdGhlIGxpbmsg Y29tZXMgYmFjayBhZ2Fpbi4KPiA+ID4gPiAKPiA+ID4gPiBUaGlzIGlzIG5vdCBhIHByb2JsZW0g Zm9yIGRyaXZlcnMgc3VwcG9ydGluZyBQRVJTVCMgSVJRLCBzaW5jZSB0aGV5IGNhbgo+ID4gPiA+ IHJlaW5pdGlhbGl6ZSB0aGUgcmVnaXN0ZXJzIGluIHRoZSBQRVJTVCMgSVJRIGNhbGxiYWNrLiBC dXQgZm9yIHRoZSBkcml2ZXJzCj4gPiA+ID4gbm90IHN1cHBvcnRpbmcgUEVSU1QjLCB0aGVyZSBp cyBubyB3YXkgdGhleSBjYW4gcmVpbml0aWFsaXplIHRoZSByZWdpc3RlcnMKPiA+ID4gPiBvdGhl ciB0aGFuIHJlbHlpbmcgb24gTElOS19ET1dOIElSUSByZWNlaXZlZCB3aGVuIHRoZSBsaW5rIGdv ZXMgZG93bi4gU28KPiA+ID4gPiBsZXQncyBhZGQgYSBEV0MgZ2VuZXJpYyBBUEkgZHdfcGNpZV9l cF9saW5rZG93bigpIHRoYXQgcmVpbml0aWFsaXplcyB0aGUKPiA+ID4gPiBub24tc3RpY2t5IHJl Z2lzdGVycyBhbmQgYWxzbyBub3RpZmllcyB0aGUgRVBGIGRyaXZlcnMgYWJvdXQgbGluayBnb2lu Zwo+ID4gPiA+IGRvd24uCj4gPiA+ID4gCj4gPiA+ID4gVGhpcyBBUEkgY2FuIGFsc28gYmUgdXNl ZCBieSB0aGUgZHJpdmVycyBzdXBwb3J0aW5nIFBFUlNUIyB0byBoYW5kbGUgdGhlCj4gPiA+ID4g c2NlbmFyaW8gKDIpIG1lbnRpb25lZCBhYm92ZS4KPiA+ID4gPiAKPiA+ID4gPiBTaWduZWQtb2Zm LWJ5OiBNYW5pdmFubmFuIFNhZGhhc2l2YW0gPG1hbml2YW5uYW4uc2FkaGFzaXZhbUBsaW5hcm8u b3JnPgo+ID4gPiA+IC0tLQo+ID4gPiA+ICBkcml2ZXJzL3BjaS9jb250cm9sbGVyL2R3Yy9wY2ll LWRlc2lnbndhcmUtZXAuYyB8IDExMSArKysrKysrKysrKysrKy0tLS0tLS0tLS0KPiA+ID4gPiAg ZHJpdmVycy9wY2kvY29udHJvbGxlci9kd2MvcGNpZS1kZXNpZ253YXJlLmggICAgfCAgIDUgKysK PiA+ID4gPiAgMiBmaWxlcyBjaGFuZ2VkLCA3MiBpbnNlcnRpb25zKCspLCA0NCBkZWxldGlvbnMo LSkKPiA+ID4gPiAKPiA+ID4gPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9wY2kvY29udHJvbGxlci9k d2MvcGNpZS1kZXNpZ253YXJlLWVwLmMgYi9kcml2ZXJzL3BjaS9jb250cm9sbGVyL2R3Yy9wY2ll LWRlc2lnbndhcmUtZXAuYwo+ID4gPiA+IGluZGV4IDI3OGJkYzliMjI2OS4uZmVkNGMyOTM2Yzc4 IDEwMDY0NAo+ID4gPiA+IC0tLSBhL2RyaXZlcnMvcGNpL2NvbnRyb2xsZXIvZHdjL3BjaWUtZGVz aWdud2FyZS1lcC5jCj4gPiA+ID4gKysrIGIvZHJpdmVycy9wY2kvY29udHJvbGxlci9kd2MvcGNp ZS1kZXNpZ253YXJlLWVwLmMKPiA+ID4gPiBAQCAtMTQsMTQgKzE0LDYgQEAKPiA+ID4gPiAgI2lu Y2x1ZGUgPGxpbnV4L3BjaS1lcGMuaD4KPiA+ID4gPiAgI2luY2x1ZGUgPGxpbnV4L3BjaS1lcGYu aD4KPiA+ID4gPiAgCj4gPiA+ID4gLXZvaWQgZHdfcGNpZV9lcF9saW5rdXAoc3RydWN0IGR3X3Bj aWVfZXAgKmVwKQo+ID4gPiA+IC17Cj4gPiA+ID4gLQlzdHJ1Y3QgcGNpX2VwYyAqZXBjID0gZXAt PmVwYzsKPiA+ID4gPiAtCj4gPiA+ID4gLQlwY2lfZXBjX2xpbmt1cChlcGMpOwo+ID4gPiA+IC19 Cj4gPiA+ID4gLUVYUE9SVF9TWU1CT0xfR1BMKGR3X3BjaWVfZXBfbGlua3VwKTsKPiA+ID4gPiAt Cj4gPiA+ID4gIHZvaWQgZHdfcGNpZV9lcF9pbml0X25vdGlmeShzdHJ1Y3QgZHdfcGNpZV9lcCAq ZXApCj4gPiA+ID4gIHsKPiA+ID4gPiAgCXN0cnVjdCBwY2lfZXBjICplcGMgPSBlcC0+ZXBjOwo+ ID4gPiA+IEBAIC02MDMsMTkgKzU5NSw1NiBAQCBzdGF0aWMgdW5zaWduZWQgaW50IGR3X3BjaWVf ZXBfZmluZF9leHRfY2FwYWJpbGl0eShzdHJ1Y3QgZHdfcGNpZSAqcGNpLCBpbnQgY2FwKQo+ID4g PiA+ICAJcmV0dXJuIDA7Cj4gPiA+ID4gIH0KPiA+ID4gPiAgCj4gPiA+ID4gK3N0YXRpYyB2b2lk IGR3X3BjaWVfZXBfaW5pdF9ub25fc3RpY2t5X3JlZ2lzdGVycyhzdHJ1Y3QgZHdfcGNpZSAqcGNp KQo+ID4gPiA+ICt7Cj4gPiA+ID4gKwl1bnNpZ25lZCBpbnQgb2Zmc2V0LCBwdG1fY2FwX2Jhc2U7 Cj4gPiA+ID4gKwl1bnNpZ25lZCBpbnQgbmJhcnM7Cj4gPiA+ID4gKwl1MzIgcmVnLCBpOwo+ID4g PiA+ICsKPiA+ID4gPiArCW9mZnNldCA9IGR3X3BjaWVfZXBfZmluZF9leHRfY2FwYWJpbGl0eShw Y2ksIFBDSV9FWFRfQ0FQX0lEX1JFQkFSKTsKPiA+ID4gPiArCXB0bV9jYXBfYmFzZSA9IGR3X3Bj aWVfZXBfZmluZF9leHRfY2FwYWJpbGl0eShwY2ksIFBDSV9FWFRfQ0FQX0lEX1BUTSk7Cj4gPiA+ ID4gKwo+ID4gPiA+ICsJZHdfcGNpZV9kYmlfcm9fd3JfZW4ocGNpKTsKPiA+ID4gPiArCj4gPiA+ ID4gKwlpZiAob2Zmc2V0KSB7Cj4gPiA+ID4gKwkJcmVnID0gZHdfcGNpZV9yZWFkbF9kYmkocGNp LCBvZmZzZXQgKyBQQ0lfUkVCQVJfQ1RSTCk7Cj4gPiA+ID4gKwkJbmJhcnMgPSAocmVnICYgUENJ X1JFQkFSX0NUUkxfTkJBUl9NQVNLKSA+Pgo+ID4gPiA+ICsJCQlQQ0lfUkVCQVJfQ1RSTF9OQkFS X1NISUZUOwo+ID4gPiA+ICsKPiA+ID4gPiArCQlmb3IgKGkgPSAwOyBpIDwgbmJhcnM7IGkrKywg b2Zmc2V0ICs9IFBDSV9SRUJBUl9DVFJMKQo+ID4gPiA+ICsJCQlkd19wY2llX3dyaXRlbF9kYmko cGNpLCBvZmZzZXQgKyBQQ0lfUkVCQVJfQ0FQLCAweDApOwo+ID4gPiAKPiA+ID4gSWYgeW91IGxv b2sgYXQgUENJX1JFQkFSX0NBUCwgeW91IHdpbGwgc2VlIHRoYXQgaXQgaXMgc3RpY2t5LAo+ID4g PiBidXQgeW91IGhhdmUgdG8gYWN0dWFsbHkgcmVhZCB0aGUgZGF0YWJvb2sgdG8gc2VlIHRoYXQ6 Cj4gPiA+IAo+ID4gPiAiVGhlIFJFU0JBUl9DVFJMX1JFR19CQVJfU0laRSBmaWVsZCBpcyBhdXRv bWF0aWNhbGx5IHVwZGF0ZWQKPiA+ID4gd2hlbiB5b3Ugd3JpdGUgdG8gUkVTQkFSX0NBUF9SRUdf MF9SRUcgdGhyb3VnaCB0aGUgREJJLiIKPiA+ID4gCj4gPiA+IFNvIHRoZSByZWFzb24gd2h5IHdl IG5lZWQgdG8gd3JpdGUgdGhpcyByZWdpc3RlciwgZXZlbiB0aG91Z2gKPiA+ID4gaXQgaXMgc3Rp Y2t5LCBpcyB0byB1cGRhdGUgdGhlIFJFU0JBUl9DVFJMX1JFR19CQVJfU0laRSByZWdpc3RlciwK PiA+ID4gd2hpY2ggaXMgbm90IHN0aWNreSA6KQo+ID4gPiAKPiA+ID4gKFBlcmhhcHMgd2Ugc2hv dWxkIGFkZCB0aGF0IGFzIGEgY29tbWVudD8pCj4gPiA+IAo+ID4gCj4gPiBZZWFoLCBtYWtlcyBz ZW5zZS4KPiAKPiBOb3RlIHRoYXQgSSBhZGQgYSAodW5yZWxhdGVkKSBjb21tZW50IHJlbGF0ZWQg dG8gUkVCQVJfQ0FQIGluIHRoaXMgcGF0Y2g6Cj4gaHR0cHM6Ly9sb3JlLmtlcm5lbC5vcmcvbGlu dXgtcGNpLzIwMjQwMzA3MTExNTIwLjMzMDM3NzQtMS1jYXNzZWxAa2VybmVsLm9yZy9ULyN1Cj4g Cj4gQnV0IG9uY2Ugd2UgbW92ZS9hZGQgY29kZSB0byBkd19wY2llX2VwX2luaXRfbm9uX3N0aWNr eV9yZWdpc3RlcnMoKSwgSSB0aGluawo+IHRoYXQgaXQgbWlnaHQgYmUgYSBnb29kICJydWxlIiB0 byBoYXZlIGEgc21hbGwgY29tbWVudCBmb3IgZWFjaCB3cml0ZSBpbgo+IGR3X3BjaWVfZXBfaW5p dF9ub25fc3RpY2t5X3JlZ2lzdGVycygpIHdoaWNoIGV4cGxhaW5zIHdoeSB0aGUgY29kZSBzaG91 bGQgYmUKPiBpbiBkd19wY2llX2VwX2luaXRfbm9uX3N0aWNreV9yZWdpc3RlcnMoKSBpbnN0ZWFk IG9mIGR3X3BjaWVfZXBfaW5pdF9yZWdpc3RlcnMoKSwKPiBldmVuIGlmIGl0IGp1c3QgYSBzbWFs bDoKPiAKPiAvKiBGaWVsZCBQQ0lfWFhYX1lZWS5aWlogaXMgbm9uLXN0aWNreSAqLwo+IHdyaXRl bF9kYmkocGNpLCBvZmZzZXQgKyBQQ0lfWFhYX1lZWSwgMCk7Cj4gCgpXaHk/IFRoZSBmdW5jdGlv biBuYW1lIGl0c2VsZiBzdWdnZXN0cyB0aGF0IHdlIGFyZSByZWluaXRpYWxpemluZyBub24tc3Rp Y2t5CnJlZ2lzdGVycy4gU28gYSBjb21tZW50IGZvciBlYWNoIHdyaXRlIGlzIG92ZXJraWxsLgoK LSBNYW5pCgotLSAK4K6u4K6j4K6/4K614K6j4K+N4K6j4K6p4K+NIOCumuCupOCuvuCumuCuv+Cu teCuruCvjQoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18K bGludXgtYXJtLWtlcm5lbCBtYWlsaW5nIGxpc3QKbGludXgtYXJtLWtlcm5lbEBsaXN0cy5pbmZy YWRlYWQub3JnCmh0dHA6Ly9saXN0cy5pbmZyYWRlYWQub3JnL21haWxtYW4vbGlzdGluZm8vbGlu dXgtYXJtLWtlcm5lbAo=