All of lore.kernel.org
 help / color / mirror / Atom feed
From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
To: qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com,
	bmeng@tinylab.org, liwei1518@gmail.com,
	zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com,
	max.chou@sifive.com, richard.henderson@linaro.org,
	Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Subject: [PATCH for 9.0 v15 00/10] target/riscv: vector fixes
Date: Thu, 14 Mar 2024 14:56:54 -0300	[thread overview]
Message-ID: <20240314175704.478276-1-dbarboza@ventanamicro.com> (raw)

Hi,

The series was renamed to reflect that at this point we're fixing more
things than just vstart management.

In this new version a couple fixes were added:

- patch 3 (new) fixes the memcpy endianess in 'vmvr_v', as suggested by
  Richard;

- patch 5 (new) fixes ldst_whole insns to now clear vstart in all cases.
  The fix was proposed by Max.

Another notable change was made in patch 6 (patch 4 from v14). We're not
doing early exits in helpers that are gated by vstart_eq_zero. This was
found to cause side-effects with insns that wants to send faults if vl =
0, and for the rest it becomes a moot check since vstart is granted to
be zero beforehand.

Series based on master.

Patches missing acks: 3, 4, 5

Changes from v14:
- patch 3 (new):
  - make 'vmvr_v' big endian compliant
- patch 5 (new):
  - make ldst_whole insns clear vstart in all code paths
- patch 6 (patch 4 from v14):
  - do not add early exits on helpers that are gated with vstart_eq_zero
- v14 link: https://lore.kernel.org/qemu-riscv/20240313220141.427730-1-dbarboza@ventanamicro.com/

Daniel Henrique Barboza (9):
  target/riscv/vector_helper.c: set vstart = 0 in GEN_VEXT_VSLIDEUP_VX()
  trans_rvv.c.inc: set vstart = 0 in int scalar move insns
  target/riscv/vector_helper.c: fix 'vmvr_v' memcpy endianess
  target/riscv: always clear vstart in whole vec move insns
  target/riscv: always clear vstart for ldst_whole insns
  target/riscv/vector_helpers: do early exit when vstart >= vl
  target/riscv: remove 'over' brconds from vector trans
  trans_rvv.c.inc: remove redundant mark_vs_dirty() calls
  target/riscv/vector_helper.c: optimize loops in ldst helpers

Ivan Klokov (1):
  target/riscv: enable 'vstart_eq_zero' in the end of insns

 target/riscv/insn_trans/trans_rvbf16.c.inc |  18 +-
 target/riscv/insn_trans/trans_rvv.c.inc    | 244 ++++++---------------
 target/riscv/insn_trans/trans_rvvk.c.inc   |  30 +--
 target/riscv/translate.c                   |   6 +
 target/riscv/vcrypto_helper.c              |  32 +++
 target/riscv/vector_helper.c               |  93 +++++++-
 target/riscv/vector_internals.c            |   4 +
 target/riscv/vector_internals.h            |   9 +
 8 files changed, 220 insertions(+), 216 deletions(-)

-- 
2.44.0



             reply	other threads:[~2024-03-14 17:57 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-14 17:56 Daniel Henrique Barboza [this message]
2024-03-14 17:56 ` [PATCH for 9.0 v15 01/10] target/riscv/vector_helper.c: set vstart = 0 in GEN_VEXT_VSLIDEUP_VX() Daniel Henrique Barboza
2024-03-19  0:52   ` LIU Zhiwei
2024-03-14 17:56 ` [PATCH for 9.0 v15 02/10] trans_rvv.c.inc: set vstart = 0 in int scalar move insns Daniel Henrique Barboza
2024-03-18  8:30   ` Alistair Francis
2024-03-19  0:56   ` LIU Zhiwei
2024-03-14 17:56 ` [PATCH for 9.0 v15 03/10] target/riscv/vector_helper.c: fix 'vmvr_v' memcpy endianess Daniel Henrique Barboza
2024-03-15  7:41   ` Richard Henderson
2024-03-18  8:43   ` Alistair Francis
2024-03-19  7:52   ` LIU Zhiwei
2024-03-14 17:56 ` [PATCH for 9.0 v15 04/10] target/riscv: always clear vstart in whole vec move insns Daniel Henrique Barboza
2024-03-15  7:41   ` Richard Henderson
2024-03-18  8:55   ` Alistair Francis
2024-03-19  8:13   ` LIU Zhiwei
2024-03-14 17:56 ` [PATCH for 9.0 v15 05/10] target/riscv: always clear vstart for ldst_whole insns Daniel Henrique Barboza
2024-03-15 11:25   ` Max Chou
2024-03-18  9:10   ` Alistair Francis
2024-03-14 17:57 ` [PATCH for 9.0 v15 06/10] target/riscv/vector_helpers: do early exit when vstart >= vl Daniel Henrique Barboza
2024-03-20  4:44   ` Alistair Francis
2024-03-14 17:57 ` [PATCH for 9.0 v15 07/10] target/riscv: remove 'over' brconds from vector trans Daniel Henrique Barboza
2024-03-14 17:57 ` [PATCH for 9.0 v15 08/10] trans_rvv.c.inc: remove redundant mark_vs_dirty() calls Daniel Henrique Barboza
2024-03-14 17:57 ` [PATCH for 9.0 v15 09/10] target/riscv: enable 'vstart_eq_zero' in the end of insns Daniel Henrique Barboza
2024-03-14 17:57 ` [PATCH for 9.0 v15 10/10] target/riscv/vector_helper.c: optimize loops in ldst helpers Daniel Henrique Barboza
2024-03-20  4:55 ` [PATCH for 9.0 v15 00/10] target/riscv: vector fixes Alistair Francis

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20240314175704.478276-1-dbarboza@ventanamicro.com \
    --to=dbarboza@ventanamicro.com \
    --cc=alistair.francis@wdc.com \
    --cc=bmeng@tinylab.org \
    --cc=liwei1518@gmail.com \
    --cc=max.chou@sifive.com \
    --cc=palmer@rivosinc.com \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-riscv@nongnu.org \
    --cc=richard.henderson@linaro.org \
    --cc=zhiwei_liu@linux.alibaba.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.