diff for duplicates of <20240315134009.580167-8-ajones@ventanamicro.com>

diff --git a/a/1.txt b/N1/1.txt
index 3798177..2211ec7 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,4 +1,4 @@
-From: Christoph M?llner <christoph.muellner@vrull.eu>
+From: Christoph Müllner <christoph.muellner@vrull.eu>
 
 The current RISC-V code uses the generic ticket lock implementation,
 that calls the macros smp_cond_load_relaxed() and smp_cond_load_acquire().
@@ -22,7 +22,7 @@ The whole mechanism is gated by Kconfig setting, which defaults to Y.
 The Zawrs specification can be found here:
 https://github.com/riscv/riscv-zawrs/blob/main/zawrs.adoc
 
-Signed-off-by: Christoph M?llner <christoph.muellner@vrull.eu>
+Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
 [rebase, update to review comments]
 Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
 [rebase, move ALT_WRS* to barrier.h]
@@ -196,3 +196,9 @@ index 79a5a35fab96..0e3c79094b07 100644
  	__RISCV_ISA_EXT_DATA(zfhmin, RISCV_ISA_EXT_ZFHMIN),
 -- 
 2.44.0
+
+
+_______________________________________________
+linux-riscv mailing list
+linux-riscv@lists.infradead.org
+http://lists.infradead.org/mailman/listinfo/linux-riscv
diff --git a/a/content_digest b/N1/content_digest
index 5d79631..00c90a5 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -2,10 +2,22 @@
  "From\0Andrew Jones <ajones@ventanamicro.com>\0"
  "Subject\0[PATCH 1/5] riscv: Add Zawrs support for spinlocks\0"
  "Date\0Fri, 15 Mar 2024 14:40:11 +0100\0"
- "To\0kvm-riscv@lists.infradead.org\0"
+ "To\0linux-riscv@lists.infradead.org"
+ " kvm-riscv@lists.infradead.org\0"
+ "Cc\0paul.walmsley@sifive.com"
+  palmer@dabbelt.com
+  aou@eecs.berkeley.edu
+  conor.dooley@microchip.com
+  anup@brainfault.org
+  atishp@atishpatra.org
+  christoph.muellner@vrull.eu
+  heiko@sntech.de
+  charlie@rivosinc.com
+  David.Laight@aculab.com
+ " Heiko Stuebner <heiko.stuebner@vrull.eu>\0"
  "\00:1\0"
  "b\0"
- "From: Christoph M?llner <christoph.muellner@vrull.eu>\n"
+ "From: Christoph M\303\274llner <christoph.muellner@vrull.eu>\n"
  "\n"
  "The current RISC-V code uses the generic ticket lock implementation,\n"
  "that calls the macros smp_cond_load_relaxed() and smp_cond_load_acquire().\n"
@@ -29,7 +41,7 @@
  "The Zawrs specification can be found here:\n"
  "https://github.com/riscv/riscv-zawrs/blob/main/zawrs.adoc\n"
  "\n"
- "Signed-off-by: Christoph M?llner <christoph.muellner@vrull.eu>\n"
+ "Signed-off-by: Christoph M\303\274llner <christoph.muellner@vrull.eu>\n"
  "[rebase, update to review comments]\n"
  "Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>\n"
  "[rebase, move ALT_WRS* to barrier.h]\n"
@@ -202,6 +214,12 @@
  " \t__RISCV_ISA_EXT_DATA(zfh, RISCV_ISA_EXT_ZFH),\n"
  " \t__RISCV_ISA_EXT_DATA(zfhmin, RISCV_ISA_EXT_ZFHMIN),\n"
  "-- \n"
- 2.44.0
+ "2.44.0\n"
+ "\n"
+ "\n"
+ "_______________________________________________\n"
+ "linux-riscv mailing list\n"
+ "linux-riscv@lists.infradead.org\n"
+ http://lists.infradead.org/mailman/listinfo/linux-riscv
 
-e6ef8f3955dba9dde3fdad7f9bc9ad9b31ddb1a9d7f67a9d4ce1193a8e6f4298
+26259c86ce8af86770ce75c2af9630fb6ce42065d4e3c0e5bc1a4e8195c65998
