From: Simon Horman <horms@kernel.org>
To: Raju Lakkaraju <Raju.Lakkaraju@microchip.com>
Cc: netdev@vger.kernel.org, davem@davemloft.net, kuba@kernel.org,
pabeni@redhat.com, edumazet@google.com,
linux-kernel@vger.kernel.org, bryan.whitehead@microchip.com,
UNGLinuxDriver@microchip.com
Subject: Re: [PATCH net V1] net: lan743x: Add set RFE read fifo threshold for PCI1x1x chips
Date: Fri, 22 Mar 2024 12:38:33 +0000 [thread overview]
Message-ID: <20240322123833.GC372561@kernel.org> (raw)
In-Reply-To: <20240322064650.275174-1-Raju.Lakkaraju@microchip.com>
On Fri, Mar 22, 2024 at 12:16:50PM +0530, Raju Lakkaraju wrote:
> PCI11x1x Rev B0 devices might drop packets when receiving back to back frames
> at 2.5G link speed. Change the B0 Rev device's Receive filtering Engine FIFO
> threshold parameter from its hardware default of 4 to 3 dwords to prevent the
> problem. Rev C0 and later hardware already defaults to 3 dwords.
>
> Fixes: bb4f6bffe33c ("net: lan743x: Add PCI11010 / PCI11414 device IDs")
> Signed-off-by: Raju Lakkaraju <Raju.Lakkaraju@microchip.com>
> ---
> Change List:
> ------------
> V0 -> V1:
> - misc_ctl change from int to unsigned int
> - Use FIELD_PREP macro instead of logical shift operator
> - Change 0x3 to macro RFE_RD_FIFO_TH_3_DWORDS
Thanks for the updates,
Reviewed-by: Simon Horman <horms@kernel.org>
next prev parent reply other threads:[~2024-03-22 12:38 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-22 6:46 [PATCH net V1] net: lan743x: Add set RFE read fifo threshold for PCI1x1x chips Raju Lakkaraju
2024-03-22 12:38 ` Simon Horman [this message]
2024-03-26 2:53 ` Jakub Kicinski
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