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From: Stephen Hemminger <stephen@networkplumber.org>
To: Garrett D'Amore <garrett@damore.org>
Cc: "Morten Brørup" <mb@smartsharesystems.com>,
	dev@dpdk.org, "Parthakumar Roy" <Parthakumar.Roy@ibm.com>,
	"Bruce Richardson" <bruce.richardson@intel.com>
Subject: Re: meson option to customize RTE_PKTMBUF_HEADROOM patch
Date: Tue, 26 Mar 2024 13:35:06 -0700	[thread overview]
Message-ID: <20240326133506.6d4fb00f@hermes.local> (raw)
In-Reply-To: <e24f1a64-dc34-48cf-8140-8d6dbb41bc3e@Spark>

On Tue, 26 Mar 2024 10:43:30 -0700
Garrett D'Amore <garrett@damore.org> wrote:

> This had occurred to me as well.  I think most hardware DMA engines can align on 32-bit boundaries.  I've yet to see a device that actually requires 64-bit DMA alignment.  (But I have only looked at a subset  of devices, and most of the  ones I have looked at are not ones that would be considered 'modern'.)

There maybe a PCI transaction performance penalty if not aligned.

  reply	other threads:[~2024-03-26 20:35 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-15 19:02 meson option to customize RTE_PKTMBUF_HEADROOM patch Parthakumar Roy
2024-02-16  7:52 ` David Marchand
2024-02-20 14:57 ` [PATCH v2] build: make buffer headroom configurable Parthakumar Roy
2024-02-27 16:02   ` Bruce Richardson
2024-02-27 16:10     ` Morten Brørup
2024-03-06 16:45       ` Thomas Monjalon
2024-03-23 20:51 ` meson option to customize RTE_PKTMBUF_HEADROOM patch Garrett D'Amore
2024-03-25 10:01   ` Bruce Richardson
2024-03-25 17:20     ` Stephen Hemminger
2024-03-25 22:56       ` Garrett D'Amore
2024-03-26  8:05         ` Morten Brørup
2024-03-26 14:19           ` Garrett D'Amore
2024-03-26 15:06             ` Morten Brørup
2024-03-26 17:43               ` Garrett D'Amore
2024-03-26 20:35                 ` Stephen Hemminger [this message]
2024-03-26 21:10                   ` Garrett D'Amore
2024-03-26 16:14             ` Konstantin Ananyev
2024-03-26 17:44               ` Garrett D'Amore

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