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Mon, 08 Apr 2024 23:12:05 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id n3-20020a170902e54300b001e3dd5972ccsm5775564plf.185.2024.04.08.23.12.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 23:12:04 -0700 (PDT) From: Deepak Gupta To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, llvm@lists.linux.dev Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, nathan@kernel.org, ndesaulniers@google.com, morbo@google.com, justinstitt@google.com, andy.chiu@sifive.com, debug@rivosinc.com, hankuan.chen@sifive.com, guoren@kernel.org, greentime.hu@sifive.com, samitolvanen@google.com, cleger@rivosinc.com, apatel@ventanamicro.com, ajones@ventanamicro.com, conor.dooley@microchip.com, mchitale@ventanamicro.com, dbarboza@ventanamicro.com, waylingii@gmail.com, sameo@rivosinc.com, alexghiti@rivosinc.com, akpm@linux-foundation.org, shikemeng@huaweicloud.com, rppt@kernel.org, charlie@rivosinc.com, xiao.w.wang@intel.com, willy@infradead.org, jszhang@kernel.org, leobras@redhat.com, songshuaishuai@tinylab.org, haxel@fzi.de, samuel.holland@sifive.com, namcaov@gmail.com, bjorn@rivosinc.com, cuiyunhui@bytedance.com, wangkefeng.wang@huawei.com, falcon@tinylab.org, viro@zeniv.linux.org.uk, bhe@redhat.com, chenjiahao16@huawei.com, hca@linux.ibm.com, arnd@arndb.de, kent.overstreet@linux.dev, boqun.feng@gmail.com, oleg@redhat.com, paulmck@kernel.org, broonie@kernel.org, rick.p.edgecombe@intel.com Subject: [RFC PATCH 04/12] riscv: update asm call sites with label setup Date: Mon, 8 Apr 2024 23:10:35 -0700 Message-Id: <20240409061043.3269676-5-debug@rivosinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240409061043.3269676-1-debug@rivosinc.com> References: <20240409061043.3269676-1-debug@rivosinc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240408_231211_062256_9EA6BF45 X-CRM114-Status: UNSURE ( 9.21 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org All call sites written in asm which will be converted to indirect call form, they need to setup label register (t2/x7) with correct label. Currently kernel is enabled with consant label of 0x1 for all functions. Thus label is setup with 0x1 at call site. Eventually when hash over function signature based label is adopted, such callsites in asm needs to b updated as well. We need better scheme for that (some macro) Signed-off-by: Deepak Gupta --- arch/riscv/kernel/entry.S | 2 ++ arch/riscv/kernel/head.S | 1 + arch/riscv/lib/clear_page.S | 1 + 3 files changed, 4 insertions(+) diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S index be07355b9eff..a35050a3e0ea 100644 --- a/arch/riscv/kernel/entry.S +++ b/arch/riscv/kernel/entry.S @@ -219,6 +219,7 @@ SYM_CODE_START_LOCAL(handle_kernel_stack_overflow) REG_S s4, PT_CAUSE(sp) REG_S s5, PT_TP(sp) move a0, sp + lui t2,0x1 tail handle_bad_stack SYM_CODE_END(handle_kernel_stack_overflow) ASM_NOKPROBE(handle_kernel_stack_overflow) @@ -258,6 +259,7 @@ SYM_FUNC_START(call_on_irq_stack) load_per_cpu t0, irq_stack_ptr, t1 li t1, IRQ_STACK_SIZE add sp, t0, t1 + lui t2, 0x1 jalr a1 /* Switch back to the thread shadow call stack */ diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S index 4236a69c35cb..6c311517c3b5 100644 --- a/arch/riscv/kernel/head.S +++ b/arch/riscv/kernel/head.S @@ -165,6 +165,7 @@ secondary_start_sbi: #endif call .Lsetup_trap_vector scs_load_current + lui t2, 0x1 tail smp_callin #endif /* CONFIG_SMP */ diff --git a/arch/riscv/lib/clear_page.S b/arch/riscv/lib/clear_page.S index 20ff03f5b0f2..16e63ea91baa 100644 --- a/arch/riscv/lib/clear_page.S +++ b/arch/riscv/lib/clear_page.S @@ -69,6 +69,7 @@ SYM_FUNC_START(clear_page) ret .Lno_zicboz: li a1, 0 + lui t2, 0x1 tail __memset SYM_FUNC_END(clear_page) EXPORT_SYMBOL(clear_page) -- 2.43.2 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pl1-f169.google.com (mail-pl1-f169.google.com [209.85.214.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D1BDF7BAEC for ; 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Mon, 08 Apr 2024 23:12:05 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id n3-20020a170902e54300b001e3dd5972ccsm5775564plf.185.2024.04.08.23.12.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 23:12:04 -0700 (PDT) From: Deepak Gupta To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, llvm@lists.linux.dev Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, nathan@kernel.org, ndesaulniers@google.com, morbo@google.com, justinstitt@google.com, andy.chiu@sifive.com, debug@rivosinc.com, hankuan.chen@sifive.com, guoren@kernel.org, greentime.hu@sifive.com, samitolvanen@google.com, cleger@rivosinc.com, apatel@ventanamicro.com, ajones@ventanamicro.com, conor.dooley@microchip.com, mchitale@ventanamicro.com, dbarboza@ventanamicro.com, waylingii@gmail.com, sameo@rivosinc.com, alexghiti@rivosinc.com, akpm@linux-foundation.org, shikemeng@huaweicloud.com, rppt@kernel.org, charlie@rivosinc.com, xiao.w.wang@intel.com, willy@infradead.org, jszhang@kernel.org, leobras@redhat.com, songshuaishuai@tinylab.org, haxel@fzi.de, samuel.holland@sifive.com, namcaov@gmail.com, bjorn@rivosinc.com, cuiyunhui@bytedance.com, wangkefeng.wang@huawei.com, falcon@tinylab.org, viro@zeniv.linux.org.uk, bhe@redhat.com, chenjiahao16@huawei.com, hca@linux.ibm.com, arnd@arndb.de, kent.overstreet@linux.dev, boqun.feng@gmail.com, oleg@redhat.com, paulmck@kernel.org, broonie@kernel.org, rick.p.edgecombe@intel.com Subject: [RFC PATCH 04/12] riscv: update asm call sites with label setup Date: Mon, 8 Apr 2024 23:10:35 -0700 Message-Id: <20240409061043.3269676-5-debug@rivosinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240409061043.3269676-1-debug@rivosinc.com> References: <20240409061043.3269676-1-debug@rivosinc.com> Precedence: bulk X-Mailing-List: llvm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit All call sites written in asm which will be converted to indirect call form, they need to setup label register (t2/x7) with correct label. Currently kernel is enabled with consant label of 0x1 for all functions. Thus label is setup with 0x1 at call site. Eventually when hash over function signature based label is adopted, such callsites in asm needs to b updated as well. We need better scheme for that (some macro) Signed-off-by: Deepak Gupta --- arch/riscv/kernel/entry.S | 2 ++ arch/riscv/kernel/head.S | 1 + arch/riscv/lib/clear_page.S | 1 + 3 files changed, 4 insertions(+) diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S index be07355b9eff..a35050a3e0ea 100644 --- a/arch/riscv/kernel/entry.S +++ b/arch/riscv/kernel/entry.S @@ -219,6 +219,7 @@ SYM_CODE_START_LOCAL(handle_kernel_stack_overflow) REG_S s4, PT_CAUSE(sp) REG_S s5, PT_TP(sp) move a0, sp + lui t2,0x1 tail handle_bad_stack SYM_CODE_END(handle_kernel_stack_overflow) ASM_NOKPROBE(handle_kernel_stack_overflow) @@ -258,6 +259,7 @@ SYM_FUNC_START(call_on_irq_stack) load_per_cpu t0, irq_stack_ptr, t1 li t1, IRQ_STACK_SIZE add sp, t0, t1 + lui t2, 0x1 jalr a1 /* Switch back to the thread shadow call stack */ diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S index 4236a69c35cb..6c311517c3b5 100644 --- a/arch/riscv/kernel/head.S +++ b/arch/riscv/kernel/head.S @@ -165,6 +165,7 @@ secondary_start_sbi: #endif call .Lsetup_trap_vector scs_load_current + lui t2, 0x1 tail smp_callin #endif /* CONFIG_SMP */ diff --git a/arch/riscv/lib/clear_page.S b/arch/riscv/lib/clear_page.S index 20ff03f5b0f2..16e63ea91baa 100644 --- a/arch/riscv/lib/clear_page.S +++ b/arch/riscv/lib/clear_page.S @@ -69,6 +69,7 @@ SYM_FUNC_START(clear_page) ret .Lno_zicboz: li a1, 0 + lui t2, 0x1 tail __memset SYM_FUNC_END(clear_page) EXPORT_SYMBOL(clear_page) -- 2.43.2