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From: Jacob Pan <jacob.jun.pan@linux.intel.com>
To: Sean Christopherson <seanjc@google.com>
Cc: LKML <linux-kernel@vger.kernel.org>, X86 Kernel <x86@kernel.org>,
	Peter Zijlstra <peterz@infradead.org>,
	iommu@lists.linux.dev, Thomas Gleixner <tglx@linutronix.de>,
	Lu Baolu <baolu.lu@linux.intel.com>,
	kvm@vger.kernel.org, Dave Hansen <dave.hansen@intel.com>,
	Joerg Roedel <joro@8bytes.org>, "H. Peter Anvin" <hpa@zytor.com>,
	Borislav Petkov <bp@alien8.de>, Ingo Molnar <mingo@redhat.com>,
	Paul Luse <paul.e.luse@intel.com>,
	Dan Williams <dan.j.williams@intel.com>,
	Jens Axboe <axboe@kernel.dk>, Raj Ashok <ashok.raj@intel.com>,
	Kevin Tian <kevin.tian@intel.com>,
	maz@kernel.org, Robin Murphy <robin.murphy@arm.com>,
	jim.harris@samsung.com, a.manzanares@samsung.com,
	Bjorn Helgaas <helgaas@kernel.org>,
	guang.zeng@intel.com, robert.hoo.linux@gmail.com,
	jacob.jun.pan@linux.intel.com, oliver.sang@intel.com
Subject: Re: [PATCH v2 03/13] x86/irq: Remove bitfields in posted interrupt descriptor
Date: Wed, 17 Apr 2024 11:01:31 -0700	[thread overview]
Message-ID: <20240417110131.4aaf1d66@jacob-builder> (raw)
In-Reply-To: <Zh8aTitLwSYYlZW5@google.com>

Hi Sean,

On Tue, 16 Apr 2024 17:39:42 -0700, Sean Christopherson <seanjc@google.com>
wrote:

> "KVM" here would be nice too.
> 
> On Fri, Apr 05, 2024, Jacob Pan wrote:
> > Mixture of bitfields and types is weird and really not intuitive, remove
> > bitfields and use typed data exclusively.
> > 
> > Link:
> > https://lore.kernel.org/all/20240404101735.402feec8@jacob-builder/T/#mf66e34a82a48f4d8e2926b5581eff59a122de53a
> > Suggested-by: Sean Christopherson <seanjc@google.com> Suggested-by:
> > Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Jacob Pan
> > <jacob.jun.pan@linux.intel.com>
> > 
> > ---
> > v2:
> > 	- Replace bitfields, no more mix.
> > ---
> >  arch/x86/include/asm/posted_intr.h | 10 +---------
> >  arch/x86/kvm/vmx/posted_intr.c     |  4 ++--
> >  arch/x86/kvm/vmx/vmx.c             |  2 +-
> >  3 files changed, 4 insertions(+), 12 deletions(-)
> > 
> > diff --git a/arch/x86/include/asm/posted_intr.h
> > b/arch/x86/include/asm/posted_intr.h index acf237b2882e..c682c41d4e44
> > 100644 --- a/arch/x86/include/asm/posted_intr.h
> > +++ b/arch/x86/include/asm/posted_intr.h
> > @@ -15,17 +15,9 @@ struct pi_desc {
> >  	};
> >  	union {
> >  		struct {
> > -				/* bit 256 - Outstanding Notification
> > */
> > -			u16	on	: 1,
> > -				/* bit 257 - Suppress Notification */
> > -				sn	: 1,
> > -				/* bit 271:258 - Reserved */
> > -				rsvd_1	: 14;
> > -				/* bit 279:272 - Notification Vector */
> > +			u16	notif_ctrl; /* Suppress and
> > outstanding bits */ u8	nv;
> > -				/* bit 287:280 - Reserved */
> >  			u8	rsvd_2;
> > -				/* bit 319:288 - Notification
> > Destination */ u32	ndst;
> >  		};
> >  		u64 control;
> > diff --git a/arch/x86/kvm/vmx/posted_intr.c
> > b/arch/x86/kvm/vmx/posted_intr.c index af662312fd07..592dbb765675 100644
> > --- a/arch/x86/kvm/vmx/posted_intr.c
> > +++ b/arch/x86/kvm/vmx/posted_intr.c
> > @@ -107,7 +107,7 @@ void vmx_vcpu_pi_load(struct kvm_vcpu *vcpu, int
> > cpu)
> >  		 * handle task migration (@cpu != vcpu->cpu).
> >  		 */
> >  		new.ndst = dest;
> > -		new.sn = 0;
> > +		new.notif_ctrl &= ~POSTED_INTR_SN;  
> 
> At the risk of creating confusing, would it make sense to add
> double-underscore, non-atomic versions of the set/clear helpers for ON
> and SN?
> 
> I can't tell if that's a net positive versus open coding clear() and
> set() here and below.
IMHO, we can add non-atomic helpers when we have more than one user for
each operation.

I do have a stupid bug here, it should be:
-               new.notif_ctrl &= ~POSTED_INTR_SN;
+               new.notif_ctrl &= ~BIT(POSTED_INTR_SN);
Same as below.

Thanks to Oliver(LKP kvm self test). I didn't catch that in my VFIO device
assignment test.

> 
> >  		/*
> >  		 * Restore the notification vector; in the blocking
> > case, the @@ -157,7 +157,7 @@ static void
> > pi_enable_wakeup_handler(struct kvm_vcpu *vcpu)
> > &per_cpu(wakeup_vcpus_on_cpu, vcpu->cpu));
> > raw_spin_unlock(&per_cpu(wakeup_vcpus_on_cpu_lock, vcpu->cpu)); 
> > -	WARN(pi_desc->sn, "PI descriptor SN field set before
> > blocking");
> > +	WARN(pi_desc->notif_ctrl & POSTED_INTR_SN, "PI descriptor SN
> > field set before blocking");  
> 
> This can use pi_test_sn(), as test_bit() isn't atomic, i.e. doesn't incur
> a LOCK.
make sense. will do.

> >  
> >  	old.control = READ_ONCE(pi_desc->control);
> >  	do {
> > diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
> > index d94bb069bac9..50580bbfba5d 100644
> > --- a/arch/x86/kvm/vmx/vmx.c
> > +++ b/arch/x86/kvm/vmx/vmx.c
> > @@ -4843,7 +4843,7 @@ static void __vmx_vcpu_reset(struct kvm_vcpu
> > *vcpu)
> >  	 * or POSTED_INTR_WAKEUP_VECTOR.
> >  	 */
> >  	vmx->pi_desc.nv = POSTED_INTR_VECTOR;
> > -	vmx->pi_desc.sn = 1;
> > +	vmx->pi_desc.notif_ctrl |= POSTED_INTR_SN;  


Thanks,

Jacob

  reply	other threads:[~2024-04-17 17:56 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-05 22:30 [PATCH v2 00/13] Coalesced Interrupt Delivery with posted MSI Jacob Pan
2024-04-05 22:30 ` [PATCH v2 01/13] x86/irq: Move posted interrupt descriptor out of vmx code Jacob Pan
2024-04-17  0:34   ` Sean Christopherson
2024-04-17 18:33     ` Jacob Pan
2024-04-05 22:30 ` [PATCH v2 02/13] x86/irq: Unionize PID.PIR for 64bit access w/o casting Jacob Pan
2024-04-05 22:31 ` [PATCH v2 03/13] x86/irq: Remove bitfields in posted interrupt descriptor Jacob Pan
2024-04-17  0:39   ` Sean Christopherson
2024-04-17 18:01     ` Jacob Pan [this message]
2024-04-18 17:30       ` Thomas Gleixner
2024-04-18 18:10         ` Jacob Pan
2024-04-05 22:31 ` [PATCH v2 04/13] x86/irq: Add a Kconfig option for posted MSI Jacob Pan
2024-04-05 22:31 ` [PATCH v2 05/13] x86/irq: Reserve a per CPU IDT vector for posted MSIs Jacob Pan
2024-04-11 16:51   ` Thomas Gleixner
2024-04-15 18:53     ` Jacob Pan
2024-04-15 20:43       ` Jacob Pan
2024-04-19  4:00         ` Thomas Gleixner
2024-04-19 14:24           ` Andi Kleen
2024-04-19 16:50             ` Thomas Gleixner
2024-04-19 20:07           ` Arnaldo Carvalho de Melo
2024-04-22 22:32             ` Jacob Pan
2024-04-12  9:14   ` Tian, Kevin
2024-04-12 14:27     ` Sean Christopherson
2024-04-16  3:45       ` Tian, Kevin
2024-04-05 22:31 ` [PATCH v2 06/13] x86/irq: Set up per host CPU posted interrupt descriptors Jacob Pan
2024-04-12  9:16   ` Tian, Kevin
2024-04-12 17:54     ` Jacob Pan
2024-04-05 22:31 ` [PATCH v2 07/13] x86/irq: Factor out calling ISR from common_interrupt Jacob Pan
2024-04-12  9:21   ` Tian, Kevin
2024-04-12 16:50     ` Jacob Pan
2024-04-05 22:31 ` [PATCH v2 08/13] x86/irq: Install posted MSI notification handler Jacob Pan
2024-04-11  7:52   ` Tian, Kevin
2024-04-11 17:38     ` Jacob Pan
2024-04-11 16:54   ` Thomas Gleixner
2024-04-11 18:29     ` Jacob Pan
2024-04-05 22:31 ` [PATCH v2 09/13] x86/irq: Factor out common code for checking pending interrupts Jacob Pan
2024-04-05 22:31 ` [PATCH v2 10/13] x86/irq: Extend checks for pending vectors to posted interrupts Jacob Pan
2024-04-12  9:25   ` Tian, Kevin
2024-04-12 18:23     ` Jacob Pan
2024-04-16  3:47       ` Tian, Kevin
2024-04-05 22:31 ` [PATCH v2 11/13] iommu/vt-d: Make posted MSI an opt-in cmdline option Jacob Pan
2024-04-06  4:31   ` Robert Hoo
2024-04-08 23:33     ` Jacob Pan
2024-04-13 10:59       ` Robert Hoo
2024-04-12  9:31   ` Tian, Kevin
2024-04-15 23:20     ` Jacob Pan
2024-04-05 22:31 ` [PATCH v2 12/13] iommu/vt-d: Add an irq_chip for posted MSIs Jacob Pan
2024-04-12  9:36   ` Tian, Kevin
2024-04-16 22:15     ` Jacob Pan
2024-04-05 22:31 ` [PATCH v2 13/13] iommu/vt-d: Enable posted mode for device MSIs Jacob Pan

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