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From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Kishon Vijay Abraham I" <kishon@kernel.org>,
	"Thierry Reding" <thierry.reding@gmail.com>,
	"Jonathan Hunter" <jonathanh@nvidia.com>,
	"Jingoo Han" <jingoohan1@gmail.com>,
	linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	linux-kernel@vger.kernel.org, mhi@lists.linux.dev,
	linux-tegra@vger.kernel.org, "Niklas Cassel" <cassel@kernel.org>,
	"Damien Le Moal" <dlemoal@kernel.org>
Subject: Re: [PATCH v3 3/9] PCI: endpoint: Rename BME to Bus Master Enable
Date: Fri, 19 Apr 2024 15:08:47 +0530	[thread overview]
Message-ID: <20240419093847.GB3636@thinkpad> (raw)
In-Reply-To: <20240418161209.GA239309@bhelgaas>

On Thu, Apr 18, 2024 at 11:12:09AM -0500, Bjorn Helgaas wrote:
> On Thu, Apr 18, 2024 at 05:28:31PM +0530, Manivannan Sadhasivam wrote:
> > BME which stands for 'Bus Master Enable' is not defined in the PCIe base
> > spec even though it is commonly referred in many places (vendor docs). But
> > to align with the spec, let's rename it to its expansion 'Bus Master
> > Enable'.
> 
> Thanks for doing this.  I'm always in favor of using terms from the
> spec.
> 
> > -		dev_dbg(dev, "Received BME event. Link is enabled!\n");
> > +		dev_dbg(dev, "Received Bus Master Enable event. Link is enabled!\n");
> 
> Nothing to do with *this* patch, but this message reads a little weird
> to me because setting Bus Master Enable has nothing to do with link
> enablement.
> 

That's my bad. I'll remove it.

> Also incidental: some of these messages and comments refer to a "Bus
> Master Enable *event*".  Does "event" here refer to the act of the
> host setting the Bus Master Enable bit in the Command register?  This
> is in qcom_pcie_ep_global_irq_thread(), so I assume there's something
> in the endpoint hardware that generates an IRQ when the Command
> register is written?
> 

Yes, the PCIe endpoint controller generates an IRQ when host sets Bus Master
Enable bit.

> > - * pci_epc_bme_notify() - Notify the EPF device that the EPC device has received
> > - *			  the BME event from the Root complex
> > - * @epc: the EPC device that received the BME event
> > + * pci_epc_bus_master_enable_notify() - Notify the EPF device that the EPC
> > + *					device has received the Bus Master
> > + *					Enable event from the Root complex
> > + * @epc: the EPC device that received the Bus Master Enable event
> >   *
> >   * Invoke to Notify the EPF device that the EPC device has received the Bus
> > - * Master Enable (BME) event from the Root complex
> > + * Master Enable event from the Root complex
> 
> There's no "set Bus Master Enable" transaction that would appear on
> the PCIe link, so I assume "the Bus Master Enable event from the Root
> Complex" is a way of saying something like "host has written the
> Command register to set the Bus Master Enable bit"?
> 

Yes. But looking at it again, it could be reworded as below:

'Invoke to notify the EPF device that the EPC device has generated the Bus
Master Enable event due to host setting the Bus Master Enable bit in the
Command register.'

- Mani

-- 
மணிவண்ணன் சதாசிவம்

  reply	other threads:[~2024-04-19  9:38 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-18 11:58 [PATCH v3 0/9] PCI: endpoint: Make host reboot handling more robust Manivannan Sadhasivam
2024-04-18 11:58 ` [PATCH v3 1/9] PCI: qcom-ep: Disable resources unconditionally during PERST# assert Manivannan Sadhasivam
2024-04-18 11:58 ` [PATCH v3 2/9] PCI: endpoint: Rename core_init() callback in 'struct pci_epc_event_ops' to epc_init() Manivannan Sadhasivam
2024-04-18 14:48   ` Niklas Cassel
2024-04-18 11:58 ` [PATCH v3 3/9] PCI: endpoint: Rename BME to Bus Master Enable Manivannan Sadhasivam
2024-04-18 14:49   ` Niklas Cassel
2024-04-19  9:26     ` Manivannan Sadhasivam
2024-04-18 16:12   ` Bjorn Helgaas
2024-04-19  9:38     ` Manivannan Sadhasivam [this message]
2024-04-19 21:48       ` Bjorn Helgaas
2024-04-18 11:58 ` [PATCH v3 4/9] PCI: endpoint: pci-epf-test: Refactor pci_epf_test_unbind() function Manivannan Sadhasivam
2024-04-18 11:58 ` [PATCH v3 5/9] PCI: endpoint: pci-epf-{mhi/test}: Move DMA initialization to EPC init callback Manivannan Sadhasivam
2024-04-18 11:58 ` [PATCH v3 6/9] PCI: endpoint: Introduce 'epc_deinit' event and notify the EPF drivers Manivannan Sadhasivam
2024-04-18 11:58 ` [PATCH v3 7/9] PCI: dwc: ep: Add a generic dw_pcie_ep_linkdown() API to handle Link Down event Manivannan Sadhasivam
2024-04-18 11:58 ` [PATCH v3 8/9] PCI: qcom-ep: Use the " Manivannan Sadhasivam
2024-04-18 11:58 ` [PATCH v3 9/9] PCI: endpoint: pci-epf-test: Handle " Manivannan Sadhasivam
2024-04-18 14:29 ` [PATCH v3 0/9] PCI: endpoint: Make host reboot handling more robust Niklas Cassel

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