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From: Lu Baolu <baolu.lu@linux.intel.com>
To: Joerg Roedel <joro@8bytes.org>
Cc: Jason Gunthorpe <jgg@ziepe.ca>, Jingqi Liu <Jingqi.liu@intel.com>,
	Dimitri Sivanich <sivanich@hpe.com>,
	Uros Bizjak <ubizjak@gmail.com>,
	Colin Ian King <colin.i.king@gmail.com>,
	iommu@lists.linux.dev, linux-kernel@vger.kernel.org
Subject: [PATCH 03/18] iommu/vt-d: Allocate DMAR fault interrupts locally
Date: Wed, 24 Apr 2024 15:16:29 +0800	[thread overview]
Message-ID: <20240424071644.178250-4-baolu.lu@linux.intel.com> (raw)
In-Reply-To: <20240424071644.178250-1-baolu.lu@linux.intel.com>

From: Dimitri Sivanich <sivanich@hpe.com>

The Intel IOMMU code currently tries to allocate all DMAR fault interrupt
vectors on the boot cpu.  On large systems with high DMAR counts this
results in vector exhaustion, and most of the vectors are not initially
allocated socket local.

Instead, have a cpu on each node do the vector allocation for the DMARs on
that node.  The boot cpu still does the allocation for its node during its
boot sequence.

Signed-off-by: Dimitri Sivanich <sivanich@hpe.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Link: https://lore.kernel.org/r/Zfydpp2Hm+as16TY@hpe.com
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
---
 include/linux/dmar.h          | 2 +-
 drivers/iommu/amd/amd_iommu.h | 2 +-
 drivers/iommu/irq_remapping.h | 2 +-
 drivers/iommu/amd/init.c      | 2 +-
 drivers/iommu/intel/dmar.c    | 9 +++++++--
 drivers/iommu/irq_remapping.c | 5 ++++-
 6 files changed, 15 insertions(+), 7 deletions(-)

diff --git a/include/linux/dmar.h b/include/linux/dmar.h
index e34b601b71fd..499bb2c63483 100644
--- a/include/linux/dmar.h
+++ b/include/linux/dmar.h
@@ -117,7 +117,7 @@ extern int dmar_remove_dev_scope(struct dmar_pci_notify_info *info,
 				 int count);
 /* Intel IOMMU detection */
 void detect_intel_iommu(void);
-extern int enable_drhd_fault_handling(void);
+extern int enable_drhd_fault_handling(unsigned int cpu);
 extern int dmar_device_add(acpi_handle handle);
 extern int dmar_device_remove(acpi_handle handle);
 
diff --git a/drivers/iommu/amd/amd_iommu.h b/drivers/iommu/amd/amd_iommu.h
index f482aab420f7..410c360e7e24 100644
--- a/drivers/iommu/amd/amd_iommu.h
+++ b/drivers/iommu/amd/amd_iommu.h
@@ -33,7 +33,7 @@ int amd_iommu_prepare(void);
 int amd_iommu_enable(void);
 void amd_iommu_disable(void);
 int amd_iommu_reenable(int mode);
-int amd_iommu_enable_faulting(void);
+int amd_iommu_enable_faulting(unsigned int cpu);
 extern int amd_iommu_guest_ir;
 extern enum io_pgtable_fmt amd_iommu_pgtable;
 extern int amd_iommu_gpt_level;
diff --git a/drivers/iommu/irq_remapping.h b/drivers/iommu/irq_remapping.h
index 8c89cb947cdb..0d6f140b5e01 100644
--- a/drivers/iommu/irq_remapping.h
+++ b/drivers/iommu/irq_remapping.h
@@ -41,7 +41,7 @@ struct irq_remap_ops {
 	int  (*reenable)(int);
 
 	/* Enable fault handling */
-	int  (*enable_faulting)(void);
+	int  (*enable_faulting)(unsigned int);
 };
 
 extern struct irq_remap_ops intel_irq_remap_ops;
diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c
index ac6754a85f35..8085e13e0100 100644
--- a/drivers/iommu/amd/init.c
+++ b/drivers/iommu/amd/init.c
@@ -3392,7 +3392,7 @@ int amd_iommu_reenable(int mode)
 	return 0;
 }
 
-int __init amd_iommu_enable_faulting(void)
+int __init amd_iommu_enable_faulting(unsigned int cpu)
 {
 	/* We enable MSI later when PCI is initialized */
 	return 0;
diff --git a/drivers/iommu/intel/dmar.c b/drivers/iommu/intel/dmar.c
index 351be9455214..932e0c10c0fe 100644
--- a/drivers/iommu/intel/dmar.c
+++ b/drivers/iommu/intel/dmar.c
@@ -2121,7 +2121,7 @@ int dmar_set_interrupt(struct intel_iommu *iommu)
 	return ret;
 }
 
-int __init enable_drhd_fault_handling(void)
+int enable_drhd_fault_handling(unsigned int cpu)
 {
 	struct dmar_drhd_unit *drhd;
 	struct intel_iommu *iommu;
@@ -2131,7 +2131,12 @@ int __init enable_drhd_fault_handling(void)
 	 */
 	for_each_iommu(iommu, drhd) {
 		u32 fault_status;
-		int ret = dmar_set_interrupt(iommu);
+		int ret;
+
+		if (iommu->irq || iommu->node != cpu_to_node(cpu))
+			continue;
+
+		ret = dmar_set_interrupt(iommu);
 
 		if (ret) {
 			pr_err("DRHD %Lx: failed to enable fault, interrupt, ret %d\n",
diff --git a/drivers/iommu/irq_remapping.c b/drivers/iommu/irq_remapping.c
index ee59647c2050..2f7281ccc05f 100644
--- a/drivers/iommu/irq_remapping.c
+++ b/drivers/iommu/irq_remapping.c
@@ -151,7 +151,10 @@ int __init irq_remap_enable_fault_handling(void)
 	if (!remap_ops->enable_faulting)
 		return -ENODEV;
 
-	return remap_ops->enable_faulting();
+	cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "dmar:enable_fault_handling",
+			  remap_ops->enable_faulting, NULL);
+
+	return remap_ops->enable_faulting(smp_processor_id());
 }
 
 void panic_if_irq_remap(const char *msg)
-- 
2.34.1


  parent reply	other threads:[~2024-04-24  7:18 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-24  7:16 [PATCH 00/18] [PULL REQUEST] Intel IOMMU updates for v6.10 Lu Baolu
2024-04-24  7:16 ` [PATCH 01/18] iommu/vt-d: Remove redundant assignment to variable err Lu Baolu
2024-04-24  7:16 ` [PATCH 02/18] iommu/vt-d: Use try_cmpxchg64{,_local}() in iommu.c Lu Baolu
2024-04-24  7:16 ` Lu Baolu [this message]
2024-04-24  7:16 ` [PATCH 04/18] iommu/vt-d: Remove debugfs use of private data field Lu Baolu
2024-04-24  7:16 ` [PATCH 05/18] iommu/vt-d: Remove private data use in fault message Lu Baolu
2024-04-24  7:16 ` [PATCH 06/18] iommu/vt-d: Remove caching mode check before device TLB flush Lu Baolu
2024-04-24  7:16 ` [PATCH 07/18] iommu/vt-d: Add cache tag assignment interface Lu Baolu
2024-04-24  7:16 ` [PATCH 08/18] iommu/vt-d: Add cache tag invalidation helpers Lu Baolu
2024-04-24  7:16 ` [PATCH 09/18] iommu/vt-d: Add trace events for cache tag interface Lu Baolu
2024-04-24  7:16 ` [PATCH 10/18] iommu/vt-d: Use cache_tag_flush_all() in flush_iotlb_all Lu Baolu
2024-04-24  7:16 ` [PATCH 11/18] iommu/vt-d: Use cache_tag_flush_range() in tlb_sync Lu Baolu
2024-04-24  7:16 ` [PATCH 12/18] iommu/vt-d: Use cache_tag_flush_range_np() in iotlb_sync_map Lu Baolu
2024-04-24  7:16 ` [PATCH 13/18] iommu/vt-d: Cleanup use of iommu_flush_iotlb_psi() Lu Baolu
2024-04-24  7:16 ` [PATCH 14/18] iommu/vt-d: Use cache_tag_flush_range() in cache_invalidate_user Lu Baolu
2024-04-24  7:16 ` [PATCH 15/18] iommu/vt-d: Use cache helpers in arch_invalidate_secondary_tlbs Lu Baolu
2024-04-24  7:16 ` [PATCH 16/18] iommu/vt-d: Remove intel_svm_dev Lu Baolu
2024-04-24  7:16 ` [PATCH 17/18] iommu: Add ops->domain_alloc_sva() Lu Baolu
2024-04-24  7:16 ` [PATCH 18/18] iommu/vt-d: Remove struct intel_svm Lu Baolu
2024-04-26 10:00 ` [PATCH 00/18] [PULL REQUEST] Intel IOMMU updates for v6.10 Joerg Roedel

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