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Wed, 24 Apr 2024 03:53:56 -0500 From: Wayne Lin To: CC: , , , , , , , , , , Nicholas Kazlauskas , Duncan Ma Subject: [PATCH 41/46] drm/amd/display: Notify idle link detection through shared state Date: Wed, 24 Apr 2024 16:49:26 +0800 Message-ID: <20240424084931.2656128-42-Wayne.Lin@amd.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240424084931.2656128-1-Wayne.Lin@amd.com> References: <20240424084931.2656128-1-Wayne.Lin@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Received-SPF: None (SATLEXMB03.amd.com: Wayne.Lin@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000971E9:EE_|CH3PR12MB7571:EE_ X-MS-Office365-Filtering-Correlation-Id: dff31fa0-e6d1-455f-103f-08dc643c1654 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?d7jmQSOlMoV+EHGa0jPCnFxHcM3YdVvdEsy63i3v690BlitR+BhazdVKvgJJ?= =?us-ascii?Q?w+V5O8R8Y8n613jH4XCbxmOwbdFewkYviktYLnd5cT+JnQ47VxuH7+uOeTeS?= =?us-ascii?Q?HGyGqc2n5/kjuBFCMJQM9/nAYpm4PrDnLobfvwtyivK1xkVYy9g+68b/km7+?= =?us-ascii?Q?eH10tjiM6CS88yXDE6yRLbuCHH50Rwr77zLZjhGDFpKAgVDk2bGyj7yPF7xU?= =?us-ascii?Q?iwNxwp9dNAJoFvFEzRlTs4dBng1yVceoDza5iaXNKyW0icW/TyFIJ9x1R68e?= =?us-ascii?Q?k4Qtv1A2dVl1FteqmNT/EpzbDv7nOi5ZtPmmWxgHyUaOmbTTHfTPzuQuhhFq?= =?us-ascii?Q?ne+XKDO5X+0KdSoTpPYzyWUWLGbo525bPFiHkLOC12lwGzOcTurmvJnDr0Go?= =?us-ascii?Q?e0D5C6V0WC6vNmMuYcSxCT2SH6+5qakTZMlZwsSB8jsRzXBLZwFJQkFtanWU?= =?us-ascii?Q?HMXD3WVK5iij2FBwrsgcXNJ9xMZs1B6qRZqJ/drUi02sTa2s/QmAklGQ6vEO?= =?us-ascii?Q?kkfhYW8bIweHbn3ultwfpL7HVipW1QLGU3HAr8nUUYKFZgKj5XOTAYFzHVNo?= =?us-ascii?Q?tiiOz7pNKOYdK5xFT6bKddMYlcmqzjGdjKqs+ULjEmd0apkTwY0ZNJ9Sg6JG?= =?us-ascii?Q?BerbgR44GrGHdy3Qs0sfgcJ0IlELRMSjUr8aWfd5GRDHexeORrVykXDDyfQb?= =?us-ascii?Q?KZVzLSkFA+EZ4VMu0QW9P/FXOjnGsgyRjHEOYLalW4+qFnav2GlG1Xd7lTfi?= =?us-ascii?Q?EGucxH25d3QdEWrSUVgg0vf3p4XcLcTfuDGgfgjB1oDApt+PbyGOybgOMGxB?= =?us-ascii?Q?doN5n344sHoZsoFbxC3t9QxwnpfLu+KcXHeGTkO2+VrCVv06KjW+FSp0liov?= =?us-ascii?Q?SFKKZvmWYFHghNHz/RiFiHz0PXBnr/LgRG6I1X8WMYBh3vvKU80KfVd4K2Gh?= =?us-ascii?Q?twgRBruhfYw0SJJEV+caHKKYRPExntiuozebgRgGzisStPGEV9QOWekAhRfm?= =?us-ascii?Q?UpCC69/ay1g4P3RWoSanVA054EzdqRdzLpbqklAjzFvvrsyKzdi/Y/U06CEu?= =?us-ascii?Q?icNfRmYLQzJ0dkIsUcA0IKUYPbTvDjo84j+xeBjuWCZtgaHdMZFwHnLW+LfF?= =?us-ascii?Q?AeJZVZPv0Bmmj6sFGV954xN/xJobxX1+QqL5tmFbzULnEPNvxrhtqP+BM2yJ?= =?us-ascii?Q?vLAdC1xEzxiQPU+qdfUywE0F5AL1LySZHGcDp4tJyl6xGbx0N9Oa/CCp10m9?= =?us-ascii?Q?o7QS1eEGVYke71YAj8JdtC1xHiC+jzdq4s2VB/Y6R0WXGhU0e21jHqOijniO?= =?us-ascii?Q?3cdq0XTaE4h8vQL/DeQZYKXgzliwGe/v83Ilm+sqPATijWHnFf1/SvfubFXl?= =?us-ascii?Q?H/oE1cY=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(376005)(82310400014)(1800799015)(36860700004); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Apr 2024 08:54:01.3628 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: dff31fa0-e6d1-455f-103f-08dc643c1654 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000971E9.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB7571 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" From: Nicholas Kazlauskas [Why] We can hang in IPS2 checking DMCUB_SCRATCH0 for link detection state. [How] Replace the HW access with a check on the shared state bit. This will work the same way as the SCRATCH0 but won't require a wake in the case where link detection isn't required. Reviewed-by: Duncan Ma Acked-by: Wayne Lin Signed-off-by: Nicholas Kazlauskas --- drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 30 +++++++++++++++++++ drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h | 10 +++++++ drivers/gpu/drm/amd/display/dmub/dmub_srv.h | 1 + .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 15 +++++++++- .../gpu/drm/amd/display/dmub/src/dmub_srv.c | 2 ++ 5 files changed, 57 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c index 33d3307f5c1c..364ef9ae32f1 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c +++ b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c @@ -1460,6 +1460,36 @@ void dc_dmub_srv_set_power_state(struct dc_dmub_srv *dc_dmub_srv, enum dc_acpi_c dmub_srv_set_power_state(dmub, DMUB_POWER_STATE_D3); } +bool dc_dmub_srv_should_detect(struct dc_dmub_srv *dc_dmub_srv) +{ + volatile const struct dmub_shared_state_ips_fw *ips_fw; + bool reallow_idle = false, should_detect = false; + + if (!dc_dmub_srv || !dc_dmub_srv->dmub) + return false; + + if (dc_dmub_srv->dmub->shared_state && + dc_dmub_srv->dmub->meta_info.feature_bits.bits.shared_state_link_detection) { + ips_fw = &dc_dmub_srv->dmub->shared_state[DMUB_SHARED_SHARE_FEATURE__IPS_FW].data.ips_fw; + return ips_fw->signals.bits.detection_required; + } + + /* Detection may require reading scratch 0 - exit out of idle prior to the read. */ + if (dc_dmub_srv->idle_allowed) { + dc_dmub_srv_apply_idle_power_optimizations(dc_dmub_srv->ctx->dc, false); + reallow_idle = true; + } + + should_detect = dmub_srv_should_detect(dc_dmub_srv->dmub); + + /* Re-enter idle if we're not about to immediately redetect links. */ + if (!should_detect && reallow_idle && dc_dmub_srv->idle_exit_counter == 0 && + !dc_dmub_srv->ctx->dc->debug.disable_dmub_reallow_idle) + dc_dmub_srv_apply_idle_power_optimizations(dc_dmub_srv->ctx->dc, true); + + return should_detect; +} + void dc_dmub_srv_apply_idle_power_optimizations(const struct dc *dc, bool allow_idle) { struct dc_dmub_srv *dc_dmub_srv = dc->ctx->dmub_srv; diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h index 3297c5b33265..580940222777 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h +++ b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h @@ -111,6 +111,16 @@ void dc_dmub_srv_apply_idle_power_optimizations(const struct dc *dc, bool allow_ void dc_dmub_srv_set_power_state(struct dc_dmub_srv *dc_dmub_srv, enum dc_acpi_cm_power_state powerState); +/** + * @dc_dmub_srv_should_detect() - Checks if link detection is required. + * + * While in idle power states we may need driver to manually redetect in + * the case of a missing hotplug. Should be called from a polling timer. + * + * Return: true if redetection is required. + */ +bool dc_dmub_srv_should_detect(struct dc_dmub_srv *dc_dmub_srv); + /** * dc_wake_and_execute_dmub_cmd() - Wrapper for DMUB command execution. * diff --git a/drivers/gpu/drm/amd/display/dmub/dmub_srv.h b/drivers/gpu/drm/amd/display/dmub/dmub_srv.h index cec8aa1face5..cd51c91a822b 100644 --- a/drivers/gpu/drm/amd/display/dmub/dmub_srv.h +++ b/drivers/gpu/drm/amd/display/dmub/dmub_srv.h @@ -529,6 +529,7 @@ struct dmub_srv { uint32_t psp_version; /* Feature capabilities reported by fw */ + struct dmub_fw_meta_info meta_info; struct dmub_feature_caps feature_caps; struct dmub_visual_confirm_color visual_confirm_color; diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h index 7a0574e6c129..35096aa3d85b 100644 --- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h +++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h @@ -496,6 +496,17 @@ struct dmub_visual_confirm_color { /* Offset from the end of the file to the dmub_fw_meta_info */ #define DMUB_FW_META_OFFSET 0x24 +/** + * union dmub_fw_meta_feature_bits - Static feature bits for pre-initialization + */ +union dmub_fw_meta_feature_bits { + struct { + uint32_t shared_state_link_detection : 1; /**< 1 supports link detection via shared state */ + uint32_t reserved : 31; + } bits; /**< status bits */ + uint32_t all; /**< 32-bit access to status bits */ +}; + /** * struct dmub_fw_meta_info - metadata associated with fw binary * @@ -521,6 +532,7 @@ struct dmub_fw_meta_info { uint32_t shared_state_size; /**< size of the shared state region in bytes */ uint16_t shared_state_features; /**< number of shared state features */ uint16_t reserved2; /**< padding bytes */ + union dmub_fw_meta_feature_bits feature_bits; /**< static feature bits */ }; /** @@ -698,7 +710,8 @@ union dmub_shared_state_ips_fw_signals { uint32_t ips1_commit : 1; /**< 1 if in IPS1 */ uint32_t ips2_commit : 1; /**< 1 if in IPS2 */ uint32_t in_idle : 1; /**< 1 if DMCUB is in idle */ - uint32_t reserved_bits : 29; /**< Reversed */ + uint32_t detection_required : 1; /**< 1 if detection is required */ + uint32_t reserved_bits : 28; /**< Reversed */ } bits; uint32_t all; }; diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c index 9bb4c51b1f5b..db16066bc893 100644 --- a/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c +++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c @@ -510,6 +510,8 @@ enum dmub_status fw_info = dmub_get_fw_meta_info(params); if (fw_info) { + memcpy(&dmub->meta_info, fw_info, sizeof(*fw_info)); + fw_state_size = fw_info->fw_region_size; trace_buffer_size = fw_info->trace_buffer_size; -- 2.37.3