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From: Jon Hunter <jonathanh@nvidia.com>
To: "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Thierry Reding" <thierry.reding@gmail.com>
Cc: Vidya Sagar <vidyas@nvidia.com>, <linux-pci@vger.kernel.org>,
	<linux-tegra@vger.kernel.org>, Jon Hunter <jonathanh@nvidia.com>,
	"Manikanta Maddireddy" <mmaddireddy@nvidia.com>
Subject: [PATCH] PCI: tegra194: Set address alignment for endpoint mode
Date: Fri, 26 Apr 2024 13:27:31 +0100	[thread overview]
Message-ID: <20240426122731.42499-1-jonathanh@nvidia.com> (raw)

Tegra194 and Tegra234 devices require that the endpoint address is
aligned on a 64kB boundary and therefore, set the endpoint address
alignment to 64kB in the Tegra194 PCIe driver.

Fixes: c57247f940e8 ("PCI: tegra: Add support for PCIe endpoint mode in Tegra194")
Suggested-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
---
 drivers/pci/controller/dwc/pcie-tegra194.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
index 93f5433c5c55..4537313ef37a 100644
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -2015,6 +2015,7 @@ static const struct pci_epc_features tegra_pcie_epc_features = {
 	.bar[BAR_3] = { .type = BAR_RESERVED, },
 	.bar[BAR_4] = { .type = BAR_RESERVED, },
 	.bar[BAR_5] = { .type = BAR_RESERVED, },
+	.align = SZ_64K,
 };
 
 static const struct pci_epc_features*
-- 
2.34.1


             reply	other threads:[~2024-04-26 12:28 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-26 12:27 Jon Hunter [this message]
2024-04-26 12:54 ` [PATCH] PCI: tegra194: Set address alignment for endpoint mode Niklas Cassel
2024-04-26 14:17   ` Jon Hunter

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