From: kernel test robot <lkp@intel.com>
To: oe-kbuild@lists.linux.dev
Cc: lkp@intel.com, Julia Lawall <julia.lawall@inria.fr>
Subject: drivers/gpu/drm/xe/xe_guc_ads.c:103:21-27: WARNING use flexible-array member instead (https://www.kernel.org/doc/html/latest/process/deprecated.html#zero-length-and-one-element-arrays)
Date: Sun, 5 May 2024 19:06:22 +0800 [thread overview]
Message-ID: <202405051824.AmjAI5Pg-lkp@intel.com> (raw)
BCC: lkp@intel.com
CC: oe-kbuild-all@lists.linux.dev
CC: linux-kernel@vger.kernel.org
TO: Lucas De Marchi <lucas.demarchi@intel.com>
CC: Matt Roper <matthew.d.roper@intel.com>
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 7367539ad4b0f8f9b396baf02110962333719a48
commit: 237412e45390805e14a6936fb998d756c4eac9d8 drm/xe: Enable 32bits build
date: 3 months ago
:::::: branch date: 2 days ago
:::::: commit date: 3 months ago
config: i386-randconfig-054-20240505 (https://download.01.org/0day-ci/archive/20240505/202405051824.AmjAI5Pg-lkp@intel.com/config)
compiler: clang version 18.1.4 (https://github.com/llvm/llvm-project e6c3289804a67ea0bb6a86fadbe454dd93b8d855)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Reported-by: Julia Lawall <julia.lawall@inria.fr>
| Closes: https://lore.kernel.org/r/202405051824.AmjAI5Pg-lkp@intel.com/
cocci warnings: (new ones prefixed by >>)
>> drivers/gpu/drm/xe/xe_guc_ads.c:103:21-27: WARNING use flexible-array member instead (https://www.kernel.org/doc/html/latest/process/deprecated.html#zero-length-and-one-element-arrays)
vim +103 drivers/gpu/drm/xe/xe_guc_ads.c
dd08ebf6c3525a Matthew Brost 2023-03-30 53
dd08ebf6c3525a Matthew Brost 2023-03-30 54 /*
dd08ebf6c3525a Matthew Brost 2023-03-30 55 * The Additional Data Struct (ADS) has pointers for different buffers used by
dd08ebf6c3525a Matthew Brost 2023-03-30 56 * the GuC. One single gem object contains the ADS struct itself (guc_ads) and
dd08ebf6c3525a Matthew Brost 2023-03-30 57 * all the extra buffers indirectly linked via the ADS struct's entries.
dd08ebf6c3525a Matthew Brost 2023-03-30 58 *
dd08ebf6c3525a Matthew Brost 2023-03-30 59 * Layout of the ADS blob allocated for the GuC:
dd08ebf6c3525a Matthew Brost 2023-03-30 60 *
dd08ebf6c3525a Matthew Brost 2023-03-30 61 * +---------------------------------------+ <== base
dd08ebf6c3525a Matthew Brost 2023-03-30 62 * | guc_ads |
dd08ebf6c3525a Matthew Brost 2023-03-30 63 * +---------------------------------------+
dd08ebf6c3525a Matthew Brost 2023-03-30 64 * | guc_policies |
dd08ebf6c3525a Matthew Brost 2023-03-30 65 * +---------------------------------------+
dd08ebf6c3525a Matthew Brost 2023-03-30 66 * | guc_gt_system_info |
dd08ebf6c3525a Matthew Brost 2023-03-30 67 * +---------------------------------------+
dd08ebf6c3525a Matthew Brost 2023-03-30 68 * | guc_engine_usage |
dd08ebf6c3525a Matthew Brost 2023-03-30 69 * +---------------------------------------+
dd08ebf6c3525a Matthew Brost 2023-03-30 70 * | guc_um_init_params |
dd08ebf6c3525a Matthew Brost 2023-03-30 71 * +---------------------------------------+ <== static
dd08ebf6c3525a Matthew Brost 2023-03-30 72 * | guc_mmio_reg[countA] (engine 0.0) |
dd08ebf6c3525a Matthew Brost 2023-03-30 73 * | guc_mmio_reg[countB] (engine 0.1) |
dd08ebf6c3525a Matthew Brost 2023-03-30 74 * | guc_mmio_reg[countC] (engine 1.0) |
dd08ebf6c3525a Matthew Brost 2023-03-30 75 * | ... |
dd08ebf6c3525a Matthew Brost 2023-03-30 76 * +---------------------------------------+ <== dynamic
dd08ebf6c3525a Matthew Brost 2023-03-30 77 * | padding |
dd08ebf6c3525a Matthew Brost 2023-03-30 78 * +---------------------------------------+ <== 4K aligned
dd08ebf6c3525a Matthew Brost 2023-03-30 79 * | golden contexts |
dd08ebf6c3525a Matthew Brost 2023-03-30 80 * +---------------------------------------+
dd08ebf6c3525a Matthew Brost 2023-03-30 81 * | padding |
dd08ebf6c3525a Matthew Brost 2023-03-30 82 * +---------------------------------------+ <== 4K aligned
dd08ebf6c3525a Matthew Brost 2023-03-30 83 * | capture lists |
dd08ebf6c3525a Matthew Brost 2023-03-30 84 * +---------------------------------------+
dd08ebf6c3525a Matthew Brost 2023-03-30 85 * | padding |
dd08ebf6c3525a Matthew Brost 2023-03-30 86 * +---------------------------------------+ <== 4K aligned
dd08ebf6c3525a Matthew Brost 2023-03-30 87 * | UM queues |
dd08ebf6c3525a Matthew Brost 2023-03-30 88 * +---------------------------------------+
dd08ebf6c3525a Matthew Brost 2023-03-30 89 * | padding |
dd08ebf6c3525a Matthew Brost 2023-03-30 90 * +---------------------------------------+ <== 4K aligned
dd08ebf6c3525a Matthew Brost 2023-03-30 91 * | private data |
dd08ebf6c3525a Matthew Brost 2023-03-30 92 * +---------------------------------------+
dd08ebf6c3525a Matthew Brost 2023-03-30 93 * | padding |
dd08ebf6c3525a Matthew Brost 2023-03-30 94 * +---------------------------------------+ <== 4K aligned
dd08ebf6c3525a Matthew Brost 2023-03-30 95 */
dd08ebf6c3525a Matthew Brost 2023-03-30 96 struct __guc_ads_blob {
dd08ebf6c3525a Matthew Brost 2023-03-30 97 struct guc_ads ads;
dd08ebf6c3525a Matthew Brost 2023-03-30 98 struct guc_policies policies;
dd08ebf6c3525a Matthew Brost 2023-03-30 99 struct guc_gt_system_info system_info;
dd08ebf6c3525a Matthew Brost 2023-03-30 100 struct guc_engine_usage engine_usage;
dd08ebf6c3525a Matthew Brost 2023-03-30 101 struct guc_um_init_params um_init_params;
dd08ebf6c3525a Matthew Brost 2023-03-30 102 /* From here on, location is dynamic! Refer to above diagram. */
dd08ebf6c3525a Matthew Brost 2023-03-30 @103 struct guc_mmio_reg regset[0];
dd08ebf6c3525a Matthew Brost 2023-03-30 104 } __packed;
dd08ebf6c3525a Matthew Brost 2023-03-30 105
:::::: The code at line 103 was first introduced by commit
:::::: dd08ebf6c3525a7ea2186e636df064ea47281987 drm/xe: Introduce a new DRM driver for Intel GPUs
:::::: TO: Matthew Brost <matthew.brost@intel.com>
:::::: CC: Rodrigo Vivi <rodrigo.vivi@intel.com>
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
reply other threads:[~2024-05-05 11:07 UTC|newest]
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