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From: Aditya Gupta <adityag@linux.ibm.com>
To: "Mahesh J Salgaonkar" <mahesh@linux.ibm.com>,
	"Madhavan Srinivasan" <maddy@linux.ibm.com>,
	"Nicholas Piggin" <npiggin@gmail.com>,
	"Cédric Le Goater" <clg@kaod.org>
Cc: qemu-devel@nongnu.org, qemu-ppc@nongnu.org,
	"Frédéric Barrat" <fbarrat@linux.ibm.com>
Subject: [PATCH v3 07/11] ppc/pnv: Add a LPC controller for POWER11
Date: Mon, 27 May 2024 12:40:38 +0530	[thread overview]
Message-ID: <20240527071042.489540-8-adityag@linux.ibm.com> (raw)
In-Reply-To: <20240527071042.489540-1-adityag@linux.ibm.com>

Power11 core is same as Power10 core, declare PNV11_LPC as a child
class of PNV10_LPC, so it goes through same class init

Cc: Cédric Le Goater <clg@kaod.org>
Cc: Frédéric Barrat <fbarrat@linux.ibm.com>
Cc: Mahesh J Salgaonkar <mahesh@linux.ibm.com>
Cc: Madhavan Srinivasan <maddy@linux.ibm.com>
Cc: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Aditya Gupta <adityag@linux.ibm.com>
---
 hw/ppc/pnv_lpc.c         | 14 ++++++++++++++
 include/hw/ppc/pnv_lpc.h |  4 ++++
 2 files changed, 18 insertions(+)

diff --git a/hw/ppc/pnv_lpc.c b/hw/ppc/pnv_lpc.c
index d692858bee78..54b366221bc7 100644
--- a/hw/ppc/pnv_lpc.c
+++ b/hw/ppc/pnv_lpc.c
@@ -698,6 +698,19 @@ static const TypeInfo pnv_lpc_power10_info = {
     .class_init    = pnv_lpc_power10_class_init,
 };
 
+static void pnv_lpc_power11_class_init(ObjectClass *klass, void *data)
+{
+    DeviceClass *dc = DEVICE_CLASS(klass);
+
+    dc->desc = "PowerNV LPC Controller POWER11";
+}
+
+static const TypeInfo pnv_lpc_power11_info = {
+    .name          = TYPE_PNV11_LPC,
+    .parent        = TYPE_PNV10_LPC,
+    .class_init    = pnv_lpc_power11_class_init,
+};
+
 static void pnv_lpc_realize(DeviceState *dev, Error **errp)
 {
     PnvLpcController *lpc = PNV_LPC(dev);
@@ -771,6 +784,7 @@ static void pnv_lpc_register_types(void)
     type_register_static(&pnv_lpc_power8_info);
     type_register_static(&pnv_lpc_power9_info);
     type_register_static(&pnv_lpc_power10_info);
+    type_register_static(&pnv_lpc_power11_info);
 }
 
 type_init(pnv_lpc_register_types)
diff --git a/include/hw/ppc/pnv_lpc.h b/include/hw/ppc/pnv_lpc.h
index 5d22c4557041..1069bca38dfd 100644
--- a/include/hw/ppc/pnv_lpc.h
+++ b/include/hw/ppc/pnv_lpc.h
@@ -41,6 +41,10 @@ DECLARE_INSTANCE_CHECKER(PnvLpcController, PNV9_LPC,
 DECLARE_INSTANCE_CHECKER(PnvLpcController, PNV10_LPC,
                          TYPE_PNV10_LPC)
 
+#define TYPE_PNV11_LPC TYPE_PNV_LPC "-POWER11"
+DECLARE_INSTANCE_CHECKER(PnvLpcController, PNV11_LPC,
+                         TYPE_PNV11_LPC)
+
 struct PnvLpcController {
     DeviceState parent;
 
-- 
2.45.1



  parent reply	other threads:[~2024-05-27  7:13 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-27  7:10 [PATCH v3 00/11] Power11 support for QEMU Aditya Gupta
2024-05-27  7:10 ` [PATCH v3 01/11] ppc: Add Power11 DD2.0 processor Aditya Gupta
2024-05-27  7:10 ` [PATCH v3 02/11] ppc/pseries: Add Power11 cpu type Aditya Gupta
2024-05-27  7:10 ` [PATCH v3 03/11] target/ppc: Introduce 'PowerPCCPUClass::logical_pvr' Aditya Gupta
2024-05-27  7:10 ` [PATCH v3 04/11] target/ppc: Fix regression due to Power10 and Power11 having same PCR Aditya Gupta
2024-05-27  7:10 ` [PATCH v3 05/11] ppc/pnv: Add a Power11 Pnv11Chip, and a Power11 Machine Aditya Gupta
2024-05-27 15:15   ` Cédric Le Goater
2024-05-28  6:08     ` Aditya Gupta
2024-05-27  7:10 ` [PATCH v3 06/11] ppc/pnv: Add HOMER for POWER11 Aditya Gupta
2024-05-27  7:10 ` Aditya Gupta [this message]
2024-05-27  7:10 ` [PATCH v3 08/11] ppc/pnv: Add OCC for Power11 Aditya Gupta
2024-05-27  7:10 ` [PATCH v3 09/11] ppc/pnv: Add a PSI bridge model " Aditya Gupta
2024-05-27  7:10 ` [PATCH v3 10/11] ppc/pnv: Add SBE " Aditya Gupta
2024-05-27  7:10 ` [PATCH v3 11/11] ppc/pnv: Update skiboot.lid to support Power11 Aditya Gupta

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