Re: [PATCH v5 13/23] hw/i386/pc: Remove PCMachineClass::enforce_aligned_dimm

[Igor Mammedov <imammedo@redhat.com>]

On Wed, 29 May 2024 07:15:29 +0200
Philippe Mathieu-Daudé <philmd@linaro.org> wrote:

> PCMachineClass::enforce_aligned_dimm was only used by the
> pc-i440fx-2.1 machine, which got removed. It is now always
> true. Remove it, simplifying pc_get_device_memory_range().
> Update the comment in Avocado test_phybits_low_pse36().
> 
> Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>

Reviewed-by: Igor Mammedov <imammedo@redhat.com>

> ---
>  include/hw/i386/pc.h                  |  3 ---
>  hw/i386/pc.c                          | 14 +++-----------
>  tests/avocado/mem-addr-space-check.py |  9 ++++-----
>  3 files changed, 7 insertions(+), 19 deletions(-)
> 
> diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
> index bbbf58bd42..1351e73ee0 100644
> --- a/include/hw/i386/pc.h
> +++ b/include/hw/i386/pc.h
> @@ -74,8 +74,6 @@ typedef struct PCMachineState {
>   *
>   * Compat fields:
>   *
> - * @enforce_aligned_dimm: check that DIMM's address/size is aligned by
> - *                        backend's alignment value if provided
>   * @acpi_data_size: Size of the chunk of memory at the top of RAM
>   *                  for the BIOS ACPI tables and other BIOS
>   *                  datastructures.
> @@ -114,7 +112,6 @@ struct PCMachineClass {
>      /* RAM / address space compat: */
>      bool gigabyte_align;
>      bool has_reserved_memory;
> -    bool enforce_aligned_dimm;
>      bool broken_reserved_end;
>      bool enforce_amd_1tb_hole;
>      bool isa_bios_alias;
> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> index 4b2a29bf08..9cb5083f8f 100644
> --- a/hw/i386/pc.c
> +++ b/hw/i386/pc.c
> @@ -727,7 +727,6 @@ static void pc_get_device_memory_range(PCMachineState *pcms,
>                                         hwaddr *base,
>                                         ram_addr_t *device_mem_size)
>  {
> -    PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
>      MachineState *machine = MACHINE(pcms);
>      ram_addr_t size;
>      hwaddr addr;
> @@ -735,10 +734,8 @@ static void pc_get_device_memory_range(PCMachineState *pcms,
>      size = machine->maxram_size - machine->ram_size;
>      addr = ROUND_UP(pc_above_4g_end(pcms), 1 * GiB);
>  
> -    if (pcmc->enforce_aligned_dimm) {
> -        /* size device region assuming 1G page max alignment per slot */
> -        size += (1 * GiB) * machine->ram_slots;
> -    }
> +    /* size device region assuming 1G page max alignment per slot */
> +    size += (1 * GiB) * machine->ram_slots;
>  
>      *base = addr;
>      *device_mem_size = size;
> @@ -1297,12 +1294,9 @@ void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs)
>  static void pc_memory_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
>                                 Error **errp)
>  {
> -    const PCMachineState *pcms = PC_MACHINE(hotplug_dev);
>      const X86MachineState *x86ms = X86_MACHINE(hotplug_dev);
> -    const PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
>      const MachineState *ms = MACHINE(hotplug_dev);
>      const bool is_nvdimm = object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM);
> -    const uint64_t legacy_align = TARGET_PAGE_SIZE;
>      Error *local_err = NULL;
>  
>      /*
> @@ -1327,8 +1321,7 @@ static void pc_memory_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
>          return;
>      }
>  
> -    pc_dimm_pre_plug(PC_DIMM(dev), MACHINE(hotplug_dev),
> -                     pcmc->enforce_aligned_dimm ? NULL : &legacy_align, errp);
> +    pc_dimm_pre_plug(PC_DIMM(dev), MACHINE(hotplug_dev), NULL, errp);
>  }
>  
>  static void pc_memory_plug(HotplugHandler *hotplug_dev,
> @@ -1792,7 +1785,6 @@ static void pc_machine_class_init(ObjectClass *oc, void *data)
>      pcmc->smbios_defaults = true;
>      pcmc->gigabyte_align = true;
>      pcmc->has_reserved_memory = true;
> -    pcmc->enforce_aligned_dimm = true;
>      pcmc->enforce_amd_1tb_hole = true;
>      pcmc->isa_bios_alias = true;
>      /* BIOS ACPI tables: 128K. Other BIOS datastructures: less than 4K reported
> diff --git a/tests/avocado/mem-addr-space-check.py b/tests/avocado/mem-addr-space-check.py
> index af019969c0..85541ea051 100644
> --- a/tests/avocado/mem-addr-space-check.py
> +++ b/tests/avocado/mem-addr-space-check.py
> @@ -31,11 +31,10 @@ def test_phybits_low_pse36(self):
>          at 4 GiB boundary when "above_4g_mem_size" is 0 (this would be true when
>          we have 0.5 GiB of VM memory, see pc_q35_init()). This means total
>          hotpluggable memory size is 60 GiB. Per slot, we reserve 1 GiB of memory
> -        for dimm alignment for all newer machines (see enforce_aligned_dimm
> -        property for pc machines and pc_get_device_memory_range()). That leaves
> -        total hotpluggable actual memory size of 59 GiB. If the VM is started
> -        with 0.5 GiB of memory, maxmem should be set to a maximum value of
> -        59.5 GiB to ensure that the processor can address all memory directly.
> +        for dimm alignment for all machines. That leaves total hotpluggable
> +        actual memory size of 59 GiB. If the VM is started with 0.5 GiB of
> +        memory, maxmem should be set to a maximum value of 59.5 GiB to ensure
> +        that the processor can address all memory directly.
>          Note that 64-bit pci hole size is 0 in this case. If maxmem is set to
>          59.6G, QEMU should fail to start with a message "phy-bits are too low".
>          If maxmem is set to 59.5G with all other QEMU parameters identical, QEMU