Re: [PATCH 5/6] perf/x86: Enable NMI source reporting for perfmon

[kernel test robot <lkp@intel.com>]

Hi Jacob,

kernel test robot noticed the following build errors:

[auto build test ERROR on perf-tools-next/perf-tools-next]
[also build test ERROR on perf-tools/perf-tools linus/master v6.10-rc1 next-20240529]
[cannot apply to tip/perf/core tip/x86/core acme/perf/core]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Jacob-Pan/x86-irq-Add-enumeration-of-NMI-source-reporting-CPU-feature/20240530-043112
base:   https://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools-next.git perf-tools-next
patch link:    https://lore.kernel.org/r/20240529203325.3039243-6-jacob.jun.pan%40linux.intel.com
patch subject: [PATCH 5/6] perf/x86: Enable NMI source reporting for perfmon
config: i386-randconfig-012-20240530 (https://download.01.org/0day-ci/archive/20240530/202405301242.LFkK3Hcm-lkp@intel.com/config)
compiler: gcc-13 (Ubuntu 13.2.0-4ubuntu3) 13.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240530/202405301242.LFkK3Hcm-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202405301242.LFkK3Hcm-lkp@intel.com/

All errors (new ones prefixed by >>):

   arch/x86/events/intel/core.c: In function 'intel_pmu_handle_irq':
>> arch/x86/events/intel/core.c:3096:40: error: 'apic_perfmon_ctr' undeclared (first use in this function)
    3096 |                 apic_write(APIC_LVTPC, apic_perfmon_ctr);
         |                                        ^~~~~~~~~~~~~~~~
   arch/x86/events/intel/core.c:3096:40: note: each undeclared identifier is reported only once for each function it appears in


vim +/apic_perfmon_ctr +3096 arch/x86/events/intel/core.c

  3067	
  3068	/*
  3069	 * This handler is triggered by the local APIC, so the APIC IRQ handling
  3070	 * rules apply:
  3071	 */
  3072	static int intel_pmu_handle_irq(struct pt_regs *regs)
  3073	{
  3074		struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
  3075		bool late_ack = hybrid_bit(cpuc->pmu, late_ack);
  3076		bool mid_ack = hybrid_bit(cpuc->pmu, mid_ack);
  3077		int loops;
  3078		u64 status;
  3079		int handled;
  3080		int pmu_enabled;
  3081	
  3082		/*
  3083		 * Save the PMU state.
  3084		 * It needs to be restored when leaving the handler.
  3085		 */
  3086		pmu_enabled = cpuc->enabled;
  3087		/*
  3088		 * In general, the early ACK is only applied for old platforms.
  3089		 * For the big core starts from Haswell, the late ACK should be
  3090		 * applied.
  3091		 * For the small core after Tremont, we have to do the ACK right
  3092		 * before re-enabling counters, which is in the middle of the
  3093		 * NMI handler.
  3094		 */
  3095		if (!late_ack && !mid_ack)
> 3096			apic_write(APIC_LVTPC, apic_perfmon_ctr);
  3097		intel_bts_disable_local();
  3098		cpuc->enabled = 0;
  3099		__intel_pmu_disable_all(true);
  3100		handled = intel_pmu_drain_bts_buffer();
  3101		handled += intel_bts_interrupt();
  3102		status = intel_pmu_get_status();
  3103		if (!status)
  3104			goto done;
  3105	
  3106		loops = 0;
  3107	again:
  3108		intel_pmu_lbr_read();
  3109		intel_pmu_ack_status(status);
  3110		if (++loops > 100) {
  3111			static bool warned;
  3112	
  3113			if (!warned) {
  3114				WARN(1, "perfevents: irq loop stuck!\n");
  3115				perf_event_print_debug();
  3116				warned = true;
  3117			}
  3118			intel_pmu_reset();
  3119			goto done;
  3120		}
  3121	
  3122		handled += handle_pmi_common(regs, status);
  3123	
  3124		/*
  3125		 * Repeat if there is more work to be done:
  3126		 */
  3127		status = intel_pmu_get_status();
  3128		if (status)
  3129			goto again;
  3130	
  3131	done:
  3132		if (mid_ack)
  3133			apic_write(APIC_LVTPC, apic_perfmon_ctr);
  3134		/* Only restore PMU state when it's active. See x86_pmu_disable(). */
  3135		cpuc->enabled = pmu_enabled;
  3136		if (pmu_enabled)
  3137			__intel_pmu_enable_all(0, true);
  3138		intel_bts_enable_local();
  3139	
  3140		/*
  3141		 * Only unmask the NMI after the overflow counters
  3142		 * have been reset. This avoids spurious NMIs on
  3143		 * Haswell CPUs.
  3144		 */
  3145		if (late_ack)
  3146			apic_write(APIC_LVTPC, apic_perfmon_ctr);
  3147		return handled;
  3148	}
  3149	

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