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From: kernel test robot <lkp@intel.com>
To: "Paul E. McKenney" <paulmck@kernel.org>
Cc: oe-kbuild-all@lists.linux.dev, linux-kernel@vger.kernel.org
Subject: [paulmck-rcu:dev.2024.05.30a 5/50] arch/arm/include/asm/cmpxchg.h:167:12: error: call to undeclared function 'cmpxchg_emu_u8'; ISO C99 and later do not support implicit function declarations
Date: Mon, 3 Jun 2024 14:38:04 +0800	[thread overview]
Message-ID: <202406031410.LcIbbCfd-lkp@intel.com> (raw)

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git dev.2024.05.30a
head:   3d08b2c4a149fdf966e1b0768c14bbf4048e4070
commit: 6ba3d5014d24a46ed329fc567e554c218eb62cfa [5/50] ARM: Emulate one-byte cmpxchg
config: arm-randconfig-r052-20240603 (https://download.01.org/0day-ci/archive/20240603/202406031410.LcIbbCfd-lkp@intel.com/config)
compiler: clang version 15.0.7 (https://github.com/llvm/llvm-project 8dfdcc7b7bf66834a761bd8de445840ef68e4d1a)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240603/202406031410.LcIbbCfd-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202406031410.LcIbbCfd-lkp@intel.com/

Note: the paulmck-rcu/dev.2024.05.30a HEAD 3d08b2c4a149fdf966e1b0768c14bbf4048e4070 builds fine.
      It only hurts bisectability.

All errors (new ones prefixed by >>):

   In file included from kernel/bounds.c:13:
   In file included from include/linux/log2.h:12:
   In file included from include/linux/bitops.h:63:
   In file included from arch/arm/include/asm/bitops.h:245:
   In file included from include/asm-generic/bitops/lock.h:5:
   In file included from include/linux/atomic.h:7:
   In file included from arch/arm/include/asm/atomic.h:16:
>> arch/arm/include/asm/cmpxchg.h:167:12: error: call to undeclared function 'cmpxchg_emu_u8'; ISO C99 and later do not support implicit function declarations [-Werror,-Wimplicit-function-declaration]
                   oldval = cmpxchg_emu_u8((volatile u8 *)ptr, old, new);
                            ^
   1 error generated.
   make[3]: *** [scripts/Makefile.build:117: kernel/bounds.s] Error 1
   make[3]: Target 'prepare' not remade because of errors.
   make[2]: *** [Makefile:1208: prepare0] Error 2
   make[2]: Target 'prepare' not remade because of errors.
   make[1]: *** [Makefile:240: __sub-make] Error 2
   make[1]: Target 'prepare' not remade because of errors.
   make: *** [Makefile:240: __sub-make] Error 2
   make: Target 'prepare' not remade because of errors.


vim +/cmpxchg_emu_u8 +167 arch/arm/include/asm/cmpxchg.h

   152	
   153	/*
   154	 * cmpxchg only support 32-bits operands on ARMv6.
   155	 */
   156	
   157	static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
   158					      unsigned long new, int size)
   159	{
   160		unsigned long oldval, res;
   161	
   162		prefetchw((const void *)ptr);
   163	
   164		switch (size) {
   165	#ifdef CONFIG_CPU_V6	/* min ARCH >= ARMv6K */
   166		case 1:
 > 167			oldval = cmpxchg_emu_u8((volatile u8 *)ptr, old, new);
   168			break;
   169	#else
   170		case 1:
   171			do {
   172				asm volatile("@ __cmpxchg1\n"
   173				"	ldrexb	%1, [%2]\n"
   174				"	mov	%0, #0\n"
   175				"	teq	%1, %3\n"
   176				"	strexbeq %0, %4, [%2]\n"
   177					: "=&r" (res), "=&r" (oldval)
   178					: "r" (ptr), "Ir" (old), "r" (new)
   179					: "memory", "cc");
   180			} while (res);
   181			break;
   182		case 2:
   183			do {
   184				asm volatile("@ __cmpxchg1\n"
   185				"	ldrexh	%1, [%2]\n"
   186				"	mov	%0, #0\n"
   187				"	teq	%1, %3\n"
   188				"	strexheq %0, %4, [%2]\n"
   189					: "=&r" (res), "=&r" (oldval)
   190					: "r" (ptr), "Ir" (old), "r" (new)
   191					: "memory", "cc");
   192			} while (res);
   193			break;
   194	#endif
   195		case 4:
   196			do {
   197				asm volatile("@ __cmpxchg4\n"
   198				"	ldrex	%1, [%2]\n"
   199				"	mov	%0, #0\n"
   200				"	teq	%1, %3\n"
   201				"	strexeq %0, %4, [%2]\n"
   202					: "=&r" (res), "=&r" (oldval)
   203					: "r" (ptr), "Ir" (old), "r" (new)
   204					: "memory", "cc");
   205			} while (res);
   206			break;
   207		default:
   208			__bad_cmpxchg(ptr, size);
   209			oldval = 0;
   210		}
   211	
   212		return oldval;
   213	}
   214	

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

                 reply	other threads:[~2024-06-03  6:39 UTC|newest]

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