From: Bjorn Helgaas <helgaas@kernel.org>
To: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Cc: lpieralisi@kernel.org, kw@linux.com, robh@kernel.org,
bhelgaas@google.com, krzysztof.kozlowski+dt@linaro.org,
conor+dt@kernel.org, jingoohan1@gmail.com, mani@kernel.org,
marek.vasut+renesas@gmail.com, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Subject: Re: [PATCH v8 2/5] PCI: rcar-gen4: Add rcar_gen4_pcie_drvdata
Date: Wed, 5 Jun 2024 12:29:19 -0500 [thread overview]
Message-ID: <20240605172919.GA766124@bhelgaas> (raw)
In-Reply-To: <20240520074300.125969-3-yoshihiro.shimoda.uh@renesas.com>
On Mon, May 20, 2024 at 04:42:57PM +0900, Yoshihiro Shimoda wrote:
> In other to support future SoCs such as r8a779g0 and r8a779h0 that
> require different initialization settings, let's introduce SoC
> specific driver data with the initial member being the device mode.
> No functional change.
s/In other to/To/ or s/In other/In order/ if you prefer.
s/let's//
Whoever applies this can tweak it, no need to repost for this.
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
> drivers/pci/controller/dwc/pcie-rcar-gen4.c | 32 +++++++++++++++------
> 1 file changed, 23 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-rcar-gen4.c b/drivers/pci/controller/dwc/pcie-rcar-gen4.c
> index 0be760ed420b..b11e09505b0b 100644
> --- a/drivers/pci/controller/dwc/pcie-rcar-gen4.c
> +++ b/drivers/pci/controller/dwc/pcie-rcar-gen4.c
> @@ -48,11 +48,15 @@
> #define RCAR_GEN4_PCIE_EP_FUNC_DBI_OFFSET 0x1000
> #define RCAR_GEN4_PCIE_EP_FUNC_DBI2_OFFSET 0x800
>
> +struct rcar_gen4_pcie_drvdata {
> + enum dw_pcie_device_mode mode;
> +};
> +
> struct rcar_gen4_pcie {
> struct dw_pcie dw;
> void __iomem *base;
> struct platform_device *pdev;
> - enum dw_pcie_device_mode mode;
> + const struct rcar_gen4_pcie_drvdata *drvdata;
> };
> #define to_rcar_gen4_pcie(_dw) container_of(_dw, struct rcar_gen4_pcie, dw)
>
> @@ -137,7 +141,7 @@ static int rcar_gen4_pcie_start_link(struct dw_pcie *dw)
> * Since dw_pcie_setup_rc() sets it once, PCIe Gen2 will be trained.
> * So, this needs remaining times for up to PCIe Gen4 if RC mode.
> */
> - if (changes && rcar->mode == DW_PCIE_RC_TYPE)
> + if (changes && rcar->drvdata->mode == DW_PCIE_RC_TYPE)
> changes--;
>
> for (i = 0; i < changes; i++) {
> @@ -172,9 +176,9 @@ static int rcar_gen4_pcie_common_init(struct rcar_gen4_pcie *rcar)
> reset_control_assert(dw->core_rsts[DW_PCIE_PWR_RST].rstc);
>
> val = readl(rcar->base + PCIEMSR0);
> - if (rcar->mode == DW_PCIE_RC_TYPE) {
> + if (rcar->drvdata->mode == DW_PCIE_RC_TYPE) {
> val |= DEVICE_TYPE_RC;
> - } else if (rcar->mode == DW_PCIE_EP_TYPE) {
> + } else if (rcar->drvdata->mode == DW_PCIE_EP_TYPE) {
> val |= DEVICE_TYPE_EP;
> } else {
> ret = -EINVAL;
> @@ -437,9 +441,11 @@ static void rcar_gen4_remove_dw_pcie_ep(struct rcar_gen4_pcie *rcar)
> /* Common */
> static int rcar_gen4_add_dw_pcie(struct rcar_gen4_pcie *rcar)
> {
> - rcar->mode = (uintptr_t)of_device_get_match_data(&rcar->pdev->dev);
> + rcar->drvdata = of_device_get_match_data(&rcar->pdev->dev);
> + if (!rcar->drvdata)
> + return -EINVAL;
>
> - switch (rcar->mode) {
> + switch (rcar->drvdata->mode) {
> case DW_PCIE_RC_TYPE:
> return rcar_gen4_add_dw_pcie_rp(rcar);
> case DW_PCIE_EP_TYPE:
> @@ -480,7 +486,7 @@ static int rcar_gen4_pcie_probe(struct platform_device *pdev)
>
> static void rcar_gen4_remove_dw_pcie(struct rcar_gen4_pcie *rcar)
> {
> - switch (rcar->mode) {
> + switch (rcar->drvdata->mode) {
> case DW_PCIE_RC_TYPE:
> rcar_gen4_remove_dw_pcie_rp(rcar);
> break;
> @@ -500,14 +506,22 @@ static void rcar_gen4_pcie_remove(struct platform_device *pdev)
> rcar_gen4_pcie_unprepare(rcar);
> }
>
> +static struct rcar_gen4_pcie_drvdata drvdata_rcar_gen4_pcie = {
> + .mode = DW_PCIE_RC_TYPE,
> +};
> +
> +static struct rcar_gen4_pcie_drvdata drvdata_rcar_gen4_pcie_ep = {
> + .mode = DW_PCIE_EP_TYPE,
> +};
> +
> static const struct of_device_id rcar_gen4_pcie_of_match[] = {
> {
> .compatible = "renesas,rcar-gen4-pcie",
> - .data = (void *)DW_PCIE_RC_TYPE,
> + .data = &drvdata_rcar_gen4_pcie,
> },
> {
> .compatible = "renesas,rcar-gen4-pcie-ep",
> - .data = (void *)DW_PCIE_EP_TYPE,
> + .data = &drvdata_rcar_gen4_pcie_ep,
> },
> {},
> };
> --
> 2.25.1
>
next prev parent reply other threads:[~2024-06-05 17:29 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-20 7:42 [PATCH v8 0/5] PCI: rcar-gen4: Add R-Car V4H support Yoshihiro Shimoda
2024-05-20 7:42 ` [PATCH v8 1/5] PCI: dwc: Add PCIE_PORT_{FORCE,LANE_SKEW} macros Yoshihiro Shimoda
2024-05-20 7:42 ` [PATCH v8 2/5] PCI: rcar-gen4: Add rcar_gen4_pcie_drvdata Yoshihiro Shimoda
2024-06-05 17:29 ` Bjorn Helgaas [this message]
2024-05-20 7:42 ` [PATCH v8 3/5] PCI: rcar-gen4: Add .ltssm_control() for other SoC support Yoshihiro Shimoda
2024-06-05 14:09 ` Manivannan Sadhasivam
2024-06-05 17:29 ` Bjorn Helgaas
2024-06-11 9:07 ` Yoshihiro Shimoda
2024-05-20 7:42 ` [PATCH v8 4/5] PCI: rcar-gen4: Add support for r8a779g0 Yoshihiro Shimoda
2024-06-08 8:24 ` Manivannan Sadhasivam
2024-06-11 9:19 ` Yoshihiro Shimoda
2024-06-11 10:10 ` Geert Uytterhoeven
2024-06-12 14:59 ` Manivannan Sadhasivam
2024-05-20 7:43 ` [PATCH v8 5/5] misc: pci_endpoint_test: Document a policy about adding pci_device_id Yoshihiro Shimoda
2024-06-05 17:28 ` Bjorn Helgaas
2024-06-11 9:06 ` Yoshihiro Shimoda
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